JPH02232777A - Supporting device for radiograph information processing system - Google Patents

Abstract

PURPOSE:To attain the improvement of the processing capacity by connecting a supporting device for holding the data of a specific address to a system, and loading a function additional program thereon. CONSTITUTION:The supporting device 8 is connected to a controller 16, the function additional program is stored in a RAM 52, and information including a specific address AD for controlling the processing executed by a CPU 26 and an SCPU 32 is set to the RAM 52. Also, information for executing a parallel processing by the CPU 26 and the SCPU 32 is set to a RAM 50. The CPU 26 executes an initial processing program, and stores its processing AD and the processing contents in the RAM 50. When the processing AD by the CPU 26 becomes the AD of an image processing, the specific AD of the RAM 52 and the processing AD of the RAM 50 coincide with each other in a comparator 56. The comparator 56 outputs a coincidence signal to a logic circuit 54 and connects the CPU 26 and the RAM 50 by switching a gate 28, and in accordance with a processing procedure set to the RAM 50, the CPU 26 transfers data required for an image processing to the RAM 50, and allows the SCPU 32 to execute an additional program.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a support device for a radiation image information processing system, and more specifically, for example, reads radiation image information from a stimulable phosphor sheet, The present invention relates to a support device that is connected to a radiographic image information/processing system that processes and displays on film, CRT, etc., and that adds functions to the system and enables high-speed processing.

[Background of the Invention] Recently, the applicant has developed a radiographic image recording and reproducing system that uses a stimulable phosphor to obtain a radiographic image of a subject, and a number of patent applications have been filed in connection with this system.
For example, JP-A No. 55-124.29, JP-A No. 55-1
No. 03472, No. 55-116340, No. 55-
No. 87970, etc.). These are becoming widespread, especially in the medical field. Here, stimulable phosphor refers to radiation (
When irradiated with X-rays, α-rays, β-rays, γ-rays, electron beams, ultraviolet rays, etc., a part of this radiation energy is accumulated, and later when excitation light such as visible light is irradiated, the accumulated energy is A phosphor that emits photostimulable light.

That is, the radiation image recording and reproducing system described above utilizes this stimulable phosphor, and the radiation image information of the human body, etc. is once recorded on a sheet (hereinafter referred to as
The sheet is scanned with excitation light such as a laser beam to generate stimulated luminescence, and the resulting stimulated luminescence is read photoelectrically to produce an image signal. This image signal is subjected to predetermined image processing and then output as a visible image to a recording material such as a photographic light-sensitive material, a CRT, or the like.

By the way, when adding functions to such a system, a new program is added to the existing program and incorporated into the radiation image recording and reproducing system for use. However, depending on the scale of the added program, the load on the CPU on the system side increases, resulting in a problem that, for example, image processing takes a long time.

[Object of the Invention] The present invention has been made to overcome the above-mentioned disadvantages, and when adding functions to a radiation image recording and reproducing system, a support device equipped with a function addition program is connected to the system, and the above-mentioned It is an object of the present invention to provide a support device for a radiation image information processing system that can improve processing capacity by processing the additional program in parallel with the operation of the system.

[Means for Achieving the Objective] In order to achieve the above-mentioned objective, a radiation image information processing system that performs predetermined signal processing on a radiation image to obtain an image signal and forms a visualized image from the image signal is connected. C of the control circuit that constitutes the system.
address information setting means for setting address information of a specific address among the processing addresses of a predetermined program by the PU; function addition program storage means for storing a function addition program for the system; processing address by the CPU and the address information setting. a comparison detection means for sequentially comparing the address information set by the means and outputting a detection signal when processing information corresponding to the address information is detected, and based on the detection signal, the predetermined program and the function addition program. The present invention is characterized in that the function addition program stored in the storage means is controlled to be processed in parallel.

[Embodiment] Next, a preferred embodiment of the support device for a radiation image information processing system according to the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 shows a configuration in which a support device 8 according to this embodiment is connected to a radiation image information processing system.

In this case, the radiographic image information processing system is located at the right side of the imaging device 10, and the radiation image information processing system
An image reading device 14 that photoelectrically reads the stimulable phosphor sheet A on which a transmitted line image is recorded under predetermined conditions and converts it into a digital signal, and a control that controls the operation of the image reading device 14 and performs image processing. It basically consists of a device 16, an image output device 18 that outputs the image signal as a visible image on a film that is a photographic material, and an image output device 20 that outputs the image signal on a screen such as a CRT. be done.

Here, the image reading device 14, for example, irradiates the stimulable phosphor sheet A with excitation light such as a laser beam and converts the stimulated luminescence light generated from the sheet A into an image signal using a photomultiplier. , a mechanism for erasing image information by irradiating erasing light onto the stimulable phosphor sheet A from which the image signal has been read, thereby making the stimulable phosphor sheet A reusable.

On the other hand, the control device 16 controls the transport mechanism of the stimulable phosphor sheet A in the image reading device 14, controls the reading operation of the photoelectric conversion unit, recognizes the photographing conditions, etc., performs gradation processing on the image, etc.
It centrally controls image processing such as frequency processing, matching of patient information and images, monitoring and controlling of the operating status of the system, interfaces between the image reading device 14 and the image output devices 18 and 20, and the like. The image output device 18 irradiates a laser beam onto a film based on the image signal obtained from the image reading device 14, develops the film, and outputs a visible image, and the image output device 20 is the image signal C
This is displayed on RT, etc.

FIG. 2 shows the configuration of the support control board 22 of the support device 8, and this support control board 22 is mounted on the control device 16 shown in FIG. 1 and connected to the control board 24. . In this case, the CPU 26 that controls the operation in the control device 16 is removed from the control board 24 and attached to the support control board 22. And support control board 2
2 and the control board 24 are mounted nearby and connected via a flexible cable or the like via the IC socket of the CPU 26.

The support of the control device 16 by the support control board 22 is R.
It is controlled by a support CPU (hereinafter referred to as SCPU) 32 based on a support program stored in the OM 30. The support control board 22 has a bus line 34, and the bus line 34 has a ROM 30 and a S CPU
32 is connected, and the RA. M36, timer calendar 38, serial input/output controller (SIO) 40 and logic circuit 42
is connected. In this case, a display section 44 and a keyboard 46 are connected to the Si 040 for displaying the operating status or setting data. Further, the logic circuit 42 is supplied with signals from a reset terminal and a power switch. Furthermore, an address counter 4 is connected to the bus line 34.
g, a RAM 50 serving as processing information holding means for holding information including processing addresses by the CPU 26, a RAM 52 holding predetermined processing addresses, and a logic circuit 54 are connected, respectively.

The address counter 48 specifies the address of the RAM 50 based on commands from the S CPU 32 and the logic circuit 54. The RAM 50 sequentially shifts some areas and sequentially holds data such as processing addresses and instructions for the CPU 26 via the gate 28.

Note that the data is also supplied to a comparator 56 as comparison detection means via the gate 28.

The RAM 52 can, for example, hold the specific address and instruction of a fault that has occurred in the control device 16 and output these data to the comparator 56, or correspond to an additional location when adding functions to the control device 16. The specific address is held and output to the comparator 56. Comparator 56
is the processing address from the CPU 26 and the RAM 52
and the specific address, and the comparison result is sent to the logic circuit 5.
Output to 4. Based on the comparison result, the logic circuit 54 issues an operation stop command (WAI) to the CPU 26 via the gate 28.
T signal) and interrupts the SCP U32.

On the other hand, the gate 28 is constructed as shown in FIG. That is, the gate 28 includes selectors 60a to 60c, 162a to 62C, which are substantially composed of multiplexers or the like.
and 64a, 64. b and a logic circuit 66. The selectors 60a to 60c receive control signals S1, S from the control unit @16 or from the logic circuit 66 and the RAM 50.
2 and address data signal A.D/DATA from the logic circuit 66. Select and transfer to the CPU 26 according to the following. Selectors 62a to 62
e is C P according to the select signal a2 from the logic circuit 66.
Control signal from S.026 , S2 and the address data signal AD/DATA to the control device 16. Further, selectors 64a and 6th transfer control signal C from control 1 and 24 and address data signal AD/DATA to RAM 50 and comparator 56 in accordance with select signal a3 from logic circuit 66.

The support device for a radiation image information processing system according to this embodiment is basically configured as described above, and its operation and effect will be explained next.

First, the operation of the radiation image information processing system will be explained. When a subject 12 is irradiated with X-rays from the X-ray source 11 in the imaging device 10, the X-rays pass through the subject 12 and appear on the surface of the stimulable phosphor sheet A loaded in the imaging device 10. A subject image is formed as a radiographic image. Next, the stimulable phosphor sheet A on which the subject image has been stored and recorded is loaded into the image reading device 14, and the control device 160
The image data is converted into electrical signals under control.

That is, in the control device 16, patient information, image processing conditions,
Photographing conditions, etc. are input. Therefore, the image reading device 14 irradiates the stimulable phosphor sheet A, which is conveyed in the sub-scanning direction, with excitation light such as a laser beam in the main scanning direction under the control of the control device 160, and the luminance emitted from the sheet A is emitted from the sheet A. The exhausted light is photoelectrically read by a photomultiplier or the like and converted into a digital signal to obtain image data.

In this case, the image data is obtained by setting reading conditions based on the image information obtained by once roughly reading the stimulable phosphor sheet A, and then performing the main reading operation according to the reading conditions to obtain the optimum image data. . On the other hand, the entire surface of the stimulable phosphor sheet A from which the image information has been read is irradiated with erasing light, thereby erasing the radiation image information.
It is provided again for imaging by the imaging device 10.

The image data converted into electrical signals by the image reading device 14 is subjected to gradation processing and gradation processing as necessary by the control device 16.
After being subjected to processing such as frequency processing, it is output as a visible image by the image output device 18 or 20. in this case,
In the image output device 18, a laser beam modulated according to the image data is irradiated in the main scanning direction onto a film as a photographic recording material that is conveyed in the sub-scanning direction, thereby recording an image. A visible image is obtained by developing the image. Further, in the image output device 20, a subject image corresponding to the image data is displayed on a screen such as a CRT.

Next, a case will be described in which a failure occurs during use of the radiation image information processing system described above. In this case, the system performs predetermined error processing and then enters the HALT state. For example, in such a radiation image information processing system, frequency processing is performed on an image, and at that time, image data is divided by a predetermined coefficient. Here, if the coefficient is not set or is 0, the division result will be infinite. Therefore, in this system, when such an error occurs, the processing program jumps to a specific address, the contents of the status register and control register at the time of the error are saved, and then the system is placed in a HALT state. In this state, the user attempts recovery operations by restarting the system, etc., and calls maintenance personnel if the system does not recover.

Here, the operation of the support device 8 when an error occurs will be explained based on FIGS. 2 and 3.

First, a maintenance person connects the support control device 8 to the control device 16, as shown in FIG. In other words, the maintenance staff can access the CPU 2 from the control board 24 that constitutes the control device 16.
6 is removed, and this CPU 26 is attached to the support control board 22 constituting the support device 8 (see FIG. 2). Then, the support control board 22 and the control board 24 are connected to the gate 2.
Connect with a flexible cable etc. via 8.

Next, the RAM5 of the support control board 22 is
2 is set with failure address information including a specific address which is the error processing address of the processing program when an error occurs. That is, the S C of the support control board 22
Based on the command from the keyboard 46, the P U 32 sends fault address information including the specific address saved by the control device 16 when an error occurs via the selectors 64a and 64b forming the gate 28 via the RAM 50.
Load into AM52.

Then, after setting the failure address information, the maintenance personnel restarts the system and performs processing work using the system.

In this case, selectors 60a to 60c and b2a to 62C receive select signals a and a from logic circuit 66.
2 connects the control device l6 and the CPU 26. Further, the selectors 64a and 64b select the control device 16 and the CPU 26 from the RAM 50 by the select signal a3.
and a comparator 56.

Therefore, processing information by the CPU 26 is transferred to the control device 16 via the selectors 62a to 62c, and predetermined operational control of the image reading device 14 and the like is executed. on the other hand,
The processing information is provided by the selectors 62a to 62G and 64a.
, 64b to the RAM 50 and the comparator 56. In this case, the RAM 50 stores the processing information. Further, the comparator 56 compares the processing information with the failure address information held in the RAM 52. On the other hand, the control device ffil6 selects C through selectors 60a to 60C.
Control signals S1 and S2 and address data signal AD/DATA are transferred to P U26. These signals are also sent to selectors 64a. 64b to RAM 50 and comparator 56. Then, as in the case described above, the comparator 56 compares the processing information in the control device 16 with the RA.
．． A comparison is made with the faulty address information held in M52.

Here, the comparator 56 sequentially compares the processing address by the CPU 26, the address data number, etc. from the control device 16, and determines whether these match the fault address information set in advance in the RAM 52 or are within a range of predetermined conditions. When it is confirmed that there is a failure detection signal, a failure detection signal is output to the logic circuit 54. In this case, logic circuit 54 connects C P via gate 28 to
At 026, the wait signal WA. It outputs IT and also interrupts the S CPU 32 via the bus line 34. That is, the logic circuit 66 constituting the gate 28 switches the selectors 60a to 60C by the select signal a, and connects the logic circuit 54 and the RAM 50 to the CPU 26. Then, the wait signal WAIT from the logic circuit 54 is transferred to the CPU 25 via the selectors 60a to 60C.
becomes a wait state. On the other hand, the S CPU 32 checks and stores the processing information of the CPU 026 secured in the RAM 50 based on the interrupt signal from the logic circuit 54.

Next, when a jump instruction at a specific address \, that is, an error processing instruction is found, a jump instruction is written to the RAM 50, and a recovery program for avoiding the error processing is written to the address of the RAM 50 specified by this jump instruction. is written, and the wait state of the CPU 26 is released via the logic circuit 54.

Next, the CPU 26 continues the processing operation by the control device 16 based on the recovery program stored in the RAM 50. That is, the CPU 26 selector 60a
through R.60c. The AM50 recovery program is executed and the control device 16 is activated via the selectors 62a to 62C.
A predetermined operation command is output to the In this case, the control device 16
continues operations such as image processing based on the recovery program secured in the RAM 50.

The maintenance personnel saves a trace of the data stored in the RAM 50 leading to the occurrence of the error on a floppy disk or the like, and uses it to investigate the cause of the failure and take recovery measures. Further, the CPU 26 can display an error message or the like on the console of the control device 16 based on the recovery program set in the RAM 50, and can suggest to the user how to handle the image in response to the occurrence of an error.

After setting the failure address information, the maintenance personnel restarts the system, and then, upon notification from the user that a failure has occurred, the maintenance personnel saves the trace of the data leading to the error occurrence stored in the RAM 50 on a floppy disk, etc. You may also pursue and analyze the cause of the failure.

On the other hand, the support device 8 that operates as described above can detect and recover from failures, and can also add functions to the control device 16 based on instructions from the keyboard 46. Therefore, next, a case in which this function is added will be explained. In this case, R of the support control board 22
AM36 stores the function addition program, while R
The AM52 has a function that allows the SCPU32 to execute the program when the processing address of the CPU26 reaches a specific address.
Set the address information to transfer to the other side.

Therefore, as an example of adding functionality, a case will be described in which processing for a plurality of pieces of image information is performed in parallel. in this case,
RAM 52 has CPU 26 and S CPU 3.
Information including specific address data for controlling the processing operation by No. 2 is set in advance.

In addition, the RAM 50 has a CPU 26 and an S CPU
32, information for performing parallel processing is set.

First, the C P 026 executes the original processing program until the image processing process is started.

In this case, the processing addresses and processing contents of the operation by the CPU 26 are sequentially stored in the RAM 50 via the gate 28, as in the case of detecting a fault described above. and,
When the processing address by the CPU 26 becomes the image processing address, the specific address stored in the RAM 52 and the processing address stored in the RAM 50 match in the comparator 56.

In this case, the comparator 56 outputs a match signal to the logic circuit 54, and the logic circuit 54 outputs a match signal to the gate 28 based on the match signal.
to connect the CPU 26 and RAM 50. Next, the CPU 26 transfers data necessary for image processing to be executed by the SCPU 32 from the control device 16 to the RAM 50 in accordance with the processing procedure set in the RAM 50. When the data transfer is completed, an interrupt signal INT from the logic circuit 54 causes the S C
An interrupt occurs to PU32. Therefore, SCP
U32 executes the function addition program installed in RAM36 according to the interrupt signal INT. In this case, S
The CPU executes RAM based on the function addition program.
50 data is subjected to predetermined image processing, and the processed data is stored in the RAM 50. During this time, CPU26
performs predetermined image processing on other image information based on the image processing program in the control device 16.

This performs parallel processing of images.

On the other hand, when the comparator 56 detects the specific address of the RAM 52 again, the CPU 26 reads the data processed by the function addition program stored in the RAM 50, transfers it to the control device 16, and then starts the next process in the control device 16. Move to action.

[Effects of the Invention] As described above, according to the present invention, a support device holding data at a specific address is connected to a predetermined control circuit constituting a radiation image information processing system, and a function addition program is applied to the support device. It is configured to be installed. in this case,
The system can perform parallel processing operations based on the existing program and the function addition program. This allows extremely efficient processing.

Although the present invention has been described above with reference to preferred embodiments, the present invention is not limited to these embodiments.
For example, the support control board can be applied to other devices such as image reading devices, image output devices, etc., and various improvements and design changes can be made without departing from the gist of the present invention. Of course.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram of a radiation image information processing system connected to a support device according to an embodiment of the present invention, FIG. 2 is a configuration block diagram of the support device shown in FIG. 1, and FIG. FIG. 2 is a configuration block diagram of a gate in the support device shown in FIG. 8... Support device 10... Imaging device 12... Subject 14
...image reading device 16...control device 18,
20... Image output device 22... Support control board 24... Control board 26... CPU32
...SCPU A...Storage phosphor sheet

Claims (1)

[Claims] (1) A support device connected to a radiation image information processing system that performs predetermined signal processing on a radiation image to obtain an image signal and forms a visualized image from the image signal, and that is a support device that is connected to a radiation image information processing system that performs predetermined signal processing on a radiation image and forms a visualized image from the image signal, and that is an address information setting means for setting address information of a specific address among the processing addresses of a predetermined program by the CPU; a function addition program storage means for storing a function addition program for the system; and a processing address by the CPU and the address information setting. a comparison detection means for sequentially comparing the address information set by the means and outputting a detection signal when processing information corresponding to the address information is detected, and based on the detection signal, the predetermined program and the function addition program. 1. A support device for a radiographic image information processing system, characterized in that it controls a function addition program stored in a storage means to be processed in parallel.