JPH02230472A - Binarizing circuit - Google Patents

Abstract

PURPOSE:To perform a proper binarizing operation by setting a binalizing level based on the value obtained by detecting the maximum and minimum values of a video signal for each scanning line. CONSTITUTION:A detection means 11 detects and holds the maximum and minimum values of a video signal for each scanning line. Based on these maximum and minimum values, a binarizing level is set by binalizing level setting means 12 and held. Based on the binarizing level, a binarizing means 13 binarizes the video signal which is later by one scanning line than the video signal that is used for setting the binarizing level. Thus the video signal is properly binarized despite the fluctuation of the video signal caused by the influence of the shading of an image pickup means, the illumination variance of a subject, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a binarization circuit that binarizes a video signal obtained by photoelectrically scanning an object with an imaging means.

[Conventional technology]

Conventionally, when an image is to be binarized in an image processing apparatus, for example, a light source illuminates the magnetic heads 1 and 2 having a gap 1 as shown in FIG. When a video signal obtained from this camera is to be binarized by scanning and imaging, the video signal is binarized by a binarization circuit at a preset and fixed binarization level. ing.

[Problem to be solved by the invention]

In the above-mentioned binarization circuit, the video signal is binarized at a preset and fixed binarization level, so the camera's own sheathing, that is, the unevenness of the output signal caused by the camera's decomposition characteristics, especially the lens characteristics. It is not possible to properly binarize the video signal due to the influence of the illumination unevenness of the object caused by the light source, etc.

For example, when a magnetic head 2 as shown in FIG. 4(a) is illuminated by a light source, the image is photoelectrically scanned and captured by a camera, and the video signal obtained from the camera is binarized. The video signal obtained from the camera has a waveform as shown in FIG. 4(d) at the scanning line ■■, and a signal delay DL occurs due to the influence of the resolution of the camera. When this video signal is binarized using the binarization level 1 which is set in advance and fixed as it is by the binarization circuit,
In the video signal after binarization, the width t of the portion corresponding to the gap 1 of the magnetic head 2 changes for each scanning line.
The image of the magnetic head 2 changes as shown in FIG. 4(f). Therefore, the gap 1 of the video signal after binarization is
When the width gt of gap 1 is measured by measuring the width t of the portion corresponding to gap 1, the measured value is
The width gt varies depending on the location where it is measured, resulting in poor measurement accuracy.

The present invention improves the above-mentioned drawbacks and provides a binarization circuit that can properly binarize a video signal even if the video signal fluctuates due to the effects of shading of the imaging means, uneven illumination of the object, etc. The purpose is to

[Means to solve the problem]

In order to achieve the above object, the present invention provides a binarization circuit that binarizes a video signal obtained by photoelectrically scanning an object with an imaging means, as shown in FIG. A detection means 11 detects and holds the value and minimum value for each scanning line, and a binarization level is set based on the maximum value and minimum value of the video signal detected and held by this detection means 11. By using the binarization level setting means J2 that sets the binarization level to Hall 1, and the binarization level set and held by the binarization level setting means L2, one scan is obtained from the video signal used for setting the binarization level. A binarizing means 13 is provided for binarizing the video signal after the line segment.

[For production]

The detection means l1 detects and holds the maximum value and minimum value of the video signal for each scanning line segment, and the binarization level is set based on the maximum value and minimum value by the binarization level setting means 1.
2 and is set to hole 1. Based on the binarization level set and held by this binarization level setting means l2, the binarization means J3 converts the video signal one scanning line later than the video signal used for setting this binarization level into two. Value.

〔Example〕

FIG. 2 shows an embodiment of the present invention, and FIG. 3 is a timing chart thereof.

A subject 2 consisting of a magnetic head having a gap 1 is illuminated by a light source (not shown), and an imaging means 2 consisting of a camera
1 to photoelectrically scan and image. This camera 2
The video signal a obtained from 1 includes the horizontal synchronizing signal b, and is clamped at a certain DC level by the video clamp circuit 22. This is the horizontal synchronization signal b as shown in Figure 3.
Since the bottom part of the screen is never lower than this part, the reference level of the signal that determines the average brightness of the entire screen (
The clamp level is C). However, since the overall level of the video signal a fluctuates, in order to remove this, the video signal a is fixed at a clamp level C, that is, the bottom portion of the horizontal synchronization signal b is made constant. ,
The DC level of the video signal a is superimposed to form a waveform as shown in FIG.

Further, the video signal a obtained from the camera 21 is separated by the synchronization separation circuit 23 into the video signal a and the horizontal synchronization signal b.

The processing range setting circuit 24 sets a window W for image processing based on the horizontal synchronization signal b from the synchronization separation circuit 23. That is, the processing range setting circuit 24 generates clock pulses as shown in FIG. 3 using the rising edge of the horizontal synchronizing signal b from the synchronizing separation circuit 23 as a reference point d, and starts counting the clock pulses h. Then, the processing range setting circuit 24 counts N clock pulses from this base point d. After counting, a signal is sent to the gate 1 to the circuit 25 again to cause the gate 1 to close the circuit 25.

The gate circuit 25 is opened for a certain period of time by a signal from the processing range setting circuit 24, and during this period the video clamp circuit 2
From the video signal a from 2, only the video signal within the window is selected and output to the peak hold circuit 26 and the bottom hold circuit 27.

As a detection means for detecting and holding the maximum value and minimum value of the video signal a, a peak hold circuit 26 and a button 1-
A multihole circuit 27 is used.

The peak hole 1 circuit 26 detects the peak value e within the window from the video signal a from the game 1 circuit 25, and holds (memory) this peak value e. In addition, the box 1 to hold circuit 27 receives the video signal a from the case I to circuit 25.
Detects the bottom value f within Win1-U, and selects this button1-U.
The program value f is stored in hole 1 (memory).

A difference circuit 28 serves as a binarization level setting means for setting a binarization level based on the maximum value (peak value e) and minimum value (bottom value 1 to bottom value f) and performs hole 1-.
n) Arithmetic circuit 29 is used. Differential circuit 28
calculates the difference between the peak value e and bottom value f from the peak hold circuit 26 and bottom hold circuit 27. Here,
The peak hold circuit 26 and the bottom hold circuit 27 are activated by the control signal generation circuit 30 at the falling edge of the horizontal synchronizing signal b.
The difference circuit 28 outputs the hold values e and f by inputting the signal from Output.

(Bottom value 1,000 difference/n) The arithmetic circuit 29 calculates 1/n of the difference (ef) from the difference circuit 28 and adds the hold value f of the bottom hole 1-circuit 27 to this difference/n. The value of n can be set to any value of rl≧1. For example, in this embodiment, n is set to 2, which is an intermediate value between the peak value e and the bottom value f. Note that n≧1 is set because the binarization level must be between the peak value e and the bottom value f. That is, if n is larger than the peak value e, the entire screen will be white even if the video signal a is binarized, and conversely, if n is smaller than the bottom value f, the entire screen will be white even if the video signal a is binarized. This is because it becomes black. In addition, in this example, n=2 because the peak value e
Alternatively, since accurate binarization processing of the video signal a is not performed in the vicinity of the frame value f due to the influence of noise contained in the video signal a, an intermediate position where the influence of this noise is small, That is, n is set to 2.

``Binarization level hold circuit 3'' is (Bo1 hem value + difference/
n) Hold the value obtained by the arithmetic circuit 29 (memory)
At the same time, it is output to the binarization circuit 32. The output of this binarization level hold circuit 3 becomes the binarization level h in the next horizontal scan.

The control signal generation circuit 30 resets the hold values e and f of the peak hold circuit 26 and bottom hold circuit 27 based on the horizontal synchronization signal b from the synchronization separation circuit 23 in preparation for the next horizontal scan, and also generates a binary signal. Create a timing to halt the conversion level h.

Specifically, the control signal generation circuit 30 sends a signal to the peak hold circuit 26 and the bottom hold circuit 27 at the falling edge g of the horizontal synchronization signal b from the synchronization separation circuit 23, and calculates the respective hold values e and f to the difference circuit. 28, and 2
A signal is sent to the value conversion level hold circuit 31 and the value obtained by the arithmetic circuit 29 is sent to the hall 1.
・Let Further, the control signal generation circuit 30 sends a signal to the peak hold circuit 26 and the bottom hold circuit 27 at the rising edge of the horizontal synchronization signal b from the synchronization separation circuit 23 (basic point d), and sends a signal to each of the hold values e and f. Reset 1~,
Prepare for the next horizontal scan.

The binarization processing circuit 32 is used as a binarization means. This binarization processing circuit 32 processes the video signal from the video clamp circuit 22 for each scanning line segment in the previous horizontal scan and obtains a binary level from the binarization hold circuit 31.
A binarization level holding circuit 3 performs binarization processing based on the digitization level, that is, the video signal from the video clamp circuit 22 is determined for each scanning line from the video signal one scanning line before the video signal.
Binarization processing is performed using a binarization level starting from 1. The binarized video signal from this binarization processing circuit 32 is input to the next image processing system 1133. In this way, the video signal is binarized using the binarization level found from the video signal one scanning line before, so the binarization level is calculated from the video signal a and the video signal is binarized. Image processing speed is faster than when

The image processing system 33 performs image processing based on the binarized data from the binarization processing circuit 32.

In this embodiment, a magnetic head 1 having a gassock 1 as shown in FIG.
The video signal obtained from the scanning line ■■ is shown in Figure 4 (b).
The waveform becomes as shown in , and only the portion within the window 1-W set by the processing range setting circuit 24 is extracted and used for setting the binarization level. As shown in FIG. 4(c), the video signal obtained from the camera 21 has a delay 1) 14 due to the influence of the resolution of the camera 2, but the binarization level is determined by the difference between the peak value e and the bottom value J. Find h1
Since the video signal is binarized after the scanning line, the video signal can be binarized accurately and the images of magnetic heads 1 and 2 will be as shown in FIG. 4(e). It is accurately binarized. Therefore, when the width gt of gap 1 is measured by measuring the width t of the portion corresponding to the gap of the video signal after binarization, the measured value changes depending on the location where the width gt of gap 1 is determined. This increases measurement accuracy.

[Effects of the Invention] As described above, according to the present invention, in a binarization circuit that binarizes a video signal obtained by photoelectrically scanning an object with an imaging device, the maximum value and the minimum value of the video signal can be value and 1
A detection means that detects and holds each scanning line segment, and a binarization that sets a binarization level based on the maximum and minimum values of the video signal detected and held by this detection means and performs hole 1-binarization. The level setting means and the binarization level set and held by the binarization level setting means binarize the video signal that is "scanning lines later" than the video signal used to set the binarization level. Since the present invention is equipped with a binarization means to do this, it is possible to appropriately binarize the video signal even if the video signal fluctuates due to the influence of shading of the imaging means, illumination of the object, etc.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the present invention, FIG. 2 is a block diagram showing an embodiment of the present invention, FIG. 3 is a timing chart 1- of the same embodiment, and FIG. 4 (J) to ( f) is a diagram for explaining the same embodiment and the conventional circuit.

Claims (1)

[Claims] In a binarization circuit that binarizes a video signal obtained by photoelectrically scanning an object with an imaging means, the maximum value and minimum value of the video signal are detected and held for each scanning line. A detection means, a binarization level setting means for setting and holding a binarization level based on the maximum value and minimum value of the video signal detected and held by the detection means, and the binarization level setting means. and a binarization means for binarizing a video signal one scanning line later than the video signal used to set the binarization level using the binarization level set and held. A binarization circuit that does this.