JP2858796B2 - Image input device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image input device, and more particularly to an image input device such as an image scanner and an optical character reading device that reads an image on a document using an optical lens. .

[Conventional technology]

In this type of image input device, an optical image on a document is formed on an image sensor such as a one-dimensional CCD image sensor by an optical lens, and a video signal is obtained by photoelectric conversion.

In order to obtain a clear optical image on the image sensor, it is necessary to adjust the focus of the optical lens.

[Problems to be solved by the invention]

As a method of confirming and adjusting whether or not the subject is in focus, scanning of a lattice pattern as shown in FIG. 2 is performed, and the obtained video signal is observed. Then, it is confirmed that the amplitude on the video signal corresponding to the lattice pattern has a constant value. If the value does not become constant, one of the directions in the optical axis of the lens is adjusted.

However, in this method, it is necessary to connect an oscilloscope to a test terminal or the like in order to observe a video signal each time focus confirmation and adjustment are performed. Therefore, there is a problem that it takes time to confirm, adjust, and prepare the focus. Further, there is a disadvantage that the focus cannot be confirmed and adjusted without knowing the internal knowledge of the apparatus and the operation method of the oscilloscope.

[Means for solving the problem]

In order to solve the above problems, the present invention is to form an optical image of the document surface on a one-dimensional image sensor with an optical lens,
Means for photoelectrically exchanging a grid pattern, means for detecting the envelope level of the ground color of the grid pattern from the photoelectric conversion signal obtained by the photoelectric conversion means, A level dividing means for dividing an output level obtained by the level detecting means at a ratio of a plurality of rows, a means for comparing each output level obtained by the level dividing means with the photoelectric conversion signal, and performing binarization; Means for calculating the number of electrical grid patterns obtained by the binarizing means, means for comparing the count value with a predetermined number of grid patterns of the object, and matching by the comparing means. And a display means for displaying a match when is detected.

〔Example〕

 Next, an embodiment of the present invention will be described.

FIG. 1 shows an embodiment of the present invention. In the figure, the light reflected from the surface of the original 16 is imaged on the CCD image sensor 12 by the optical lens 11. The video signal output from the CCD image sensor 12 is input to the sample / hold circuit 14 via the amplifier 13. Since the video signal output from the CCD image sensor 12 is output discretely for each surface element of the CCD, the sample and hold circuit 14 performs sample and hold for each pixel to make a continuous video signal 100.

The envelope detection circuit 1 detects a ground level envelope of a video signal. FIG. 6 shows an example of the envelope detection circuit. Details of the circuit will be described later.

The resistance voltage dividing circuit 2 outputs two divided voltage signals 102 and 103 whose amplitudes are similar to the document ground level by the resistance voltage division from the envelope signal 101, that is, the signal indicating the ground level of the document.

Voltage divider circuit outputs 102 and 103 are input to comparison circuits 3 and 4. In the comparison circuits 3 and 4, the voltage dividing circuit outputs 102 and 103
Are compared with the video signal 100. If the level of the latter is lower than the former, the outputs 104 and 105 are set to "high", and if the level is higher, the output is set to "low".

The counting circuits 5 and 6 are reset to the count value “0” by the scanning synchronization signal 112, and thereafter count the number of rises of the comparison circuit outputs 104 and 105 from “low” to “high”.
In the comparison circuits 7 and 8, the outputs 107.1 of the counting circuits 5 and 6 are output.
08 is compared with a preset numerical value 106. Here, the number 106 is set to the number N of the grid patterns, and if the comparison results in a match, the outputs 109 and 110 become “high”.

The AND operation circuit 9 performs an AND operation on the comparison circuit outputs 109 and 110, and outputs the output signal 11 only when both are "high".
1 is set to “low”, and the LED 10 is turned on.

In addition, the image sensor timing generation circuit 15
A drive pulse 113 such as a scan synchronization signal and a charge transfer clock is supplied to the D image sensor 12.

Now, it is assumed that a lattice pattern having a spatial frequency of K line pairs / mm and perpendicular to the scanning direction is printed on the document as shown in FIG. When this pattern is scanned along the arrow in FIG. 3, a video signal as shown in FIG. 3 is obtained. On the video signal, an amplitude is generated corresponding to the black and white of the lattice pattern on the document. When the optical lens 11 is in focus, the maximum value and the minimum value of the amplitude have a fixed ratio to the ground level of the video signal. It is assumed that each output of the resistance voltage dividing circuit 2 shown in FIG. 1 is set in advance so as to be substantially equal to the ratio between these two. That is, as shown in FIG. 3, the voltage dividing circuit output 102 has a voltage dividing ratio equal to a ratio A% smaller by a certain margin than the maximum value of the amplitude when the focus is in focus, and only a certain margin from the minimum value. It is assumed that the voltage dividing circuit output 103 is set to a voltage dividing ratio that provides a large ratio B%.

FIGS. 4 (a) to 4 (c) show signal waveforms at various points when the object is in focus. Video signal 100, envelope signal 10
1. The relationship between the voltage dividing circuit outputs 102 and 103 is as shown in FIG. 4 (b). As shown in the figure, since the maximum value of the amplitude for the grid pattern is all larger than the output of the voltage divider circuit 102 and the minimum value is all smaller than the output 103 of the voltage divider circuit, the grid pattern N corresponding to the amplitude of
A book pulse appears.

The counting circuits 5 and 6 count the number of rises of the comparison circuit outputs 104 and 105, and output a count value N at the rear end of the grid pattern. The state of the outputs 107 and 108 of the counting circuit at this time is shown in FIG. Thereafter, the count value N is held until the end of one scan.

The comparison circuits 7 and 8 compare the counting circuit outputs 107 and 108 with a preset value 106. In this case, since both of them are the counting value N, the outputs 109 and 110 are set to “high”. Then, both the comparison circuit outputs 109 and 110 are “high”.
, The AND operation circuit 9 sets the output 111 to “low”,
Turn on ED10.

FIGS. 5A to 5C show the state when the lens 11 is out of focus. In this case, the amplitude corresponding to the lattice pattern becomes small as shown in FIG. 5B even when the lattice pattern shown in FIG. Therefore, even if N grid patterns are scanned as shown in FIG. 5C, N pulses corresponding to the amplitudes do not appear in the comparison circuit outputs 104 and 105. Therefore, since the outputs 107 and 108 of the counting circuits 5 and 6 do not become equal to the count value N, the comparison circuits 7 and 8 cannot match the set value 106, and the AND operation circuit output 111 also remains “high”. , L
ED10 does not light.

As described above, if the lens 11 is in focus, the LED 10
Is turned on, it is possible to determine whether or not the lens 11 is in focus based on the lighting state of the LED 10. Further, when the focus is out of focus, the focus of the lens 11 may be adjusted so that the LED 10 is turned on. The focus adjustment of the lens 11 is the first
Distance l between lens 11 and CCD image sensor 12 in the figure
Can be adjusted.

 Finally, the envelope detection circuit shown in FIG. 6 will be described.

In the figure, assuming that the resistor 61 is sufficiently smaller than the resistor 64, the time constant of the integrating circuit including the resistor 61, the diode 62 and the capacitor 63 is small, and the output signal 101 follows the rapid increase of the input signal 100. On the other hand, the time constant of the integrating circuit consisting of the capacitor 63 and the resistor 64 is large, and the output signal 1
01 cannot follow, and the output level immediately before is maintained. This makes it possible to detect the level of the ground of the document. The constant voltage source 65 in FIG.
This is for canceling the voltage drop of 62.

〔The invention's effect〕

As described above, according to the present invention, it is not necessary to connect a measuring instrument such as an oscilloscope to a test terminal or the like of the apparatus every time the focus of the lens is adjusted and confirmed, and the confirmation of the focus state does not take much time. There is an effect that it can be performed at a glance.

Further, since there is no need to connect an oscilloscope or the like with the apparatus, there is also an effect that the focus state of the apparatus can be confirmed even by a person who is not familiar with the inside of the apparatus and the operation of the oscilloscope.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is an explanatory diagram showing a document and a lattice pattern on the document used for focus adjustment and confirmation of a lens, and FIG. 4 (a) to 4 (a) are explanatory diagrams showing the relationship between the amplitude of the lattice pattern of the video signal and the output of the voltage dividing circuit when they match.
(C) shows the waveform of each part when the lens is in focus. 5 (a) to 5 (c) are explanatory diagrams showing waveforms of respective parts when the lens is out of focus, and FIG. 6 is a circuit diagram showing an envelope detection circuit in the present embodiment. 1 ... Envelope detection circuit, 2 ... Resistor voltage divider circuit, 3/4.
7.8 Comparison circuit, 5.6 Count circuit, 9 AND operation circuit, 10 LED, 11 Optical lens, 12 CCD
Image sensor, 13: Amplifier, 14: Sample and hold circuit, 15: Timing generation circuit, 16: Document.

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Yoshiro Neo 5-7-15 Shiba, Minato-ku, Tokyo NEC Robot Engineering Co., Ltd. (56) References JP-A-60-191598 (JP, A) 61-78473 (JP, U) (58) Fields investigated (Int. Cl. ⁶ , DB name) G06K 9/20 H04N 1/04 G06T 1/00

Claims (1)

(57) [Claims] 1. An image input apparatus for forming an optical image of a document surface on a one-dimensional image sensor by an optical lens and performing photoelectric conversion to obtain a video signal, comprising: means for photoelectrically exchanging a lattice pattern; Means for detecting the envelope level of the ground color of the lattice pattern from the obtained photoelectric conversion signal, level dividing means for dividing the output level obtained by the ground color level detecting means at a plurality of different ratios, and the level dividing means Means for comparing each of the obtained output levels with the photoelectric conversion signal and binarizing the data; means for calculating the number of electrical grid patterns obtained by the binarizing means; Means for comparing the number of grid patterns which are the objects to be set, and display means for displaying the coincidence when a match is detected by the comparing means. Image input device that features a door.