JPH0223036A - Power factor regulating method - Google Patents

Abstract

PURPOSE:To prevent hunting corresponding to different capacitors by providing a step for operating a throw-in point and an interrupting point based on set values. CONSTITUTION:An operating section 31 reads in set values from a setting section 30 as well as reactive power and load current detected respectively through a reactive power detecting section 4 and a load current detector 5 and operates a throw-in point QT, an interrupting point QC, interruption current IC, reclosing current IT and reactive factor sintheta. When the load current I increases from below the interruption current IC and exceeds over the reclosing current IT, the process goes to a control step. If the reactive power theta is leading and exceeding over the interruption point QC, an interruption signal is fed to a relay circuit 20 in order to interrupt a specific capacitor. When the reactive power is lagging and exceeding over the throw-in point QT, a specific capacitor is thrown in. Cyclic control is made for identical capacity of capacitors C1-CN while priority control is made for different capacity where throw-in and interruption sequences are reversed, thus preventing the power factor from leading or lagging.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention provides a power factor adjustment method that automatically improves the power factor of an electric circuit by turning on or off a plurality of capacitors depending on the reactive components of the electric circuit. In particular, the present invention relates to a power factor adjustment method that is easy to handle and highly reliable.

[Prior Art] FIG. 5 is a block diagram showing a general power factor adjustment device described in, for example, Japanese Patent Publication No. 47823/1982 and Japanese Patent Publication No. 11058/1981.

In the figure, (1) is an electric circuit, (2) is an electric circuit (1
), (3) is an electrical circuit (
1) instrument current transformers, (T1) and (T
2) is the transformer connected to the electric circuit (1), (R1) and (R2) are the loads connected to each transformer (T1) and <T2), and (B1) to (BN) are the electric circuit ( 1) a plurality of electromagnetic contactors connected to the electromagnetic contactors (Ll) to (LH) are series reactors connected to each of the electromagnetic contactors (B1) to (BN),
(C1) to (CN) are each series reactor (Ll) to (L
N) are connected to multiple capacitors for power factor correction.

(4) is a reactive power detection unit that outputs a voltage signal proportional to the reactive power Q of the electric circuit (1) based on each output from the voltage transformer (2) and the voltage current transformer (3); 5) is an electric circuit (1) based on the output from the instrument current transformer (3).
This is a load current detection section that detects a load current I flowing through the load current I.

(6) is a closing point setting device that sets the closing point QT of capacitors (C1) to (CN), and (7) is a capacitor < CI) to
Breaking point setter for setting the breaking point Qc of (CN), (8)
is a current setting device that sets the cut-off current IC, which is a criterion for determining a low-load layer, (9) is a comparator that outputs an on signal when reactive power Q is higher than the input point QT, and (10> is reactive power Q (11) is a comparator that outputs an on signal when the load current (■) is lower than the cutoff current (■c), (12) is a timer circuit,
(13) is a timer setter that sets the operation timing of the timer circuit (12).

(14) is an input AND gate that takes a logical term between the output of the comparator (9), the inverted output of the comparator (11), and the output of the timer circuit (12); (15) is the input gate for the comparator (10) and (1
(16) is an AND gate for logical ANDing of each output of OR-1-(15) and timer circuit <12), (17) is a cut-off AND gate that takes the AND of each output of OR-1-(15) and timer circuit (12), and (17) is a comparator ( This is an OR gate that calculates the logical sum of the respective outputs of 9) to (11) and releases the timer circuit (12) when any of them is on.

(18) is an input 111ff sequential circuit energized by the output of the AND gate (14), and the capacitor (C1) to
The capacitor to be inserted (connected to the electric circuit) is selected from among (CN). (19) is a cut-off sequential circuit energized by the output of AND gate (16), which selects four capacitors to be cut off (cut out from the electrical circuit) from among capacitors (C1) to (CN). It looks like this.

(20) is a turn-on sequence circuit (18) and a cut-off sequence circuit (1
The relay circuit driven by the output of 9), (^1) ~ (
8N) is a relay contact provided corresponding to the capacitors (C1) to (CN) and selectively energized or deenergized by the relay circuit (20). (21) is a relay contact (^1
) to (8N) according to the output of electromagnetic contactors (B1) to (B
This is the control circuit section that controls the opening and closing of each capacitor (N).
C1) to (CM>) are selectively connected or disconnected from the electric circuit (1).

Next, the operation of the conventional power factor adjusting device shown in FIG. 5 will be explained. The turning point Qt and the breaking point Qc are determined by the capacitance of the capacitors (C1) to (CN), the composite transformation ratio of the voltage transformer (2) and the current transformer (3), and the load (R1).
) and (R2) are calculated and set in advance based on the load factors, etc.

First, the reactive power detection unit (4) detects the electrical circuit (1) in operation.
The reactive power Q is detected and inputted to the comparison terminals of comparators (9) and (10), and the load current detection section (5) detects the load current ■ and inputted to the comparison terminal of the comparator (11). . Closing point setting device (6), breaking point setting device (7) and current setting device (8)
) are the closing point QT, the breaking point Qc, and the breaking current ■ to each reference terminal of the comparators (9), (10), and (11), respectively.
Input the voltage signal corresponding to c.

Now, when the load current I is greater than or equal to the breaking current Ic, the comparator (11
) is turned off. Here, the reactive power Q is the input point Q
If it is higher than T, the output of the comparator (9) is turned on and the reset state of the timer circuit (12) is released via the OR gate (17). The timer circuit (12) outputs an on signal after the time set by the timer setter (13) has elapsed, turns on the output of the AND gate (14), and energizes the input sequence circuit (18). As a result, the relay circuit (20
) selectively energizes relay contacts (^1) to (^N),
Capacitor (C
1) A predetermined capacitor selected from among (CN) is connected to the electric circuit (1).

Also, if the reactive power Q is lower than the cutoff point Qc, the comparator (
The output of 10) turns on, and the OR gates (15) and (1
7), the cut-off sequential circuit (19) is activated via the timer circuit (12) and the AND gate (16). Due to this.

The relay circuit (20) selectively deenergizes the relay contacts (^1) to (8N), and removes the capacitor selected from the capacitors (C1) to (C14) from the electrical circuit (1). .

On the other hand, in the case of a light load when the load current ■ is lower than the breaking current IC, the output of the comparator (11) turns on and
The timer circuit (12) is activated via (17), and the output of the anime game-1-(14) is turned off.

When the output of the timer circuit (12) turns on after a predetermined period of time has elapsed, the on signal of the comparator (11) turns on (or game) (15
) and the AND gate (16) to block the sequential circuit (1
9) and sequentially disconnect the capacitors (C1) to (CN) from the electric circuit (1).

By turning on or cutting off the capacitors (C1) to (CM>) in this way, the power factor of the electric circuit (1) is automatically improved.In addition, as a reactive component of the electric circuit (1), the reactive power The same applies when reactive current, power factor, etc. are detected instead.

[Problems to be Solved by the Invention] As described above, in the conventional power factor adjustment method, the closing point Qr and the closing point Qc are set in advance, which requires troublesome calculations, and the set values are fixed. Capacitor (C1)
There was a problem that adjustment control could not be performed unless ~(CI) had the same capacity.

In addition, at light loads, capacitors (C1) to (CN) are controlled to be cut off based on the load current, regardless of reactive power, so hunting operations due to frequent on/off of the capacitors and excessive lag in the power factor due to capacitor cutoff are avoided. There was a problem in that it invited

This invention was made to solve the above-mentioned problems, and aims to provide a power factor adjustment method that can accommodate capacitors of different capacities, has easy setting operations, and can prevent hunting operations. .

[Means for Solving the Problems] A power factor adjustment method according to the present invention includes a step of calculating a turning point and a cutting point based on set values including a composite transformation ratio.

Moreover, a power factor PI adjustment method according to another invention of the present invention is as follows.

A step of calculating the closing point, the breaking point, the breaking current, and the breaking current or more based on the set value including the composite transformation ratio; The second step is to determine whether the load current has increased from below the cut-off current to whether it has exceeded the re-opening current, and only when the load current exceeds the re-close current, the capacitor is and a step for enabling input control.

[Function] In this invention, the input point and the cut-off point are automatically calculated by simply setting the value of the composite metamorphic ratio, etc., so the setting operation is easy and no setting errors occur.

Further, in another invention of the present invention, by comparing with the re-opening current which is higher than the breaking current after the light load operation control,
Reduces the number of times the capacitor is turned on and off to prevent hunting, etc.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
The figure is a block diagram showing a power factor control device to which an embodiment of the present invention is applied.
20) is the same as described above, and the structure not shown is as shown in FIG.

(30) is a setting section for setting the capacitance and transformation ratio of capacitors (C1) to (CM), and (31) is a reactive power detection section (4
), an arithmetic processing unit that controls the relay circuit (20) based on the output signals of the load current detection unit (5) and the setting unit (30), and (32) a calculation processing unit that controls the instantaneous value of reactive power Q and the arithmetic processing unit (31).
) is a display unit that sequentially displays the calculation results etc.

Next, an embodiment of the present invention will be described with reference to the flowchart of FIG. 2 showing the operation of the arithmetic processing section (31).

Note that the setting section (30) includes capacitors (C1) to (CN
), the set values for the capacity, synthetic transformation ratio, load factor, demand factor, etc. are set in advance, but these are values that are almost automatically determined, so the setting operation is easy and there is no risk of setting errors. Further, necessary calculation programs and the like are stored in advance in the calculation processing section (31).

First, the arithmetic processing unit (31) reads the setting values from the setting unit (30) along with the reactive power Q and load current I detected by the reactive power detection unit (4) and load current detection unit (5) ( Step Sl), the turning point Qr and breaking point Qc for the reactive power Q, the breaking current IC and the re-turning current I7 for the load current I, the inefficiency sin θ, etc. are calculated (Step S2).

In general, active power W, delayed reactive power Q and power factor eO5θ
Between, Q = W X [(1/cos”θ) l] l/2
The following relationship holds true. Here, cosθ≧0.995, that is, power factor of 99.5% or more is rounded to 100%.
The delayed reactive power Q at this time is Q! =iWX
0.1 ”'■.

In addition, the demand factor KJ, the load factor KR, and the maximum demand power P,
Between the installed capacity PC1 and the average power PA for the period, K J = (P M / P c) x 100 -
・・■KR-(PA/PM)X100 ,,,
The relationship ■ holds true. From ■ and formula 0, maximum power demand P
, and the average power PA is P , = P cX K , 7x too
...■P A= PMX KRX 100
−Represented by @. Here, the installed capacity pc equivalently corresponds to the composite transformation ratio, and the maximum demand power P and average power PA are the values calculated from the load current I or the demand rate, I and the load rate KR. Determined from. Therefore, as the value of the active power W in formula (■), the value PM or P obtained by formula 0 or formula
By substituting A, the input point QT can be found.

At this time, which one to substitute is determined by information from the setting section (30). Also, capacitors (C1) to (C
The input point Q calculated from the value obtained by multiplying the capacitance IC of the next capacitor in N) by the anti-hunting coefficient and the formula
The cutoff point Qc is determined by the sum with T.

In addition, the control center line for determining the turning point QT and the cutting point Qc is set in advance within the setting 1v (30), and the turning point QT and the cutting point Qc are determined based on the capacitor capacity C and the reactive power Q. May be set. For example, compare the absolute value Q0 of the leading reactive power before shutting off the capacitor with the absolute value Q of the lagging reactive power after shutting off, Q,=Q.

In this case, a cutoff point Qc can be set to cut off the capacitor. If you want to control the power factor in a more advanced manner, just multiply the value of the leading reactive power Qo corresponding to the cutoff point Qc by a coefficient α〈〉1).On the other hand, if you want to control the power factor more slowly may be multiplied by a coefficient β (<1).

Next, it is determined whether the load current (■) is greater than or equal to the breaking current IC (step S3), and if the load current (I) is greater than or equal to the breaking current Ic, the load current I
It is determined whether or not the load current has increased from below the breaking current 1c (step S4). If the current has increased from below the breaking current Ic, it is further determined whether the load current has exceeded the re-opening current I7. If it is determined that the re-turning current I7 is exceeded (step S5), the process proceeds to the next step S6.

In step S4, if it is determined that the load current ■ has increased from below the interrupting current Ic (after the interrupting control during light load), it is possible to close only when it is determined in step S5 that the re-energizing current exceeds I7. It is now possible to proceed to the next control step.

The values of the cut-off current Ic and the re-opening current I7 are calculated in step S2, and the cut-off current rc is determined by combining the calculated cut-off point Qc or the cut-off point Qt, whichever has a larger absolute value, with the combined transformation ratio and the measured circuit voltage. It is found by dividing by V. The breaking current IC at the light load breaking level is a value corresponding to the capacitor capacitance C, and the turning point Qt and the breaking point Qc
It can be calculated and changed depending on the value of . Further, the re-turning current 11 is set to be equal to or higher than the interrupting current IC by multiplying the interrupting current 1c by 2I/2, for example, and gives hysteresis to the interrupting current IC to prevent hunting.

Next, it is determined whether the reactive power is advancing or not (step SO)
, if the reactive power Q has exceeded the cutoff point Qc, it is determined in step S7), and if it has exceeded it, a cutoff signal is output to the relay circuit (20) to cut off the required capacitor (step S8). ), if not exceeded, the process returns to step S1.

In step S6, it is determined that there is no advance (delay).
If not, it is determined whether or not the reactive power Q exceeds the input point QT (step S9), and if it exceeds the input point Qt, an input signal is output to input the required capacitor (step 510). Also, if the limit has not been exceeded, return to the start.

In the on/off operations in steps S8 and S10, if the capacitances of the capacitors (C1) to (CM) are all equal, cyclic control is performed to equalize the number of on/off times, and if the capacitances are different, a small capacitance Priority control is performed in order from the capacitors onwards, and the turn-on and turn-off orders are reversed to prevent the occurrence of extreme leading or lagging power factors during light loads.

If it is determined in step S4 that the load current I has not increased from below the cutoff current ■c (the cutoff is not due to a light load), the process proceeds to step S6.

If it is determined in step S3 that the load current I is less than or equal to the cutoff current 1c, it is determined whether or not the reactive power Q is ahead (step 511); if it is delayed, the process returns to step S1; if it is ahead, it is inefficient. Determine whether sin θ is greater than or equal to the calculated value (step 512). If it is less than the calculated value, return to step S1; if it is greater than or equal to the calculated value, proceed to step S8 and sequentially shut off capacitors (C1) to (CM). do. As a result, the load current I is cut off; even if the current I is less than the current IC, if the inefficiency sin θ is smaller than the calculated value, the capacitors (CI) to (CN) are not cut off, and the power factor eollθ
Too much delay will not occur.

Incidentally, the inefficiency sin θ is obtained by dividing the reactive power Q by the apparent power obtained by multiplying the load current ■ by the measurement circuit voltage V, and is expressed as sin θ=Q/VI. Further, the calculated value of inefficiency can be found by dividing the cutoff point Qc by a value corresponding to the capacitance C. Therefore, step S12 determines whether Q/VI≧Qc/C. At this time, the capacitor capacitance C in the inefficiency calculation value (Qc/C) that serves as the judgment criterion may be a set value, or may be a value (τC) multiplied by an arbitrary coefficient τ. FIGS. 3 and 4 are explanatory diagrams schematically showing control regions, with active power W taken on the horizontal axis and reactive power Q taken on the vertical axis.

The control area is cutoff point Qc, closing point QT, cutoff 1! flow lc
For example, FIG. 3 shows a case where the absolute values of the cutoff point Qc and the closing point QT are equal, and FIG. 4 shows a case where they are different.

In the figure, a semicircle E indicates a light load region with a radius corresponding to the breaking current tc, and in FIG. In the figure, the center point is a midpoint M between the cutoff point Qc and the input point QT.

(40) is a straight line corresponding to the judgment criterion (inefficiency calculation value) in step S12, and the shaded part (41) is light load operation interruption control when the cutoff point Qc is below and the inefficiency calculation value (40) is above!
The shaded area (42) in the ¥ range is a light load non-closing control area within the semicircle E and below the closing point Qr. Therefore, the cutoff control area is expressed as the sum of the area above the cutoff point Qc and the light load cutoff control area (41), and the closing control area is expressed as the sum of the area above the cutoff point Qc and the cutoff control area (41) at light load.
It is expressed as an area obtained by subtracting the light load non-control area (42) from the area below r. Further, the area sandwiched between the shutoff control area and the closing control τ area is a non-control area. The width of this uncontrolled region is, for example, equal to the radius of the semicircle E, that is, the interrupting current IC.

In the above embodiment, the area of the capacitors (C1) to (CN) is set in the setting section (30), but the capacitor capacitance C
can be calculated by comparing the reactive power before and after turning on, so this expression 'H,tI! Calculating function #(3
If it is included in 1), there is no need to set it in particular.

In addition, although the case where one power factor adjustment device is controlled has been described, multiple power factor adjustment devices are controlled via an external central control device W (not shown), and each power factor adjustment device is controlled individually. The number of banks may be expanded by prioritizing input (or shutoff).

In this case, each arithmetic processing unit is provided with a prohibition command interface for receiving the prohibition command from the central control unit, and the closing is completed when all capacitors under the control of one arithmetic processing unit are turned on (or shut off ffr). The signal (or shut-off completion signal) may be output to the central control unit, so that the central control unit prohibits input to the arithmetic processing unit (31) that is currently outputting the shut-off completion signal (or shut-off completion signal). A command (or shutoff prohibition command) is output, and the power factor adjustment device that has been turned on (or shut off) is not turned on (or shut off).

[Effects of the Invention] As described above, according to the present invention, since the step of calculating the turning point and the cutting point based on the setting value including at least the composite transformation ratio is provided, it is possible to control any number of capacitors, and the setting This has the effect of providing a power factor adjustment method that is easy to operate and manage.

According to another invention of the present invention, the step of calculating the closing point, the breaking point, the breaking current, and the re-turning current that is higher than the breaking current based on a set value including the composite transformation ratio; a step of determining whether the load current has increased from below the cutoff current in the case of
? A step is provided in which it is determined whether the re-turning current has been exceeded when the load current has increased from below the It current, and the capacitor closing control is enabled only when the load current exceeds the re-turning current. Time 3I! ! This has the effect of providing a power factor adjustment method that can prevent hunting and the like by reducing the number of on-off repetitions due to re-input after shutoff tIl.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a block diagram showing a power factor adjustment device to which an embodiment of the present invention is applied; FIG. 2 is a flowchart showing the operation of the arithmetic processing section in FIG. 1; FIG. 3 is an explanatory diagram showing the control area of one embodiment of the present invention, FIG. 4 is an explanatory diagram showing the control area when the absolute values of the cutoff point and the closing point are different, and FIG.
The figure is a block diagram showing a general power factor adjustment device. (1)... Electric circuit (4)... Reactive power detection section (5)... Load current detection section (20)... Relay circuit (30)... Setting section (31)... Calculation Processing section (32)... Display section Q... Reactive power Qr... Turning point Qc... Cutting point ■.
...Load current IC...Breaking current 1,...
Re-turn on current (C1) to (CN)... Capacitor S2... Step S3 to calculate... Step S4 to compare load current with cut-off current
...Step S5 to determine after operation interruption control at light load...
- Step S6 of comparing the load current with the re-turning current. Sl
l...Step S7 to determine whether the reactive power is advancing...
・Step S9 of comparing the reactive power with the cut-off point...Step S12 of comparing the reactive power with the input point...Step of comparing the inefficiency with the calculated value Note that in the drawings, the same reference numerals indicate the same - or equivalent parts. show. City 2 figure 1 figure t: Electricity 9 dairy figure 3 side figure 4 figure t

Claims (10)

[Claims] (1) In a power factor adjustment method, a reactive component of an electric circuit is compared with a turning point and a cutting point, and a plurality of capacitors connected to the electric circuit are turned on or off depending on the magnitude of the reactive component. A power factor adjustment method comprising the step of calculating the turning point and the cutting point based on set values including a transformation ratio. (2) Comparing the reactive component of the electric circuit with the turning point and the breaking point, and comparing the load current of the electric circuit with the breaking current, and depending on the magnitude of the reactive component and the load current, In a power factor adjustment method for turning on or cutting off a plurality of connected capacitors, the turning point, the breaking point, the breaking current, and a re-turning current higher than the breaking current are set based on a set value including a composite transformation ratio. calculating whether or not the load current has increased from below the breaking current when the load current is above the breaking current; and when the load current has increased from below the breaking current A power factor characterized by comprising: determining whether or not the re-turning current has been exceeded, and enabling closing control of the capacitor only when the load current exceeds the re-turning current. Adjustment method. (3) A step of determining whether the inefficiency of the electric circuit is greater than or equal to the calculated value when the load current is less than the cutoff current and the reactive component is leading, and the capacitor is cut off when the inefficiency is greater than or equal to the calculated value. The power factor adjustment method according to claim 2, characterized in that the power factor adjustment method is controlled. (4) The power factor adjustment method according to claim 2 or 3, wherein the cut-off current is calculated based on the cut-off point or the turn-on point, whichever has a larger absolute value. (5) The power factor adjustment method according to claim 2 or 3, wherein the breaking current is calculated and changed depending on the turning point and breaking point. (6) The power factor adjustment method according to any one of claims 1 to 5, characterized in that the turn-on point and the cut-off point are calculated based on the capacitance of the capacitor to be controlled next. . (7) The power factor adjustment method according to claim 6, wherein the capacitance of the capacitor is set in advance as a set value. (8) The power factor adjustment method according to claim 6, wherein the capacitance of the capacitor is calculated by comparing each reactive component when the capacitor is turned on and when the capacitor is turned off. (9) If the capacitances of multiple capacitors are the same, perform cyclic control to equalize the number of times each capacitor is turned on and off; if the capacitances of the capacitors are different, prioritize control in descending order of capacitance. 9. A power factor adjustment method according to any one of claims 1 to 8, characterized in that the turn-on order and the cut-off order are reversed. (10) When all the capacitors to be controlled are turned on or cut off, a closing completion signal or a cutting completion signal is output to prevent the next control operation from starting. The power factor adjustment method according to any one of items 1 to 9.