JPH02228613A - Optical waveguide fixing structure - Google Patents
Optical waveguide fixing structureInfo
- Publication number
- JPH02228613A JPH02228613A JP1048469A JP4846989A JPH02228613A JP H02228613 A JPH02228613 A JP H02228613A JP 1048469 A JP1048469 A JP 1048469A JP 4846989 A JP4846989 A JP 4846989A JP H02228613 A JPH02228613 A JP H02228613A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- chip
- optical waveguide
- thermal expansion
- solder area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003287 optical effect Effects 0.000 title claims abstract description 21
- 229910000679 solder Inorganic materials 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 230000008646 thermal stress Effects 0.000 abstract description 8
- 238000005336 cracking Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 238000005476 soldering Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概 要〕
光導波路固定構造に関し、
光導波路が形成されたチップを基板に対して所望の位置
精度を維持したまましっかり固定し得ると共に、熱膨張
による当該チップの割れを回避し得る光導波路固定構造
を提供することを目的とし、光導波路を形成したチップ
を基板上に半田接合する構造において、主として路面内
方向の外力に対する不動固定部を形成する第1の半田領
域と、熱膨張時におけるチップの相対移動を可能ならし
める熱応力吸収部を形成する、上記第1半田領域より軟
らかい半田から成る第2の半田領域、とを上記半田接合
面に画成するよう構成する。[Detailed Description of the Invention] [Summary] Regarding an optical waveguide fixing structure, a chip on which an optical waveguide is formed can be securely fixed to a substrate while maintaining desired positional accuracy, and the chip can be prevented from cracking due to thermal expansion. In a structure in which a chip on which an optical waveguide is formed is soldered to a substrate with the aim of providing an optical waveguide fixing structure that can avoid such problems, the first solder region forms an immovable fixing part mainly against external force in the direction inward of the road surface. and a second solder region made of softer solder than the first solder region, which forms a thermal stress absorbing portion that enables relative movement of the chip during thermal expansion, on the solder joint surface. do.
本発明は光導波路を形成したチップを取付は基板に固定
する構造に関する。The present invention relates to a structure for mounting and fixing a chip on which an optical waveguide is formed to a substrate.
光導波路がその上面に形成されたL+NbO,(以下、
LN)のチップを基板に半田付けして固定する場合、第
3図に示す如<LNチップ51の取付は面をAu(金)
メツキ52した後、基板53°に単一の半田54を用い
て固定を行っている。かかる基板53はLNチップ51
と同程度の線膨張係数を有するステンレス鋼(SUS材
)等の材料で形成し、半田54は比較的柔らかい5N6
3等を用いるのが一般的である。L+NbO, with an optical waveguide formed on its top surface (hereinafter referred to as
When fixing the LN chip 51 by soldering to the board, the surface of the LN chip 51 should be soldered with Au (gold) as shown in Figure 3.
After plating 52, a single piece of solder 54 is used to fix the substrate 53°. Such a substrate 53 is an LN chip 51
The solder 54 is made of a material such as stainless steel (SUS material) that has a linear expansion coefficient similar to that of the solder 54.
3 etc. is generally used.
しかるに、LNチップ51を基板53と共にLNモジュ
ールに実際に実装して使用する際に、LNチップ51に
は装置への実装時あるいは実装後に第3図に示すような
PCコネクタ(第1図に8で示す)による軸力等の外力
Pが加わることがある。この力Pによって、半田(SN
63)54のクリープが起きLNチップ51は基板53
に対して全体的に(図で左方向に)ずれ易い。このため
、先導波管としての性能が著しく損なわれる可能性があ
る。一方、クリープが起きにくいように5N63半田の
代わりにより固いAuC金”)−3n(スズ)等の半田
を用いると、今度は基板53との熱膨張率の差による熱
応力のためにLNチップ51が割れる可能性がある。However, when actually mounting the LN chip 51 together with the board 53 in the LN module and using it, the LN chip 51 is connected to a PC connector (8 in FIG. 1) as shown in FIG. An external force P such as an axial force (shown by ) may be applied. This force P causes the solder (SN
63) The creep of 54 occurs and the LN chip 51 is attached to the substrate 53.
It tends to shift overall (toward the left in the figure). Therefore, the performance as a leading wave tube may be significantly impaired. On the other hand, if a harder solder such as AuC (AuC)-3N (tin) is used instead of 5N63 solder to prevent creep from occurring, the LN chip 53 will suffer thermal stress due to the difference in thermal expansion coefficient with the substrate 53. may break.
以上の点に鑑み本発明においては、基板に対して所望の
位置精度を維持しながらLNチップの固定を可能にし、
同時に熱応力を吸収してLNチップの割れ等の不都合を
有効に回避することが可能な光導波路固定構造を提供す
ることを課題とする。In view of the above points, the present invention makes it possible to fix the LN chip while maintaining desired positional accuracy with respect to the substrate,
It is an object of the present invention to provide an optical waveguide fixing structure that can absorb thermal stress and effectively avoid problems such as cracking of the LN chip.
上記課題を解決するために本発明に係る光導波路固定構
造は、光導波路を形成したチップを基板上に半田接合す
る構造において、主として路面内方向の外力に対する不
動固定部を形成する第1の半田領域と、熱膨張時におけ
るチップの相対移動を可能ならしめる熱応力吸収部を形
成する、上記第1半田領域より軟らかい半田から成る第
2の半田領域、とを上記半田接合面に画成したことを構
成上の特徴とする。In order to solve the above-mentioned problems, an optical waveguide fixing structure according to the present invention has a structure in which a chip on which an optical waveguide is formed is soldered to a substrate. and a second solder region made of softer solder than the first solder region, which forms a thermal stress absorbing portion that enables relative movement of the chip during thermal expansion, on the solder joint surface. is a structural feature.
第1の半田領域は路面内方向の外力に対する不動固定部
として機能するので所望のチップ位置精度が得られ、ま
た第2の半田領域は熱膨張時の熱応力吸収部として機能
するのでチップの相対移動が可能となりチップ割れが起
きにくくなる。The first solder area functions as an immovable fixing part against external force in the direction inward of the road surface, so the desired chip positioning accuracy can be obtained, and the second solder area functions as a thermal stress absorbing part during thermal expansion, so it It becomes movable and chip cracking is less likely to occur.
以下、図示実施例に基づき本発明を説明する。 The present invention will be explained below based on illustrated embodiments.
第1図は、本発明に係る光導波路固定構造を適用したい
わゆるLD−LNモジュールの縦断面図である。このL
D−LNモジュールはレーザ部(LDモジニール)とL
Nモジュールとを一体構造としたものであり、1はフォ
トダイオード(PD)、2はレーザダイオード(LD)
、3及び4は光を集光するためのレンズである。FIG. 1 is a longitudinal sectional view of a so-called LD-LN module to which an optical waveguide fixing structure according to the present invention is applied. This L
The D-LN module has a laser section (LD module) and L
It has an integrated structure with N module, 1 is a photo diode (PD), 2 is a laser diode (LD)
, 3 and 4 are lenses for condensing light.
光導波路(図示せず〉がその上面に形成されたLNチッ
プ5は、第2図にその横断面が示されるステンレス鋼製
の基板6に後述する半田付けにより固定され、基板6は
その長手方向両端部を介してベース7に取付は固定され
る。そしてLNチップ5(の光導波路)の左端部は軸方
向変動(伸縮)を許容し得るようにレンズ4に対して僅
かな隙間をもたしである。一方、LNチップ5(の光導
波路)の右端部はベース7に固定されたPCコネクタフ
ェルール8の端部に光軸を一致させて当接されている。The LN chip 5, on which an optical waveguide (not shown) is formed, is fixed to a stainless steel substrate 6 whose cross section is shown in FIG. 2 by soldering, which will be described later. It is fixed to the base 7 through both ends.The left end of the LN chip 5 (optical waveguide) has a slight gap with the lens 4 to allow for axial fluctuation (expansion and contraction). On the other hand, the right end of (the optical waveguide of) the LN chip 5 is brought into contact with the end of the PC connector ferrule 8 fixed to the base 7 with the optical axis aligned.
LNチップ5の基板6への固定は、PCコネクタフェル
ール側から見て、固いAu’−3n半田を用いるA部分
く第1半田領域)、半田付けしないB部分、そして比較
的柔らかい5N63半田を用いるC部分(第2半田領域
)、というように異なる性質を有する2種類の半田を用
いて行う。これにより、LNチップ5の右端側のAu−
3nで半田付けされたA部分は基板6に対して堅固に(
不動)固定されるため、PCコネクタフェルール8から
の外力がLNチップ5に対してその面内方向に作用して
もこれに耐え得ると共にクリープが起きにくく、従って
PCコネクタフェルール8及び光導波路右端部間の相互
位置関係(精度)が有効に安定維持され得る。また、B
及びC部分においては比較的柔らかい低融点の5N63
半田のためにLNチップ5が熱膨張してもこれにある程
度追従し得る(応力を吸収し得る)ためLNチップ5が
割れるということもなくなる。To fix the LN chip 5 to the board 6, as seen from the PC connector ferrule side, part A uses hard Au'-3n solder (first solder area), part B does not use solder, and uses relatively soft 5N63 solder. Two types of solder having different properties are used for the C part (second solder area). As a result, the Au-
The part A soldered with 3n is firmly attached to the board 6 (
Since the PC connector ferrule 8 and the right end of the optical waveguide are fixed (immovable), it can withstand even if an external force from the PC connector ferrule 8 acts on the LN chip 5 in the in-plane direction, and creep is less likely to occur. The mutual positional relationship (accuracy) between them can be effectively maintained stably. Also, B
and relatively soft low melting point 5N63 in the C part.
Even if the LN chip 5 thermally expands due to the solder, it can follow this to some extent (absorbs stress), so the LN chip 5 will not crack.
な奢、LNチップ5は高さ0.5〜1mm程度、幅1m
m程度、長さ60mm程度のものであり、Au −3n
で半田付けするA部分の長さは実使用時の熱膨張によっ
てもLNチップ5がこの部分で割れない程度の長さ、例
えば10叩程度とする。また、半田付けを行わないB部
分はマスクしAuメツキ(蒸着)されないようにしてお
けばよい。しかしながら、本発明の思想自体はこの空白
部分(B部分)を設けることを必須の要件とするもので
はなく、すなわちA及びC部分が必ずしも空白部分を介
して分離されていなくてもよい。The LN chip 5 has a height of about 0.5 to 1 mm and a width of 1 m.
It is about 60mm in length and Au-3n
The length of the part A to be soldered is set to such a length that the LN chip 5 will not break at this part even due to thermal expansion during actual use, for example, about 10 strokes. Further, the portion B to which soldering is not performed may be masked to prevent Au plating (vapor deposition). However, the idea of the present invention itself does not require the provision of this blank portion (portion B), that is, portions A and C do not necessarily need to be separated via the blank portion.
以上の如く本発明によれば、基板に対して所望の位置精
度を維持しなから光導波路を固定でき、且つ熱膨張によ
る割れ等の不都合を有効に回避することができる。As described above, according to the present invention, the optical waveguide can be fixed to the substrate while maintaining desired positional accuracy, and problems such as cracking due to thermal expansion can be effectively avoided.
第1図は本発明に係るLD−LNモジュールの縦断面図
、
第2図は第1図のLD−LNモジュールのn−■線に沿
い矢印方向から見た断面図、
第3図は従来の光導波路固定構造を説明するための図で
ある。
5・・・LNチップ、 6・・・基板、7・
・・ベース、
8・・・PCコネクタフェルール。Fig. 1 is a longitudinal cross-sectional view of the LD-LN module according to the present invention, Fig. 2 is a cross-sectional view of the LD-LN module of Fig. 1 taken along line n-■, and viewed from the direction of the arrow. FIG. 3 is a diagram for explaining an optical waveguide fixing structure. 5... LN chip, 6... Substrate, 7.
...Base, 8...PC connector ferrule.
Claims (1)
半田接合する構造において、主として路面内方向の外力
に対する不動固定部を形成する第1の半田領域(A)と
、熱膨張時におけるチップ(5)の相対移動を可能なら
しめる熱応力吸収部を形成する、上記第1半田領域(A
)より軟らかい半田から成る第2の半田領域(C)、と
を上記半田接合面に画成したことを特徴とする光導波路
固定構造。1. In a structure in which a chip (5) on which an optical waveguide is formed is soldered to a substrate (6), the first solder region (A) forms an immovable fixing part mainly against external force in the direction inward of the road surface, and the first solder region (A) The first solder region (A
) A second solder region (C) made of softer solder is defined on the solder joint surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1048469A JPH02228613A (en) | 1989-03-02 | 1989-03-02 | Optical waveguide fixing structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1048469A JPH02228613A (en) | 1989-03-02 | 1989-03-02 | Optical waveguide fixing structure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02228613A true JPH02228613A (en) | 1990-09-11 |
Family
ID=12804235
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1048469A Pending JPH02228613A (en) | 1989-03-02 | 1989-03-02 | Optical waveguide fixing structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02228613A (en) |
-
1989
- 1989-03-02 JP JP1048469A patent/JPH02228613A/en active Pending
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