JPH02223070A - Video signal digital recorder - Google Patents

Abstract

PURPOSE:To check the recording state with sufficient reliability without confirming a picture reproduced at the same time by providing a delay means retarding a recording signal by a time being the sum of delay time of a signal in a time axis correction means. CONSTITUTION:The device is provided with a time axis correction means 15 correcting a time axis fluctuation of a reproducing signal, a delay means 16 retarding a recording signal by a sum time of a time equivalent to a distance between a recording head 9 and a reproducing head 11 arranged on a rotary cylinder and a delay time of a signal in a time axis correction means 15, a discrimination means 17 discriminating whether or not a reproducing signal being an output of the time axis correction means 15 and a recording signal being an output of the delay means 16 are coincident and a monitor means 18 monitoring the recording state by using the discrimination information outputted from the discrimination means 17. Thus, the simultaneous reproducing output signal from the time axis correction means 15 and the delay time of the recording signal are made equal to each other and the discrimination means 17 monitors whether or not the reproducing signal is in error. Thus, the recording state is checked without confirming the simultaneous reproducing picture.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is particularly applicable to portable VTRs or camera-integrated VTRs.
The present invention relates to a video signal digital recording device such as a TR that is required to be small, lightweight, and low power consumption.

Conventional technology Generally, portable VTR or camera-integrated VTR
Since the elements of small size, light weight, and low power consumption are very important in this, it is desirable to have only the minimum necessary circuit configuration. That is,
Functionally, the above-mentioned VTR may be equipped with only a recording function (therefore, it is sufficient to have only a recording circuit. However, for equipment such as broadcast VTRs where reliability is particularly important) When recording, it is essential to check whether the data is being recorded correctly.For this reason, conventionally, even portable VTRs such as those mentioned above are equipped with a playback circuit, and recording is performed while monitoring the images that are being played back at the same time. I was checking the condition.

FIG. 2 shows a block diagram of a recording and reproducing system of a conventional digital VTR of this type. In Fig. 2, input pane 2
The analog video signal input from 0 is sent to an A/D converter (
A/D) 21 converts the signal into a digital signal, and an outer error correction encoder 22 adds parity information to form a first error correction code. As this error correction code, a Reed-Solomon code is generally widely used. Next, shuffling memory 23
Now, data is rearranged so that burst errors during playback are dispersed on the TV screen and error correction, which will be described later, is facilitated. This rearranged data is converted into a second error correction code by the inner error correction encoder 24.

This second error correction code also uses a Reed-Solomon code like the outer error correction code. next,
In the sync/ID adder 25, the digitized video signal is divided into data blocks of a predetermined length and recorded on the tape.The sync ID adder 25 divides the digitized video signal into data blocks of a predetermined length and records them on the tape. Add ID.

During playback, the original video signal is reproduced based on this sync and ID information. 26 is a parallel/serial converter (P/S), 27 is a recording amplifier, 28 is a recording head, and 29 is a magnetic tape.

Next, the reproduction system will be explained. 3o is the playback head, 31
is a playback amplifier. In the reproduction amplifier 31, the analog signal reproduced from the tape is converted into a digital signal. 32 is a sync/ID detector, and the following reproduction system signal processing is performed based on the sync and ID information detected here. 33 is a serial/parallel converter.

The inner error correction decoder 34 mainly corrects random errors during reproduction using the second error correction code configured during recording. The deshuffling memory 35 is
A completely opposite rearrangement of data is performed in the shuffling memory 23 during recording, and the data of the original video signal is restored. In the outer error correction decoder 36, burst errors are mainly corrected using the first error correction code configured during recording. Reference numeral 37 denotes an error corrector, which interpolates error pixels that could not be corrected by the first and second error correction codes using surrounding normal pixels. Finally, the D/A converter 38 converts the signal back into an analog video signal and outputs it to the output terminal 39 or the monitor TV 40.

Problems to be Solved by the Invention As explained above, in the past, for broadcasting, even multiple VTRs or camera-integrated VTRs had to be equipped with a playback circuit and a monitor TV for checking during recording. However, it has been difficult to achieve sufficient reduction in size and weight and power consumption, and the problem has been that the most important aspect of these VTRs, mobility, has not been sufficiently demonstrated.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a video signal digital recording device that can check the recording state with sufficient reliability without checking the simultaneously reproduced images on a monitor TV during recording.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a time axis correction means for correcting time axis fluctuations of a reproduced signal, and a recording head and a reproducing head arranged on a rotating cylinder. delay means for delaying the recording signal by the sum of the time for which the signal is delayed and the delay time of the signal in the time axis correction means, and a reproduction signal output from the time axis correction means and a recording signal output from the delay means. The configuration includes a determining means for determining whether or not there is a match, and a monitoring means for monitoring the recording state using determination information output from the determining means.

By providing the delay means for the action recording signal, the delay time of the simultaneous reproduction output signal from the time axis correction means and the recording signal is completely equal, and the determination means can determine whether the reproduction signal is erroneous. Can be monitored.

Embodiment Hereinafter, an embodiment of the video signal digital recording apparatus of the present invention will be described with reference to the drawings.

FIG. 1 is an overall configuration diagram showing an embodiment of the present invention. In this figure, since the recording circuit is exactly the same as the conventional one in FIG. 2, its explanation will be omitted, and the present embodiment will be explained in detail while explaining the main circuit. First, the signal regenerated by the reproducing controller 11 is passed through the reproducing amplifier 12.
First, the sink/ID detector 13 detects the sink and ID in the data. And based on this sink,
The reproduced serial data is converted into parallel data after A/D conversion during recording in the serial//'e parallel converter 14. Eight bits is often used as the number of bits for this parallel data. Next, a TBC (time base correction) memory 15 removes fluctuations in the time base of the data that occur during reproduction. In other words, the TBC memory 15 has sufficient capacity to absorb the temporal fluctuations included in the reproduced data, and writing to this memory involves writing the temporally varying clock and ID information created from the reproduced data. Reading is performed sequentially using a fixed clock during recording. Next, the delay memory 16 will be explained. In this embodiment, data to be recorded and simultaneously reproduced data are compared in 8-bit units to determine whether or not the reproduced data is incorrect, thereby monitoring the recording state. Therefore, in this embodiment, it is necessary to align the timings of the two data, and this delay memory 16 is necessary for this purpose. Generally, in rotary head recording, the recording head 9 in FIG.
and the regeneration head 11 are placed on the rotating cylinder at a certain distance apart.

FIG. 3 shows an example of the arrangement of the recording head and the reproducing head.

In FIG. 3, 41 is a rotating cylinder, which is rotating in the direction of the arrow. 42 is a magnetic tape, which is assumed to be traveling in the direction of the arrow. 43 and 44 are tape support posts, and 45A and 45B are examples in which a recording head and a reproducing head are arranged at an angle of 906. Now, if this rotating cylinder is rotating at, for example, 90Hz, the NTS
The IV (one field period) of the C video signal is divided into three tracks and recorded as shown in FIG. That is, a signal corresponding to a period of 1/3v is recorded on each track. 45A and 46A in FIG. 4 are the recording head 45A and the reproducing head 48A in FIG. 3.

As is clear from FIG. 4, the time required for the signal recorded by the recording head 45A to be reproduced by the reproduction head 46A is 1/6. That is, in FIG. 1, the delay time from the recording head 9 to the reproducing head is 1/6v. Therefore, the delay amount of the delay memory 16 is:
This is the sum of the delay amount 1/6V between the recording/reproducing heads and the delay amount of the TBC memory. A matching circuit 17 compares the output of the delay memory 16 and the output of the TBC memory 15 to determine whether they match. That is, this matching circuit 17 compares the recorded data and the reproduced data in units of 8 bits. 18 is an error state detector, and 19 is an output terminal for outputting the error state to the outside.

That is, the error state detector 18 constantly monitors the percentage of discrepancies between recorded data and reproduced data, and when it exceeds a certain value, it determines that recording has not been performed correctly and sends an alarm signal to the output terminal 19. Output.

As described above, according to this embodiment, there is no need to check the recording state while visually checking the simultaneously reproduced images, and therefore, the circuit after the inner error correction 34 and the monitor TV 40 shown in FIG. 2 are unnecessary. This makes it possible to significantly reduce the number of circuits.

Furthermore, since the error state during simultaneous playback can be quantitatively grasped in 8-bit units, it is possible to perform a more reliable check than conventionally done with the human eye.

As described in detail, if the present invention is applied to a portable VTR for broadcasting or a camera-integrated VTR, there is no need to monitor the recording state while checking the simultaneously reproduced images with the human eye as in the past. Therefore, most of the reproducing circuit can be omitted. Therefore, it is possible to significantly reduce the size, weight, and power consumption of VTRs compared to the past, and it is possible to significantly improve the mobility that is most required for VTRs as described above. .

Moreover, in the present invention, the error state during recording can be quantitatively grasped without relying on human eyes, so reliability is also greatly improved.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a digital VTR showing an embodiment of the present invention, Fig. 2 is a block diagram of a digital VTR showing a conventional example, Fig. 3 is a diagram showing the arrangement of a recording head and a reproducing head on a rotating cylinder; FIG. 4 is a diagram showing the arrangement of a recording head and a reproducing head on a track. 12... Reproduction amplifier, 13... Sink/ID detector, 14... Serial/parallel converter, 15
... TBC memory, 16... Delay memory,
17... Matching circuit, 18... Error condition detector.

Claims (1)

[Claims] In a video signal digital recording device having a simultaneous recording and playback function, there is provided a time axis correction means for correcting time axis fluctuations of a reproduced signal, a time corresponding to a distance between a recording head and a reproducing head arranged on a rotating cylinder, and the above-mentioned time axis. Delay means for delaying the recording signal by a time equal to the sum of the delay time of the signal in the correction means, and determining whether or not the reproduction signal output from the time axis correction means matches the recording signal output from the delay means. What is claimed is: 1. A video signal digital recording apparatus comprising: determination means for determining a recording state; and monitoring means for monitoring a recording state using determination information output from the determination means.