JPH02222386A - Picture data compressor - Google Patents

Abstract

PURPOSE:To reduce the distortion of a block, to reproduce the picture of high picture quality and to eliminate the necessity of a large capacity memory by detecting a contour part from picture data before orthogonal transform, determining the allocation of information quantity and making the allocation of the information quantity large to the block where the contour part exists. CONSTITUTION:The picture data are read out of a picture memory 26 for the unit of block and a DC(direct current) component is extracted by a DC component extraction circuit 27. Parallelly with the processing, a parameter to determine a normalization factor and bit distribution is extracted and data, for which the orthogonal transform of the picture data is executed by an orthogonal transform circuit 40, are normalized by a normalization circuit 41 and quantized by a quantization circuit 42 based on a bit number calculated by a bit distribution circuit 36. The activity of each sub block is weighted according to the height of edge and the bit distribution is executed so as to be proportional with the activity. Thus, the distortion of the block is reduced and the picture of the high picture quality can be reproduced. Then, the necessity of the large capacity memory can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an improvement of an image data compression device for compressing the amount of data when recording or transmitting image information.

(Prior Art) As is well known, the amount of image information is enormous, and when recording, transmitting, etc., some kind of information amount compression is generally performed. This compression of image information involves converting the image data into another dimension, such as a frequency plane, using orthogonal transformations such as Fourier transformation, cosine transformation, and Hadamard transformation, and then reducing the amount of data by using the properties of the image. .

Then, the data after the orthogonal transformation is divided by a certain number to reduce the amplitude value (quantization).

In this case, the image quality and amount of information are greatly influenced by the dividing number (quantization width), and also how the orthogonally transformed data is allocated to the limited number of bits.
This will greatly affect the image quality. For this reason, various improvements are usually made to normalization methods and bit allocation methods for quantization.

FIG. 10 shows such a conventional image data compression device, which was proposed by W. H. Chen et al.
mmunications, vol, C0M-25
, Nl 11. NOV, 1977J.

That is, the image data supplied to the input terminal 11 is divided into 16×1B subblocks by the cosine transform circuit 12, and cosine transform (D C
T; Discrete Co51ne Trans
rarm). The orthogonally transformed image data is then stored in the transformed data memory 13.

Further, the image data converted into DCT by the cosine transform circuit 12 is converted into AC (alternating current) by the AC energy calculation circuit I4.
The sum of the squares of the components is taken to calculate the AC energy. Then, based on the obtained AC energy of each sub-block, a probability distribution histogram is generated for each class by the circuit 15, and each sub-block is classified into four types according to the magnitude of the AC energy.

After that, each classified sub-block is processed by the deviation matrix circuit 1B to calculate the AC of the sub-block for each class.
The variance for each component is calculated, and the bit allocation circuit 17 determines the bit allocation for each class.

Further, the DCT image data stored in the conversion data memory 13 is normalized for each frequency component by a normalization circuit 18. In this case, the normalization coefficient for each frequency component is obtained from the coefficient table stored in the ROM 19, but the coefficient table itself in the ROM 19 is also normalized in advance by the normalization factor circuit 20 so that the given bit allocation is achieved. I try to keep it there.

1. The normalized data is quantized by the quantization circuit 21 using the bit allocation obtained from the bit allocation circuit 17, and coded by the coding circuit 22 together with various side information used up to the quantization,
It is taken out from the output terminal 23.

Here, Fig. it shows another conventional example of the bit allocation determination method, in which
ithVQ” (Trends in still image coding technology 1987
18th Imaging Optics Conference Digest, 7
-1, P, 129) proposed in J.

This method divides the original image into 8 x 8 subblocks and performs cosine transformation (DCT).
d) Find the sum of absolute values of the coefficients in each mask pattern indicated by diagonal lines, classify the sub-blocks into four classes using the mask that maximizes the sum of absolute values, and divide the sub-blocks into bands according to the classified classes.

Bit allocation, normalization coefficients, etc. are adaptively changed.

However, as mentioned above, conventional image data compression devices that combine block division and orthogonal transformation do not adaptively transmit the amount of information according to the distribution of data after orthogonal transformation within each subblock. This causes a problem in that so-called block distortion occurs in the reproduced image, in which boundaries between sub-blocks are noticeable. This block distortion occurs noticeably at the edge of the diagonal line.

In addition, the two bit allocation determination methods described above are both direct methods based on coefficients after orthogonal transformation, so
Another disadvantage is that a large capacity memory is required to store the transform coefficients until they are quantized. Furthermore, the latter bit allocation determination method has the disadvantage that information indicating which class each subblock is classified into must be sent together with the data, which increases the amount of information.

(Problems to be Solved by the Invention) As described above, in conventional image data compression devices, block distortion occurs where the boundaries between sub-blocks are noticeable, and a large capacity memory is required, the amount of information increases, etc.
It has various problems.

Therefore, the present invention has been made in consideration of the above circumstances, and provides an extremely good image data compression device that can reduce block distortion and reproduce high-quality images, and also eliminates the need for large-capacity memory. The purpose is to

[Structure of the Invention] (Means for Solving the Problems) An image data compression device according to the present invention divides image data into a plurality of blocks, performs orthogonal transformation and quantization for each block, and converts the divided image data into blocks. The target is one that determines the information amount allocation for each block based on the data in each block. The system is configured to detect the presence of an image contour component in a block of image data, and change the amount of information allocated to the block for which it is determined that the contour component exists based on the brightness of the contour portion. It is.

(Operation) According to the above configuration, it is possible to allocate a large amount of information to a block in which a contour component exists, and it is possible to reduce block distortion and perform high-quality image reproduction. In addition, since the information amount is determined by detecting contour components from the image data before orthogonal transformation, there is no need for large-capacity memory to store data after orthogonal transformation, which is required in the past. can do.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. In FIG. 1, analog image data supplied to an input terminal 24 is converted into digital image data by an A/D (analog/digital) conversion circuit 25,
The image is stored in the image memory 2G. Thereafter, the image data is read out from the image memory 2G in units of, for example, 8×8 blocks, and the DC (direct current) component extraction circuit 27 extracts the DC component from the average value within the block. , the parameters that determine the normalization factor α and bit allocation are extracted as described later.

Here, a BPF (band pass filter) 28 is used to determine the parameters for determining the normalization factor α and bit allocation, and the difference from two pixels before is determined. This B
PFZg has characteristics as shown in FIG. This is done by taking advantage of the fact that human visual perception has characteristics similar to a band-pass filter, so that the reproduced image will be visually pleasing. In addition, instead of BPFZg,
It is also possible to use means for extracting parameters using the standard deviation of image data, P-P (peak-to-peak), or the like.

Then, the absolute value of the difference from the previous two pixels outputted from the B P F 28 is taken by the absolute value circuit 29, and then sent to the peak hold circuit 30, and is also supplied to the integration circuit 31 for one block. The absolute value data of the minute is integrated. Furthermore, the peak hold circuit 30 holds the maximum data among the absolute value data output from the absolute value circuit 29 as a peak value.

In this case, if the peak value is larger than a certain level, it can be determined that there is a large change in the vicinity of a certain pixel, and it can be determined that a contour component (edge) exists between the two pixels obtained by taking the difference. Furthermore, it can be determined that the larger the peak value is, the steeper the edge is.

In other words, the reason why the peak hold circuit 30 makes the above judgment is whether the data in the block changes smoothly over a wide range or sharply within a narrow range using only the integrated value by the integration circuit 31. This is because it is difficult to determine whether there is a change.

Then, the peak value held in the peak hold circuit 30 is subjected to weighting and generation of a factor W corresponding to the peak value by a weighting factor generation circuit 32. In other words, if the inside of a block is flat, the intra-block activity and the optimal bit allocation can be calculated proportionally, but if an edge exists, the orthogonal transform component is distributed up to the high range, so the bit allocation for that block is If it is not larger than the flat area, edge reproducibility will deteriorate.

In order to improve this, a threshold for the peak value is set in the weighting factor generation circuit 32, and blocks are classified into several groups according to the magnitude of the peak value, that is, the amplitude of the edge.

Then, a weighting factor W is associated with each group, and this is output.

The relationship between the peak hold value and the weighting factor W is as follows:
The settings are as shown in FIG. In this case, the relationship between the appropriate bit allocation and the peak hold value is non-linear, and in order to simplify the circuit configuration, an example is shown in which groups are classified based on the peak hold value.

Then, the integral value and weighting for one block outputted from the integration circuit 31 are multiplied by a factor W, and the value obtained by multiplying it by the multiplication circuit 33 is set as the activity of the block, and the memory 34
to be memorized. The capacity of this memory 34 only needs to correspond to the number of sub-blocks in one screen, and does not have a large capacity to store one screen's worth of orthogonal transformation data.

Further, the output of the multiplication circuit 33 is sent to the memory 3 after the sum S of activities for one screen is determined by the integration circuit 35.
The data is supplied to a bit allocation circuit 36 together with the activity of each block stored in 4, and the number of bits given to each block is allocated proportionally.

This bit allocation is for the coefficients of the AC component after orthogonal transformation.

Generally, the data after orthogonal transformation is quantized to reduce the amount of information, but if the quantization level is made adaptive depending on the picture, it will be easier to adjust the amount of information and the picture will look better. It has been known. Adaptive quantization levels also enable more efficient bit allocation.

In this case, a normalization coefficient table determined experimentally in advance is determined, and the quantization level is changed by multiplying it by the normalization factor α. In this embodiment, B P The full screen integral value of F28 is used.

And the coefficient for normalizing the image data is ROM
It is obtained from the coefficient table stored in 37.

FIG. 3 shows an example of this normalization coefficient table. In FIG. 3, the upper left is a normalization coefficient for low frequency components, and the lower right is a normalization coefficient for high frequency components. The reason why the high frequency components are normalized by a large value is to take advantage of the fact that the visual characteristics are low in the high range, and to increase the information compression efficiency in this part.

Furthermore, the normalization coefficient table shown in FIG. 4 has smaller diagonal components of the normalization coefficients than that shown in FIG. That is, for example, as shown in FIG.
), the converted image/number has large absolute values concentrated on the diagonal components as shown in FIG. Note that even if the edges of the block shown in FIG. 5 are downward to the left, the conversion coefficients show a similar tendency. Therefore, by using a normalization coefficient table as shown in FIG. 4, it becomes possible to more accurately reproduce edges in the diagonal direction.

The normalization coefficient table stored in the ROM 37 is not used for normalization as is, but is used after being multiplied by the normalization factor α output from the normalization factor circuit 38 in the multiplication circuit 39 for the reason mentioned above. It will be done. This normalization factor α is determined by the total area integral value S of the weighted output of B P F 2g.

Figure 7 shows the relationship between the normalization factor α and the total area integral value S, which were experimentally determined using several training images. It can be seen that this is required. With this process,
When the information is finally encoded into a predetermined amount of information, the optimum condition is more closely achieved, and a significant improvement in the quality of the reproduced image is achieved.

Using the new normalization coefficient obtained in this way, the data obtained by orthogonally transforming the image data read from the image memory 2B by the orthogonal transform circuit 40 is normalized by the normalization circuit 41. Then, this normalized data is quantized by the quantization circuit 42 based on the number of bits determined by the bit distribution circuit 3G.

In the case of optimized non-linear quantization, it is sufficient to ensure that the number of bits is within the allocated bits after quantization, but quantization is often performed using a combination of linear quantization and Huffman code, for example. , in this case, the number of Huffman encoded bits is made to be within the allocated bits.

Further, the DC component extracted by the DC component extraction circuit 27 is independently quantized by the quantization circuit 43 at the same time as determining the above parameters, and encoded by pre-7111 encoding etc. The number of bits is sent to the bit allocation circuit 36. This bit allocation circuit 3G calculates the number of bits to be allocated to the AC component after orthogonal transformation by subtracting the number of bits required for DC component encoding from the predetermined total number of bits, and calculates the number of bits allocated to the AC component after orthogonal transformation. Bits are allocated proportionally to the total number of bits.

The DC component, AC component, and normalization factor α quantized as described above are subjected to synchronization, encoding for transmission, error correction processing, etc. by the encoding circuit 44, and are taken out from the output terminal 45. .

As explained above, in blocks with gentle changes, after orthogonal transformation, non-zero coefficients are concentrated in the low range, but if edges exist within the block, the non-zero coefficients after transformation appear in the high range. . Therefore, when normalizing, quantizing, and encoding this coefficient, a block containing edges requires more bits than a flat block.

Therefore, by weighting the activity of each sub-block according to the edge height and allocating bits in proportion to this weighted activity, we can significantly improve the block distortion at the edges of the reproduced image. be able to. At this time, the weighting is done by adjusting the factor W and the threshold value for the peak value depending on the picture pattern or the brightness 1
If it is adaptively changed depending on the color difference, more optimal bit allocation becomes possible.

In the case of a color image, it is common to process the luminance signal and color difference signal separately, but the characteristics of the luminance signal and color difference signal are quite different. That is, when viewed microscopically, both the luminance signal and the nine color signals exhibit strong correlation between neighboring pixels, and in particular, the color signal with a lower signal band has a stronger correlation.

However, when viewed macroscopically, there is no correlation between two adjacent colors, and the signal changes significantly. That is, the chrominance signal has a mixture of flat parts showing a stronger correlation than the luminance signal and edge parts where the signal changes greatly, complicating signal processing.

However, according to the above embodiment, color signal processing, which has been difficult in the past, becomes possible with optimal bit allocation for flat areas and edge areas. In the case of low bit rates, the edge weighting is reduced for the visually inconspicuous (B-Y) signal or the L signal, and the edge weighting is reduced for the visually conspicuous (RY) signal or the Q signal. Increasing the weighting has the same effect.

According to the results of actual experiments, the best solution is to give a small weight to the edge part of the luminance signal, a large weight to the (RY) signal, and no weight to the (B-Y) signal. I was able to obtain good images.

FIG. 9 shows another embodiment of the invention, in which the same parts as in FIG. 1 are designated by the same reference numerals. That is, the difference from the above embodiment is that the normalization coefficient α and the bit allocation are basically determined based on the standard deviation within the subblock.

In edge detection in this method, first, in the sub-block before orthogonal transformation, the adjacent pixel difference circuit 46 calculates the difference between each adjacent pixel, the absolute value circuit 47 takes the absolute value of the difference, and the peak hold circuit 48
Send to. This peak hold circuit 48 takes the maximum absolute difference value within the block as a peak value, and determines that an edge exists within the block if this peak value is greater than a certain level. Then, only when the peak value exceeds a certain level, the peak value is sent to the weighted factor generation circuit 49, and the corresponding weighted value is used to generate the factor W'.

In basic bit allocation, first, the intra-block standard deviation circuit 50 calculates the standard deviation in the sub-block before orthogonal transformation, and using this standard deviation, the bit allocation circuit 3G proportionally allocates the number of bits given to each block. .

As mentioned above, in the peak hold circuit 48, when the peak value exceeds a certain level, the weighting is the weighting factor W- output from the factor generation circuit 49, and the standard deviation is converted into the weighting factor W- by the multiplication circuit 33. The amount of bit allocation is increased by performing multiplication and then proportional allocation.

It should be noted that the present invention is not limited to the above-described embodiments, and can be implemented with various modifications without departing from the gist thereof.

[Effects of the Invention] As detailed above, the present invention provides an extremely good image data compression device that can reduce block distortion and reproduce high-quality images, and also eliminates the need for large-capacity memory. can do.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an image data compression device according to the present invention, FIG. 2 is a diagram for explaining the relationship between the peak hold value and the weighting factor in the same embodiment, and FIG. 4 and 4 are diagrams showing normalization coefficient tables in the same embodiment, respectively. A diagram showing the relationship between the total area integral value and the normalization factor in the embodiment, FIG. 8 is a characteristic diagram of BPF in the same embodiment, FIG. 9 is a block diagram showing another embodiment of the present invention, and FIG. The figure is a block diagram showing a conventional image data compression device, and FIG. 11 is a diagram for explaining a conventional bit allocation determination method. 11... Input terminal, 12... Cosine conversion circuit, 1
3... Conversion data memory, 14... AC energy calculation circuit, 15... Circuit for class, 1B... Deviation matrix circuit, 17... Bit allocation circuit, 18...
- Normalization circuit, 19... ROM, 20... Normalization factor circuit, 21... Quantization circuit, 22... Coding circuit, 23... Output terminal, 24... Input terminal, 2
5... A/D conversion circuit, 2B... image memory, 27
...DC component extraction circuit, 28...BPF, 29...
・Absolute value circuit, 30...Peak hold circuit, 31・
...Integrator circuit, 32...Weighting is done by factor generation circuit, 33
...Multiplication circuit, 34...Memory, 35...Integrator circuit, 3G...Bit distribution circuit, 37...ROM, 3
8... Normalization factor circuit, 39... Multiplication circuit, 40.
...Orthogonal transformation circuit, 41...Normalization circuit, 42.43
...Quantization circuit, 44... Encoding circuit, 45...
Output terminal, 46... Adjacent pixel difference circuit, 47... Absolute value circuit, 48... Peak hold circuit, 49...
Weighting is a factor generation circuit, 50...intra-block standard deviation circuit. Applicant's agent Patent attorney Takehiko Suzue Engraving of the drawings (no changes to the content) Figure 11 Procedural amendment Heisei, actual year 348 days Director General of the Patent Office Ko 1) Moon Yi 1, Indication of Case Patent Application No. 1-43500 2, Name of Invention Image Data Compression Device 3, Person Making Amendment Relationship with Case Patent Applicant (307) Toshiba Corporation 4. Agent, 3-7-2 Kasumigaseki, Chiyoda-ku, Tokyo. Engraving of the drawing originally attached to the application. As shown in the attached sheet (no changes to the contents)

Claims (1)

[Claims] An image data compression device that divides image data into a plurality of blocks, performs orthogonal transformation and quantization on each block, and determines the information amount allocation for each block based on the data in each divided block. The method further comprises a detection means for detecting that there is an image contour component in the block of the image data, and the information is transmitted to the block for which the detection means determines that the contour component exists based on the brightness of the contour portion. An image data compression device characterized by being configured to change amount allocation.