JPH02222345A - Signal deciding information recording system - Google Patents

Abstract

PURPOSE:To easily investigate the cause of a circuit failure by providing a deciding information storage for storing a state of a receiving signal at the time point of generation of a failure state and reproducing the state recording after the generation of the failure state. CONSTITUTION:When a result of decision of the circuit quality by a circuit quality deciding device 7 becomes a failure state, a generation time of the failure state and a decision pattern of the failure state are recorded in a deciding information storage 10. Also, at the time of release, its release time is recorded, and by a reproducing command inputted from an input device 9a of a reproducing operation of a keyboard or a ROM, etc., the recorded decision pattern is outputted to an oscilloscope connected to an observation use terminal 8. Simultaneously, the generation time of the failure state and the release time are displayed on a display device 9b, and even after the failure state is released, the failure state can be reproduced. In such a way, the cause of a failure of a circuit can be investigated.

Description

[Detailed Description of the Invention] [Summary] Regarding a signal judgment information recording method for determining the quality of a received signal in a modem, it is possible to monitor a fault condition at any time after a fault occurs, and to identify the cause of a line fault. The purpose is to enable investigation, and includes a line quality judger that detects the transmission quality of the signal on the line based on the signal received from the line, and the occurrence of a defective state based on the output of the line quality judger. The device is equipped with a determination information storage device that stores the state of the received signal at a certain point in time and enables reproduction of the state record after the occurrence of a defective state.

[Industrial application field]

The present invention relates to a signal determination information recording method for determining the quality of a received signal in a modem.

[Conventional technology]

In the conventional modem reception signal determination method, as shown in FIG. An equalizer 4 removes noise from the demodulated signal, a code converter 5 converts the code of this equalized signal into a code suitable for the transmission path, and a descrambler 6 descrambles the code-converted signal. , and output to a terminal (not shown) etc. as code data.

A code converter 5 and a descrambler 6 are installed on the output side of the equalizer 4.
In addition, by connecting the line quality quality judger 7 and the judgment pattern observation terminal 8, SQD (signal quality detection ) A lamp can be lit to indicate a line failure, and an oscilloscope (not shown) can be connected to visually inspect the judgment pattern in the event of a line failure.

In the case of a good signal, the judgment pattern is a sharp point of light focused at a prescribed position (as shown in Figure 4).
If the signal becomes a bad signal due to noise etc., it will be displayed as a blurred light display (light area) 12 that is not focused on the specified position, as shown in Figure 5. be done. In the display of this defect signal, depending on the cause of the defect, a light spot 11 and a light area 1 are displayed as shown in FIG.
2 may appear together, or the entire display may become a light area 12, as shown in FIG.

Therefore, the cause of the defect can be determined from the display pattern of the light area 12, which can be useful for repair work and the like.

(Problems to be Solved by the Invention) In the conventional received signal judgment method described above, the circuit quality is judged only when an oscilloscope is connected to the observation terminal 8 of the judgment pattern and the judgment pattern can be visually inspected. I can't.

For this reason, if the line becomes defective, it would be easier to investigate the cause if it could be monitored immediately, but the condition may have changed by the time you actually monitor it, or the communication status may have ended by the time you discover that the line is defective. Therefore, there was a problem in that it was not possible to monitor the defect status and it was not possible to investigate the cause of the defect.

The present invention has been made in view of the above-mentioned problems, and the technical problem set for solving the problem is to enable monitoring of the defect state at the necessary time after the occurrence of the defect,
An object of the present invention is to provide a signal judgment information recording method that enables investigation of the cause of line failure.

[Means to solve the problem]

As a specific means for solving the above problems, the present invention, in configuring a signal judgment information recording system, analyzes the transmission quality of the signal on the line based on the received signal from the line, as shown in FIG. A line quality determiner 7 detects the line quality, and the state of the received signal is stored at the time when a defective state occurs based on the output of the line quality determiner 7, and the state record can be reproduced after the occurrence of the defective state. It is equipped with a determination information storage device 10.

The judgment information storage device 10 preferably includes a storage device 20 for the occurrence time and recovery time of a defective state, and a judgment pattern storage device 30 for storing a judgment pattern for the defective state.

(Function) With the above-described configuration, when the line quality judgment result by the line quality quality judger 7 is a bad state, the judgment information storage device 10 stores the occurrence time of the bad state and the judged bad state. The judgment pattern is recorded, and when the recovery occurs, the recovery time is recorded and saved on the keyboard or ROM.
In response to a playback command input from a playback operation input device 9a such as (read-only memory), the recorded judgment pattern is output to the oscilloscope connected to the observation terminal 8, and the time of occurrence of the defective state and recovery time are displayed on the display device 9b. This makes it possible to reproduce the defective condition even after the defective condition has been recovered.

In this case, the data recorded by the failure state occurrence time and recovery time storage device 20 and the determination pattern storage device 30 provided in the determination information storage device 10 can be displayed independently on the display device 9b or the oscilloscope. The determination pattern for a defective state is displayed together with the time of occurrence of the defective state.

〔Example 〕

Hereinafter, as an embodiment of the present invention, a case where the determination information storage device 10 is integrated into a modem will be illustrated and explained.

As shown in FIG. 2, a filter 1 extracts an analog signal from a received carrier wave, an AD converter 2 converts the filtered analog signal into a digital signal, and a demodulator 3 demodulates the digital signal into the original signal. and its demodulator 3
An equalization circuit 4 includes a real part equalization circuit 4a and an imaginary part equalization circuit 4b that individually remove line distortion etc. from the real part and imaginary part of the output signal of the output signal, and the real part equalization circuit 4a and the imaginary part Equalization circuit 4
A real phase correction circuit 10 corrects the phase from the output signal from b and the error amount fed back as correction data.
A phase correction circuit 101 including a phase correction circuit 1a and an imaginary phase correction circuit 101b, and output signals from a real phase correction circuit 101a and an imaginary phase correction circuit 101b are respectively inputted to perform a hard decision on signal point data for a received signal. a determination means 102; a code conversion circuit 103 that receives the output signal from the determination means 102 and converts it into a code suitable for this transmission path;
A descrambler 104 that converts a multi-value signal into a binary signal, and a real part subtracter 105a and an imaginary part subtracter 10 that calculate the magnitude of the error between the input signal and the output signal of the determining means 102.
5b, and a line quality defect signal output means 106 that outputs a signal from the output of the error amount calculation means 105 when the line quality is poor.
0, a storage device 2 that stores the occurrence time and restoration time when the line quality becomes poor from the output of the line quality defect signal output means 106 and each output of the phase correction circuit 101.
0, a determination pattern storage device 30 that stores received signals for a certain period of time after the line quality becomes poor;
It is provided with an observation terminal 8 for outputting the contents of the storage device 20 and the determination pattern storage device 30 to the oscilloscope side.

In addition to this, the modem 100 further includes an input means 9a having a keyboard for instructing playback at the start of communication or when a faulty state occurs, and a liquid crystal display for displaying the other party of communication, the time of occurrence of the faulty state, the recovery time, etc. An input/output device 9 including a display means 9b having a display section is provided.

The poor line quality signal output means 106 includes a calculating means 106a that inputs the real part and imaginary part error amounts to calculate the absolute amount of signal deviation, and an integrating means 1 that integrates the signal deviation amount.
06b, and a slicer 106c which inputs the integrated signal and outputs a pulse signal shaped from a partial waveform of the signal waveform, and generates a pulse signal from a signal exceeding a threshold of the total signal deviation amount. Provide a function to output as a notification signal when quality is defective.

The storage device 20 that stores the occurrence time and restoration time when the line quality becomes poor includes a generation side gate means 22 that outputs the time of the timer 21 when the poor state occurs, which is output from the slicer 106C; Generation side gate means 2
S register 23 that stores the output of 2, and slicer 106
recovery detection means 24 which inputs the output of c and outputs a signal when the defective state is recovered; recovery side gate means 25 which outputs the time of the clock device 21 when the recovery detection means 24 outputs; and the recovery side gate means. 25, and a display side gate means 27 that outputs the contents stored in the S register 23 and the E register 26 to the display means side when there is a reproduction operation from the input means 9a.

The judgment pattern storage device 30 includes a timer 31 that inputs the output signal of the slicer 106c and outputs a signal for storing the received signal for a specified time (for example, 1 second), and a timer 31 that receives the output signal of the timer 31 and stores the signal. an address counter 32 that specifies the storage position at the time, and a real part that stores the output signals from the real part phase correction circuit 101a and the imaginary part phase correction circuit 101b in their respective storage memories when the output of the timer 31 is output. an R memory 34 that stores the outputs of the gate means 33a and the imaginary part gate means 33b, and the outputs of the real part gate means 33a and the imaginary part gate means 33b, respectively, in positions designated by the output of the address counter 32;
When there is a reproduction operation from the input means 9a to the a and I memories 34b, the address specified by the address counter 32 and the contents of the R memory 34a and I memory 34b stored at the position corresponding to that address are observed. Address side gate means 35a outputting to the terminal for
, R memory side gate means 35b, and emory side gate means 35c.

When this embodiment is operated, the equalizer 4 removes distortion from the real part and imaginary part of the signal demodulated by the demodulator 3, and the equalized signal is sent to the phase correction circuit 101, where the real part and the imaginary part are The signal is transmitted to the correction circuit 101a and the imaginary part phase correction circuit 101b to correct the error with the output of the determining means 102, and the corrected signal is converted into a code suitable for transmission by the code conversion circuit 103,
The descrambler 104 outputs binary data.

On the other hand, if the deviation amount from the received signal point is larger than the specified value, the poor line quality signal output means 106 receives the error amount obtained by the error amount calculation means 105, and outputs a signal indicating that the line quality is poor. .

When a signal is output from the line quality defect signal output means 106, the generation side gate means 22 in the storage device 20 opens and stores the time of the clock device 21 in the S register 23, and the recovery detection means 24 is activated to detect the fault. Monitor when the state is recovered.

Then, in the determination pattern storage device 30, the timer 31 is started, and the address counter 32 is operated for the time specified by the timer 31, and the real part gate means 33a
and the imaginary part gate means 33b is opened, and the R memory 34a is opened.
The output signals of the real phase correction circuit 101a and the imaginary phase correction circuit 101b are stored in the storage location specified by the address counter 32 of the emory 34b.

When the line quality recovers from the poor condition and no signal is output from the poor line quality signal output means 106, the storage device 20 determines that the line has been restored by the recovery detecting means 24 that monitors the time of recovery. The gate means 25 is opened and the time of the clock device 21 is stored in the E register 26.

Thereafter, at an appropriate time after the line failure has been restored, the observation terminal 8 heoscilloscope is connected, and the address counter is activated by the regeneration operation of ° from the input means 9a, and the display side gate means 27 and the address side The gate means 35a, the R memory side gate means 35b, and the I memory side gate means 35c are opened, and the S register 23 is opened.
The contents stored in the E register 26 are output to the display means 9b for display, and the contents stored in the R memory 34a and I memory 34b are output to the oscilloscope via the observation terminal 8, and the judgment pattern is displayed on the display screen of the oscilloscope. to be displayed.

In this embodiment, when the line quality becomes poor, the occurrence time is stored in the S register 23, the recovery time is stored in the E register 26, and the R memory 34a and I memory 34 are stored.
The real part and imaginary part of the received signal can be stored for a specified time in B, and can be played back after the poor line quality has been restored.This makes it easier to investigate the cause of the fault, shortens investigation time, and speeds up repair work. Can be executed appropriately and quickly.

In the above embodiment, the determination information storage device 10 is used as the modem 100.
Although the case has been described in which the determination information storage device 10 is integrated into the modem 1, the determination information storage device 10 is not particularly limited to this.
It may be formed separately from 00 and detachably formed as an off-site. Furthermore, by setting the signal output from the poor line quality signal output means 106 to be output in a state slightly lower than the threshold value, it is possible to memorize not only the part of the communication failure but also the state immediately before and after the occurrence of the failure. You can also use this method of storing settings.

(Effects of the Invention) As described above, according to the present invention, the occurrence time and determination pattern of a defective state recorded in the determination information storage device 10 can be reproduced after the occurrence of a defect, and the cause of the defect can be investigated.

This makes it easy to distinguish whether the cause of poor line quality is on the modem side or the line side, and to estimate the fault, shortening the investigation required for repair.
Can be repaired appropriately and quickly.

By displaying the data in the memory device 20 regarding the occurrence time and recovery time of the defective state on the display device 9b, and displaying the data in the judgment pattern memory device 30 on the oscilloscope, the judgment pattern in the defective state is displayed together with the time when the defective state occurred. This makes it easy to understand the status of the failure and determine the repair method.

The timing device 40 provided in the determination pattern storage device 30 can reduce the recording of the determination pattern in a defective state to the minimum necessary amount of data within the range in which the data necessary for determination can be obtained. 30 storage capacity can be reduced to the necessary minimum.

[Brief explanation of the drawing]

FIG. 1 is a configuration explanatory diagram showing a signal determination information recording system according to the present invention, FIG. 2 is a configuration explanatory diagram showing a determination information storage device according to an embodiment, and FIG. 3 is a configuration explanatory diagram showing a signal determination information recording system according to the present invention. FIG. 4 is an explanatory diagram showing a display pattern of a good signal in signal determination. FIG. 5 is an explanatory diagram showing an example of displaying a bad signal in signal determination. An explanatory diagram showing an example of a display displaying a defective signal, 7... Line quality determiner 8... Observation terminal 9a... Input device 9b... Display device O... Judgment information storage device 0 ...Storage device 0...Judgment pattern storage device 0...Clocking device AI! 4 LII Den 1 Kuosuro good girl's door big and small flower number pattern refused 1 Mosquito light and closing Figure 4 I Kan 9 Pavilion 1f + Te Or r1 Ro bad I ≦ A table A', Mekuri 1, Near, 11 Ministry Katsuaki G Uday Book II f ltechi-rb- Egg Su Ichi Ikui Kan Ititai I No I I 1 Fang, (f Mi k Hiro Ir Noshi ε Show No 1

Claims (2)

[Claims] (1) A line quality determiner (7) that detects the transmission quality of the signal on the line based on the signal received from the line, and the point at which a defective state occurs based on the output of the line quality determiner (7). 1. A signal judgment information recording system comprising a judgment information storage device (10) that stores the state of a received signal and enables reproduction of the state record after the occurrence of a defective state. (2) The determination information storage device (10) includes a storage device (20) that stores the occurrence time and recovery time of a defective state.
2. The signal determination information recording system according to claim 1, further comprising: a determination pattern storage device (30) for storing a determination pattern in a defective state.