JPS59142709A - Eliminating device of switching noise - Google Patents

Eliminating device of switching noise

Info

Publication number
JPS59142709A
JPS59142709A JP58015028A JP1502883A JPS59142709A JP S59142709 A JPS59142709 A JP S59142709A JP 58015028 A JP58015028 A JP 58015028A JP 1502883 A JP1502883 A JP 1502883A JP S59142709 A JPS59142709 A JP S59142709A
Authority
JP
Japan
Prior art keywords
difference
sensitivity
signal
circuit
demodulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58015028A
Other languages
Japanese (ja)
Other versions
JPH0221074B2 (en
Inventor
Koji Uchikoshi
打越 剛二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nakamichi Corp
Original Assignee
Nakamichi Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nakamichi Corp filed Critical Nakamichi Corp
Priority to JP58015028A priority Critical patent/JPS59142709A/en
Publication of JPS59142709A publication Critical patent/JPS59142709A/en
Publication of JPH0221074B2 publication Critical patent/JPH0221074B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
    • G11B5/027Analogue recording
    • G11B5/035Equalising

Landscapes

  • Television Signal Processing For Recording (AREA)

Abstract

PURPOSE:To obtain a playback sound signal which is highly faithful to an original sound having no switching noise by a helical scanning system by equalizing signal voltage differences at connection parts of signals originating from the offset voltage difference and sensitivity difference between demodulation circuits. CONSTITUTION:The output of a low-pass filter 41 and the output of an adding circuit 10 are inputted to a differential amplifier 16. The output of the differential amplifier 16 is inputted while the 4th switching circuit 17 is closed, and this inputted difference signal controls the sensitivity of an FM demodulator 32 through an RC filter circuit 18 which supplies a proper control time constant and a necessary buffer amplifier 22. A control system for sensitivity difference fetches information on the difference between demodulation outputs of both demodulation circuits when both rotary heads 11 and 12 are both active by the closure of a switching circuit 17 in response to the rise of a control signal S9 from L to H. This difference information shows the sensitivity difference between both demodulation circuits after offset voltage correction, and the sensitivity of a demodulator 32 is corrected on the basis of the difference information so that the sensitivity difference is eliminated, allowing both demodulation circuits to have coincident sensitivity.

Description

【発明の詳細な説明】 本発明は回転ヘッド形磁気記録再生装置の再生系に使用
して好適な切換雑音除去装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching noise removing device suitable for use in a reproducing system of a rotary head type magnetic recording/reproducing device.

例えば2ヘツド型ヘリカルスキヤン磁気記録再生装置に
おいて、能動期間にオーバーラツプ期間を形成した2個
の回転ヘッドにより音声FM信号を録音し、これを再生
する場合、2個の回転ヘッドからそれぞれ信号のオーバ
ーラツプ期間をもって時系列的に再生させる再生FM信
号の復調信号で継ぎ合わせて連続信号とする。
For example, in a two-head helical scan magnetic recording/reproducing device, when an audio FM signal is recorded and played back by two rotary heads that form an overlap period in the active period, each of the two rotary heads records an overlap period of the signal. The demodulated signal of the reproduced FM signal which is reproduced in time series is spliced together to form a continuous signal.

しかし、この場合に各回転ヘッドに対応して設けたFM
復調回路間にオフセット電圧差や感度差があると、この
継ぎ合わせ点での信号し・くルが一致せず、切換雑音を
発生することになる。
However, in this case, an FM
If there is an offset voltage difference or a sensitivity difference between the demodulation circuits, the signal curves at this joint point will not match, resulting in switching noise.

本発明はかかる切換雑音を除去する切換雑音除去装置を
提供するものであり、以下その一実施例をもって説明す
る。
The present invention provides a switching noise removal device for removing such switching noise, and will be described below with reference to one embodiment thereof.

第1図は本発明を適用した2ヘツド型ヘリカルスキヤン
磁気記録再生装置の再生系のブロック図であり、■、及
び1□は回転シリンダ(図示まず)に互いに180度の
角度で配置された第1及び第2の回転ヘッドを示す。回
転ヘッド11と12の能動期間にオーバーラツプ期間を
形成すべく:1801fを超える巻付角で回転シリンダ
に巻付けられる磁気テープ2上の不連続な傾斜トランク
に記録された音声1”M信号は回転ヘッド11.12に
より交互に時系列的に再生される。回転ヘッド1い12
からの各再生FM信号はFMM調器31及び3□で復調
された後、不要な冒周波信号を除去するローパスフィル
タ41.42を介して信号切換用の第1のスイッチング
回路5の固定接点5、及び52にそれぞれ供給される。
FIG. 1 is a block diagram of the reproducing system of a two-head helical scan magnetic recording and reproducing apparatus to which the present invention is applied. 1 and 2 show the first and second rotating heads. In order to form an overlapping period between the active periods of the rotating heads 11 and 12: the audio 1"M signal recorded on a discontinuous inclined trunk on a magnetic tape 2 wrapped around a rotating cylinder with a wrapping angle of more than 1801f is rotated. The rotating heads 1 and 12 are reproduced alternately and in chronological order by the heads 11 and 12.
Each reproduced FM signal from the , and 52, respectively.

なお、ローパスフィルタ4□と固定接点5□間には後述
する加算回路10が設けられている。このスイッチング
回路5は入力端子T1から入力される切換信号Soによ
って切換制御される。切換信号S。は回転ヘッド1.と
1□゛の能動期間のオーバーランプ期間内の所定の時刻
においてレベル状態が変わり、rHJ状態でスイッチン
グ回路5の可動接点5.を固定接点51に、またrLJ
状態でその可動接点53を固定接点5□に切換接続する
。これにより回転ヘッド11.1□ゝ及び復調器38.
32からそれぞれ時系列的に再生、復調された各再生信
号は継ぎ合わされて−の連続信号とされて出力端子T2
からとり出される。
Note that an adder circuit 10, which will be described later, is provided between the low-pass filter 4□ and the fixed contact 5□. This switching circuit 5 is switched and controlled by a switching signal So input from an input terminal T1. Switching signal S. is the rotating head 1. The level state changes at a predetermined time within the overramp period of the active period of and 1□゛, and the movable contact 5. of the switching circuit 5 changes in the rHJ state. to the fixed contact 51, and rLJ
In this state, the movable contact 53 is switched and connected to the fixed contact 5□. As a result, the rotating head 11.1□ゝ and the demodulator 38.
The reproduced signals respectively reproduced and demodulated in time series from 32 are spliced into a negative continuous signal and sent to the output terminal T2.
taken out from

また、ローパスフィルタ41の出力及び加算回路10の
出力はそれぞ゛れ第2及び第3のスイッチング回路60
.62を介して第1及び第2のサンプルアンドホールド
回路70.7□に入力される。サンプルアンドホールド
回路71.72は回転ヘッド11.1□がそれぞれ磁−
気テープ2に接していない(非能動期間)における各F
M後後回回路オフセット電圧を検出保持するもので、両
サンプルアンドボールド回路71.7□によって検出保
持されたオフセット電圧は差動増幅器8によってその差
を検出されその差信号は適当な制御時定数をあたえるた
めのRCフイルク回路9を介して加算回路10に加えら
れる。
Further, the output of the low-pass filter 41 and the output of the adder circuit 10 are connected to the second and third switching circuits 60, respectively.
.. 62 to the first and second sample-and-hold circuits 70.7□. The sample-and-hold circuits 71 and 72 are arranged so that the rotating heads 11.1□ are
Each F when not in contact with air tape 2 (inactive period)
The offset voltage detected and held by both sample-and-bold circuits 71.7□ is used to detect the difference between the offset voltages detected and held by both sample-and-bold circuits 71. is added to an adder circuit 10 via an RC filter circuit 9 for providing .

切換信号S。は第2及び第3のスイッチング回路61.
62を制御するために、インバータ12を介して第1の
スイッチ制御回路111に、才た直接第2のスイッチ制
御回路11□にそれぞれ入力される。スイッチ制御回路
111及び112において131.13□は遅延回路、
141.14□はモノマルチ・パイブレークであり、各
遅延回路と各モノマルチ・パイブレークの出力信号S、
 S、及びS6、S2がそれぞれ入力されるアン1−ケ
−1−15,及び152からの各制御信号S6及びS3
が第2及び第3のスイッチング回路6、及び62を制御
する。
Switching signal S. are the second and third switching circuits 61.
62, the signal is input to the first switch control circuit 111 via the inverter 12, and is directly input to the second switch control circuit 11□, respectively. In the switch control circuits 111 and 112, 131.13□ is a delay circuit;
141.14□ is a mono-multi pie break, and the output signal S of each delay circuit and each mono-multi pie break is
S, and each control signal S6 and S3 from Annex 1-K-1-15 and 152 to which S6 and S2 are input, respectively.
controls the second and third switching circuits 6 and 62.

ここで第2及び第3のスイッチング回路6.及び6□は
制御信号S6及びS3か「H」のとき閉成し、またrL
jのとき開放する。
Here, the second and third switching circuits 6. and 6□ are closed when control signals S6 and S3 are "H", and rL
Open when j.

サラに、ローパスフィルタ4□の出力及び加算回蕗10
の出力は差動増幅器16にそれぞれ入力される。
Finally, the output of the low-pass filter 4□ and the addition time 10
The outputs of are respectively input to the differential amplifier 16.

差動増幅器16の出力は第4のスイッチング回路17の
開成時にとり込まれ、このとり込まれた差信号は適当な
制御時定数を与えるFLCフィルタ回路18及び所要の
バッファアンプ22を介してFMM調器32の感度を制
御する。
The output of the differential amplifier 16 is taken in when the fourth switching circuit 17 is turned on, and this taken-in difference signal is subjected to FMM adjustment via an FLC filter circuit 18 that provides an appropriate control time constant and a necessary buffer amplifier 22. The sensitivity of the device 32 is controlled.

切換信号S。はまた第4のスイッチング回路17を制御
するために第3のスイッチ制御回路113に入力される
。スイッチング回路113において切換信号S。
Switching signal S. is also input to the third switch control circuit 113 to control the fourth switching circuit 17. In the switching circuit 113, a switching signal S is generated.

はモノマルチ・パイブレーク19□、192にそれぞれ
入力される。モノマルチ・ハイフレーク19、の出力信
号S7は直接アンドゲート20の一方の入力端子に、才
だモノマルチ・パイブレーク19□の出力信号S8はイ
ンバータ21を介してその他方の入力端子にそれぞれ入
力される。アントゲ′−ト20から出力される制御信号
S9は第4のスイッチング回路17を動作せしめる。
are input to mono-multi pie breaks 19□ and 192, respectively. The output signal S7 of the mono-multi high flake 19 is directly input to one input terminal of the AND gate 20, and the output signal S8 of the mono-multi pie break 19□ is input to the other input terminal via the inverter 21. be done. The control signal S9 output from the ant gate 20 causes the fourth switching circuit 17 to operate.

ここで第4のスイッチング回路17は制御信号S。Here, the fourth switching circuit 17 receives the control signal S.

がrHJのとき頃成し、また「L」のとき開放する。It is formed when the voltage is rHJ, and it is opened when the voltage is "L".

以下、その動作を第2図のタイムチャートを参照して説
明するが、第2図においてA及びBは各ヘッド1□及び
12に対応する復調波形、Dはオーバーランプ期間、ま
たt、〜t4は信号の継き合わせ時刻をそれぞれ示し、
特に後調波形A、Bについてはオーバーラツプ期間て信
号レベルか一致しない状態を表わしている。
The operation will be explained below with reference to the time chart in FIG. 2. In FIG. 2, A and B are demodulated waveforms corresponding to each head 1□ and 12, D is an overramp period, and t, ~t4 indicates the signal splicing time, and
Particularly, for the later harmonic waveforms A and B, the signal levels do not match during the overlap period.

先ず、オフセット電圧差の補正制御系について説明する
と、第1のサンプルアンドホールト回路7Iは制御信号
S6の「14」からrLJへの立下りに応答して回転ヘ
ット11の能動期間が開始する直前の非能動期間におけ
る回転ヘッド1゜の復調系のオフセット電圧を保持し、
その電圧を差動増幅器8の一方の入力端子に入力すると
共に第2のサンプルアントホールド回路7□は制御信号
S、の「I]」からrLJへの立下りに応答して回転ヘ
ッド12の能動期間か開始する直前の非能動期間におけ
る回転ヘッド12の復調系のオフセット電圧を保持し、
その電圧を差動増幅器8の他方の入力端子に入力する。
First, to explain the offset voltage difference correction control system, the first sample-and-halt circuit 7I responds to the fall of the control signal S6 from "14" to rLJ immediately before the active period of the rotating head 11 starts. maintain the offset voltage of the demodulation system of the rotating head 1° during the inactive period of
This voltage is input to one input terminal of the differential amplifier 8, and the second sample ant-hold circuit 7□ activates the rotary head 12 in response to the fall of the control signal S from "I" to rLJ. holding the offset voltage of the demodulation system of the rotary head 12 during the inactive period immediately before the start of the period;
The voltage is input to the other input terminal of the differential amplifier 8.

差動増幅器8はかかる両オフセット電圧のレベル差に応
答する差信号を出力する。この差信号は加算回路IOに
より、両オフセット電圧のレベル差が0となるように回
転ヘット1□に対応する復調回路の出力に加えられる。
The differential amplifier 8 outputs a difference signal responsive to the level difference between the two offset voltages. This difference signal is added by the adder IO to the output of the demodulation circuit corresponding to the rotating head 1□ so that the level difference between both offset voltages becomes 0.

これにより両復調回路間のオフセット電圧差にもとづく
両復調出力のレベル差が補正される。
This corrects the level difference between the demodulated outputs based on the offset voltage difference between the demodulated circuits.

次に感度差の制御系を説明すると、制御信号S。Next, the control system for sensitivity difference will be explained.Control signal S.

のrLJからrHJへの立上りに応答するスイッチング
回路17の閉成により、両回転ヘッド11.12が共に
能動状態となるときの両復調回路からの復調出力間の差
情報がとり込まれる。
Closing of the switching circuit 17 in response to the rise of rLJ to rHJ captures the difference information between the demodulated outputs from both demodulation circuits when both rotary heads 11.12 are in the active state.

この差情報は上述のオフセント電圧差補正後においては
両復調回路間の感度差を表わすものとなる。そこで、こ
の差情報にもとつき感度差がOとなるように復調器3□
の感度が補正され、両破調回路の感度が一致される。な
お、この制御はFM復調器が例えばパルスカラン1−形
であれば、パルスの振幅を変化させればよいものである
This difference information represents the sensitivity difference between the two demodulation circuits after the above-mentioned offset voltage difference correction. Therefore, based on this difference information, the demodulator 3□
The sensitivities of are corrected, and the sensitivities of both harmonic circuits are matched. Note that this control can be carried out by changing the amplitude of the pulse if the FM demodulator is, for example, a pulse Callan 1-type.

また、オフセット電圧差の制御系と感度差の制御系の応
答時定数に適尚な差を持たせることにより確実な動作を
行なうことができる。
Furthermore, by providing an appropriate difference in response time constant between the offset voltage difference control system and the sensitivity difference control system, reliable operation can be achieved.

本発明は上述の実施例に限定されることなく、例えばス
イッチ制御回路111〜11.を他のパルス回゛路で置
換することも可能であると共に、スイッチング回路17
を差動増幅器16の前段に設けることもiiJ能てあり
さらに、加算回路を回転ヘッドII側に配置したり、復
調器31の感度を補正するなど種々の態様をとりえる。
The present invention is not limited to the above-described embodiments, but includes, for example, the switch control circuits 111 to 11. It is also possible to replace the switching circuit 17 with another pulse circuit.
It is also possible to provide the adder circuit at the front stage of the differential amplifier 16, and various other configurations can be taken, such as arranging the adding circuit on the rotary head II side or correcting the sensitivity of the demodulator 31.

以上、本発明によれば不連続トラックから時系列的に再
生される各再生信号を順次継ぎ合わせて連続再生信号を
形成する所謂ヘリカルスキャン方式において、復調回路
間のオフセット電圧差及び感度差に起因する信号の継ぎ
合わせ部分における信・号電圧差を等しくするよう制御
するので切換雑音のない原音に高忠実度な再生音声信号
を得ることができる。
As described above, according to the present invention, in the so-called helical scan method in which a continuous reproduction signal is formed by sequentially splicing each reproduction signal reproduced in time series from discontinuous tracks, the difference in offset voltage and sensitivity between demodulation circuits Since the signal voltage difference in the spliced portion of the signals is controlled to be equal, it is possible to obtain a reproduced audio signal with high fidelity to the original sound without switching noise.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の再生系回路のブロック図を
、及び第2図は同回路の説明に供する波形図をそれぞれ
示す。 1い12・・回転ヘッド、30.3□・・・FM復調器
、41.42  ・ローパスフィルタ、5.60.6□
、17・・・スイッチング回路、71.72・・・サン
プルアンドホールド回路、8.16・・・差動増幅器、
1o・・・加算器、IL、112.113・・・スイッ
チ制御回路手続補正書(方式) 昭和58年5月76日 特許庁長官 殿 1、事件の表示 昭和58年特許願第15028号 2 発明の名称 切換雑音除去装置 3 補正をする者 事件との関係 特許出願人 住所 東京都小平市鈴木町1丁目153番地〒187 
     (0423)42−1111昭和58年4月
6日 5、補正の対象 願書の発明の名称の欄、及び明細書の発明の名称の欄。 6、補正の内容 (1)願書の発廟の名称の欄の記載を別紙の通り補正す
る。 (2)明細書の発明の名称の欄の記載[切換雑音除去装
置(2)」を「切換雑音除去装置」に補正する。 7、添付書類の目録
FIG. 1 shows a block diagram of a reproducing circuit according to an embodiment of the present invention, and FIG. 2 shows a waveform diagram for explaining the circuit. 1-12...Rotating head, 30.3□...FM demodulator, 41.42 -Low pass filter, 5.60.6□
, 17... Switching circuit, 71.72... Sample and hold circuit, 8.16... Differential amplifier,
1o...Adder, IL, 112.113...Switch control circuit procedural amendment (method) May 76, 1980 Director General of the Patent Office 1. Indication of the case 1988 Patent Application No. 15028 2 Invention Name switching noise removal device 3 Relationship with the case of the person making the amendment Patent applicant address 1-153 Suzuki-cho, Kodaira-shi, Tokyo 187
(0423) 42-1111 April 6, 1982 5, column of title of invention of application subject to amendment and column of title of invention of specification. 6. Contents of amendment (1) The entry in the column of the name of the temple of origin in the application form will be amended as shown in the attached sheet. (2) The description "Switching noise removal device (2)" in the column of the title of the invention in the specification is corrected to "Switching noise removal device." 7. List of attached documents

Claims (1)

【特許請求の範囲】 能動期間にオーバーラツプ期間を形成した第1及び第2
の回転ヘッドによりFM信号の記録再生を行なう回転ヘ
ッド型磁気記録再生装置において、前記第1及び第2の
回転ヘッドからの各再生FM信号をそれぞれ復調する第
1及び第2のFM復調回路と、 前記第1及び第2の回転ヘッドの各非能動期間における
前記第1及び第2のFM復調回路の各出力レベルをそれ
ぞれ検出保持する第1及び第2の検出保持回路と、 前記第1及び第2の回転ヘッドが共に能動期間にある前
記オーバーラツプ期間において前記第1及び第2のFM
復調回路の両復調出力のレベル差を検出する検出回路と
からなり、 前記第1及び第2の検出保持回路でそれぞれ検出保持し
た前記各出力レベルのレベル差に応答する差信号により
前記第1及び第2のFM復調回路間のオフセント電圧差
にもとづく復調出力間のレベル差を補正制御すると共に
、前記検出回路で検出した前記復調出力間のレベル差に
応答する差信号により前記第1及び第2のFM復調回路
間の感度差をそれぞれ補正制御する切換雑音除去装置。
[Claims] The first and second active periods form an overlapping period.
A rotary head type magnetic recording and reproducing device that records and reproduces FM signals using a rotary head, first and second FM demodulation circuits that demodulate each reproduced FM signal from the first and second rotary heads, respectively; first and second detection and holding circuits that respectively detect and hold each output level of the first and second FM demodulation circuits during each inactive period of the first and second rotating heads; the first and second FM during the overlap period when both rotating heads are in the active period;
a detection circuit that detects a level difference between both demodulated outputs of the demodulation circuit, and detects the first and second outputs by a difference signal responsive to the level difference between the respective output levels detected and held by the first and second detection and holding circuits, respectively. A second FM demodulation circuit corrects and controls a level difference between demodulated outputs based on an offset voltage difference between the first and second FM demodulation circuits, and a difference signal responsive to a level difference between the demodulated outputs detected by the detection circuit. A switching noise removal device that corrects and controls sensitivity differences between FM demodulation circuits.
JP58015028A 1983-02-01 1983-02-01 Eliminating device of switching noise Granted JPS59142709A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58015028A JPS59142709A (en) 1983-02-01 1983-02-01 Eliminating device of switching noise

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58015028A JPS59142709A (en) 1983-02-01 1983-02-01 Eliminating device of switching noise

Publications (2)

Publication Number Publication Date
JPS59142709A true JPS59142709A (en) 1984-08-16
JPH0221074B2 JPH0221074B2 (en) 1990-05-11

Family

ID=11877376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58015028A Granted JPS59142709A (en) 1983-02-01 1983-02-01 Eliminating device of switching noise

Country Status (1)

Country Link
JP (1) JPS59142709A (en)

Also Published As

Publication number Publication date
JPH0221074B2 (en) 1990-05-11

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