JPH02220431A - Formation of semiconductor substrate - Google Patents

Abstract

PURPOSE:To prevent a warp of a silicon substrate by forming the thin layer of a silicide on the rear which faces the surface of a single crystal silicon substrate and forming a III-V compound semiconductor single crystal epitaxial layer on the surface of the single crystal silicon substrate. CONSTITUTION:A thin layer 2 of a silicide, a compound which is formed by combining a metal having a high melting point with silicon is formed on the rear facing the surface of a single crystal silicon substrate 1 that forms an epitaxial layer. After that, a III-V compound semiconductor single crystal epitaxial layer 3b is formed on the surface of the single silicon substrate 1. Consequently, the growth of the GaAs epitaxial layer 3b on the surface of a wafer 1 allows a warp caused by the GaAs layer 3b to be cancelled by the warp made in the opposite direction by the silicide layer 2. An epitaxial wafer having a flat III-V compound semiconductor epitaxial layer 3b on its surface is obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a semiconductor substrate in which a single crystal epitaxial layer of an m-v group compound semiconductor, particularly a GaAs semiconductor, is formed on a single crystal silicon substrate. The present invention relates to a method for forming a semiconductor substrate that is intended to reduce warpage as a semiconductor substrate.

[Conventional technology]

In general, ■-■ group compound semiconductors such as GaAs are utilized in highly functional and high-performance semiconductor devices by taking advantage of their excellent characteristics. However, compound semiconductor crystals are generally expensive, and there are also problems such as difficulty in obtaining large-area, high-quality substrate crystals. To deal with this, several methods have been proposed in which cheap, high-quality, lightweight silicon (Si) is used as a substrate, and compound semiconductor layers are stacked on this Si substrate to form a semiconductor device (for example, (i )R,P.

Ga1e, J., C.C., Fan, B.Y., Tsaur;
G.W.

Turner, and F. M., Davis, I.
EEE Elect-ron Device Le
tt, , (IEφE Electron Device Letter) EDL-2, 169 (1981);
(■) M, Akiyama, Y,
Kawarada.

and K, Kaminishi, Jpn, J.
= Appl, Phys.

(Journal of the Japanese Society of Applied Physics), 23 L843 (198
4) ; (ui) W, I, Wang, Ap
pl, Phys, Lett, (Applied Physics Letters) 44.1149 (1984), etc.), S.
Comparatively high quality compound semiconductor crystal films are being formed on i-substrates.

[Problem to be solved by the invention]

When a semiconductor substrate is obtained by laminating an m-v group compound semiconductor layer on a Si substrate, the Ga As growth layer has the following characteristics.

There remains the problem that tensile stress due to the difference in thermal expansion coefficient with the Si substrate acts on the epitaxial wafer, causing warpage in the epitaxial wafer in which GaAs is grown on the Si substrate. For example, GaAs is deposited on a 280 μm thick Si substrate.
It is known that when an epitaxial layer is grown to about 4 .mu.m, the center of the wafer will warp downward by about 50 .mu.m even on a 2 inch diameter substrate (FIG. 3).

This large warpage becomes a problem when attempting to manufacture a semiconductor device using a GaAs layer grown on a Si substrate, especially in a photolithography process, and causes problems such as a significant decrease in manufacturing yield. Furthermore, when applying this GaAs/Si substrate to a space solar cell, the power generated per unit weight of the solar cell (weight efficiency) becomes a problem. In order to sufficiently increase weight efficiency, it is necessary to reduce the thickness of the Si substrate to at least 100 μm or less, but in this case, the wafer warpage becomes even greater, and the cover glass bonding process during the solar cell manufacturing process and This poses a problem in that it causes difficulty in the welding process during assembly, causes cell cracking, and significantly reduces yield, making it difficult to manufacture high-performance space solar cells.

The purpose of the present invention is to solve the above-mentioned problems in the prior art, and
To provide a semiconductor substrate forming method capable of reducing warpage of aAs/Si epitaxial wafers, facilitating work in the manufacturing process of various semiconductor devices using large GaAs/Si wafers, and improving manufacturing yield. be.

[Means to solve the problem]

The above object is to provide a method for forming a semiconductor substrate by forming an m-v group compound semiconductor single crystal epitaxial layer on a single crystal silicon substrate. (b) forming a thin layer of silicide, which is a compound of a high melting point metal and silicon, on the back surface facing the front surface; This can be achieved by using a formation method including a step of forming a crystalline epitaxial layer.

(Function) The coefficient of thermal expansion of silicide varies depending on its composition, deposition temperature, firing temperature, etc., but is generally larger than that of silicon. Therefore, tensile stress acts on the silicide layer, and as shown in FIG. The Si substrate 1 is curved upward in a convex manner, with the silicide layer on the inside.For this reason, in an epitaxial wafer in which a GaAs epitaxial layer is grown on the front surface of a wafer on which a silicide layer has been formed on the back surface, the silicide layer causes the Si substrate 1 to curve in the opposite direction. The warpage makes it possible to cancel out the warpage caused by the GaAs layer.Therefore, as shown in FIG. 2, an epitaxial wafer having a flat 1-2 group compound semiconductor epitaxial layer 3b on its surface can be realized.

As can be seen from the fact that silicide is used as an electrode and wiring material in integrated circuits, it is a stable material with extremely low resistance. Therefore, the silicide layer 2 can be used as is as a back electrode material of a semiconductor device.

The tensile stress generated in the silicide layer can be selected over a wide range depending on the silicide material, the substrate temperature at the time of deposition, the subsequent heat treatment temperature, the thickness of the silicide layer, etc., so it can be optimized depending on the epitaxial conditions of the GaAs film, device manufacturing conditions, etc. possible, with a high degree of freedom in the manufacturing process.

Volumetric contraction occurs during high-temperature heat treatment (sintering) during silicide formation, and tension-type internal stress is also generated in the silicide. This internal stress is maintained even at high temperatures, and as a result, the Si substrate becomes convex upward even during GaAs growth (GaAs
Bend the surface on which you want to grow s outward). Therefore, GaA
The lattice constant of Si on the surface growing s is broadened, and Ga
This is closer to the lattice mismatch of As, and conventionally, when GaAs was grown directly on an 81 substrate, S
It is also effective in reducing crystal defects such as dislocations occurring at the interface between i and GaAs, and higher quality GaAs epitaxial crystals can be formed.

〔Example〕

An embodiment of the present invention using GaAs, which is a typical ■-■ compound semiconductor, will be described below with reference to one drawing.

FIG. 1 is a diagram illustrating the steps of a method for forming a semiconductor substrate according to the present invention. A Si substrate with a surface orientation of (100) and a thickness of 200 μm is fixed to a suitable jig, placed in a sputtering apparatus, and the substrate temperature is heated to 200° C.

Thereafter, for example, TiSi is used as a target material and is deposited to a thickness of about 2 μm on the Si substrate. At that time, it is necessary to prevent silicide from adhering to the surface on which GaAs is to be grown.1 For example, by covering the surface on which GaAs is to be grown with a suitable jig, or by It is possible to form a protective film such as a thin oxide film or a coating of a highly heat-resistant resin, and then remove the protective film after depositing the silicide film. Note that the Si substrate 1 after silicide deposition remains substantially flat as shown in FIG. 1(a) because the silicide film 2 was deposited at a low temperature and no sintering was performed.

This substrate was cleaned, placed in an MOCVD furnace, and heated to 900°C.
Heat treatment is performed for 10 to 30 minutes in a hydrogen atmosphere at the above temperature to clean the GaAs growth surface.The substrate temperature is lowered to about 400°C and about 10 nm of amorphous GaAs is removed.
Deposit m. The silicide deposited during surface cleaning treatment at high temperatures is sintered and causes volume contraction, and when growing amorphous GaAs, the difference in thermal expansion coefficient between Si and silicide due to a temperature difference of approximately 500°C , tension-type internal stress occurs in silicide. Due to this internal stress, the Si substrate becomes amorphous GaAs as shown in Figure 1(b).
When growing 13a, it curves slightly upward (with the surface on which GaAs is grown outward).

Next, the substrate temperature is raised to 750° C. and normal GaAs epitaxial growth is performed at this growth temperature.

Since the difference between the temperature of the silicide and the temperature during sintering is small, the internal stress of the silicide due to the difference in thermal expansion coefficient is reduced, and the Si
Although the warpage of the substrate has been reduced, a slightly upwardly convex warp remains [Fig. 1(c)].

Furthermore, amorphous GaAs becomes single crystal during the temperature raising process for GaAs growth and in the initial stage of epitaxial growth.

Even in the case of an epitaxial wafer in which approximately 5 μm of GaAs was grown on a 2-inch Si substrate in the above process, the warpage at the center of the wafer was less than ±10 μm, and it was confirmed that the warp was alleviated. Also, the specific resistance of silicide is about 2
It has a low value of 0 μΩ or less and can be used as an electrode. 6 If the Si substrate thickness and GaAs film thickness are different from those in the above example, the silicide film thickness, composition ratio, formation temperature, etc. may be adjusted to cancel the amount of warpage. By making adjustments, it is possible to create a board without warping.

Also, during epitaxial growth of GaAs, the wafer is
a As s The growth surface is slightly curved upward.

This broadens the lattice constant of Si, which leads to the increase in GaAs and S.
This is advantageous in alleviating the lattice mismatch with i. this is,
Contributes to improving the crystallinity of GaAs epitaxial crystals on Si substrates.

Furthermore, it was confirmed that the semiconductor substrate formed according to the present invention has less warpage even if the silicide film on the back surface is removed after epitaxial growth of GaAs than a semiconductor substrate in which GaAs is epitaxially grown without forming a silicide film on the back surface. . This is considered to be due to plastic deformation that relieves the stress received from the silicide film due to the temperature during GaAs growth.

As the silicide material, other than Ti, various high melting point metals 1 such as Zr, V, Ta, Mo, W+Co, Ir, etc. can be used. In addition to the methods described here, there are also methods for forming silicide, such as a method of forming Si and a high-melting point metal simultaneously or alternately by vapor deposition or sputtering,
Methods include depositing a high melting point metal on a substrate and causing Si to react with the high melting point metal through high temperature treatment to form silicide.
It can be selected depending on the thickness of the Si substrate used, the subsequent formation process of the compound semiconductor crystal film, and the manufacturing process of the semiconductor device.

〔Effect of the invention〕

As described above, according to the present invention, m-v having no warpage
A semiconductor substrate having a group compound semiconductor single crystal epitaxial layer on the surface of a Si substrate can be manufactured economically,
In addition, it is possible to facilitate operations in the manufacturing process of various semiconductor devices using large GaAs/Si wafers and improve manufacturing yields.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a wafer explaining an embodiment of the present invention, in which (a) is a wafer with a silicide film deposited on the back surface of the Si wafer, and (b) is a wafer with a GaA film deposited on the front surface of the wafer.
(c) is a cross-sectional view of the wafer at room temperature after GaAs growth;
3 is a wafer cross-sectional view for explaining the structure of a semiconductor substrate obtained by employing the semiconductor substrate forming method of one embodiment of the present invention; FIG. 3 is a wafer cross-sectional view for explaining the prior art; Figure 4 shows a silicide film deposited on the backside of the wafer. FIG. 3 is a diagram showing a cross section of a sintered wafer at room temperature. Explanation of symbols 1...Si substrate 2...Silicide film 3a...Amorphous GaAs layer 3b...GaAs epitaxial layer

Claims (1)

[Claims] 1. In a method for forming a semiconductor substrate in which a III-V group compound semiconductor single crystal epitaxial layer is formed on a single crystal silicon substrate, (a) on the surface of the single crystal silicon substrate on which the epitaxial layer is to be formed; A step of forming a thin layer of silicide, which is a compound of a high melting point metal and silicon, on the opposing back surfaces, and (b) thereafter, forming a III-V group compound semiconductor single crystal epitaxial layer on the surface of the single crystal silicon substrate. 1. A method for forming a semiconductor substrate, the method comprising: forming a semiconductor substrate.