JPH02220382A - Soldering clip lead - Google Patents

Soldering clip lead

Info

Publication number
JPH02220382A
JPH02220382A JP3930089A JP3930089A JPH02220382A JP H02220382 A JPH02220382 A JP H02220382A JP 3930089 A JP3930089 A JP 3930089A JP 3930089 A JP3930089 A JP 3930089A JP H02220382 A JPH02220382 A JP H02220382A
Authority
JP
Japan
Prior art keywords
circuit board
lead
solder
clip
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3930089A
Other languages
Japanese (ja)
Inventor
Keisuke Someya
染谷 恵介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP3930089A priority Critical patent/JPH02220382A/en
Publication of JPH02220382A publication Critical patent/JPH02220382A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3468Applying molten solder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof

Landscapes

  • Manufacturing Of Electrical Connectors (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)

Abstract

PURPOSE:To increase the mounting density of chip parts to a circuit board by installing a solder-resistant thin and flat spacer in such a way that its slit encloses a circuit board along the thickness of the circuit board, and immersing lead electrode parts in fused solder. CONSTITUTION:For chip parts 5, the clip part of a clip lead 3 is engaged with lead electrodes 2 of a circuit board 1 applied by reflow soldering, and a space 6 of a glass epoxy plate is inserted between the clip leads and part electrodes of mounted chip parts. The part of the lead electrodes 2 is then immersed in fused solder 8 in a solder tank 7, while completely preventing direct contact of the solder part of the chip part 5 mounted on the circuit board 1 with the fused solder 8. The mounting density of chip parts to the circuit board can thus be increased.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は混成集積回路装置の製造工程等で採用され得る
クリップリードの半田付は方法に関し、さらに詳しくは
、前記回路基板のリード電極にクリップリードを半田付
けする等の場合に好都合に採用でき、しかも、チップ部
品の実装密度を改善できる等の利点をも持つクリップリ
ードの半田付は方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for soldering clip leads that can be employed in the manufacturing process of hybrid integrated circuit devices. The present invention relates to a method for soldering clip leads that can be conveniently employed in cases such as soldering leads, and which also has the advantage of improving the packaging density of chip components.

[従来の技術] 従来、リードを備えた混成集積回路装置の製造は、回路
基板の部品電礪上にクリーム半田を印刷してからチップ
部品を搭載し、リフロー炉で熱処理して部品重陽にチッ
プ部品を半田付けした後、回路基板縁辺部に設けられて
いるリード電極にクリップリードな浸漬法で半田付けす
ることにより行なっている。この浸漬法では、リードの
先端が下方になるようにし、基板をリード電極が完全に
埋没するまで溶融半田中に浸漬する。溶融半田はクリッ
プリードの付いたリード電極を濡らし、半田は基板が半
田槽から引き上げられた後、硬化して基板のリード電極
にクリップリードが半田付けされる。
[Prior art] Conventionally, the production of hybrid integrated circuit devices with leads involves printing cream solder on the component capacitors of the circuit board, mounting the chip components, and heat-treating them in a reflow oven to attach the chips to the components. After the components have been soldered, they are soldered to lead electrodes provided on the edge of the circuit board using a clip-lead dipping method. In this dipping method, the tip of the lead is placed downward, and the substrate is immersed in molten solder until the lead electrode is completely buried. The molten solder wets the lead electrode with the clip lead attached, and after the board is pulled up from the solder bath, the solder hardens and the clip lead is soldered to the lead electrode of the board.

[発明が解決しようとする課題] しかしながら、上記従来の方法により混成集積回路基板
のリード電極にクリップリートの半田付けを行なう場合
、例えば第2図及び第3図に示すように、回路基板lの
縁辺部に設けたリード電極2と、回路基板面上に搭載さ
れたチップ部品5の半田付けされている部分である部品
t[=4との間隔dを狭くすると、リード電極2にクリ
ップリード3を半田付けする工程において、回路基板l
の縁辺部を溶融半田中に没する際、チップ部品の半田付
は部分である部品電極の少なくとも一部が溶融半田液面
に極めて接近することになり、時には溶融半田の液面に
接触したりする。このため、これら半田付は部分が再加
熱され、半田が溶け、搭載チップ部品が位置ずれを起こ
したり脱落したりしてしまうという現象が生じ得る。こ
れを防ぐために、従来の方法では、回路基板縁辺部に設
けられるリード電極とチップ部品搭載用の部品電極との
末端間隔dを少なくとも1.5++m程度とることが必
要であると考えられていた。この間隔dは、結局チップ
部品搭載不可能部分すなわちデッドスペースの大きさを
表わすことになるので、間隔が大きいほと回路基板の実
装密度が制限されることを意味する。
[Problems to be Solved by the Invention] However, when soldering a clip rete to a lead electrode of a hybrid integrated circuit board using the above-mentioned conventional method, for example, as shown in FIGS. 2 and 3, When the distance d between the lead electrode 2 provided on the edge and the soldered part of the chip component 5 mounted on the circuit board surface d is narrowed, the clip lead 3 is attached to the lead electrode 2. In the process of soldering the circuit board l
When the edge of the chip is immersed in the molten solder, at least a part of the component electrode, which is a part of the soldering of the chip component, comes very close to the molten solder liquid level, and sometimes comes into contact with the molten solder liquid level. do. For this reason, the soldered parts may be reheated, the solder may melt, and the mounted chip components may become misaligned or fall off. In order to prevent this, in the conventional method, it was thought that it was necessary to provide an end distance d of at least about 1.5++ m between the lead electrode provided at the edge of the circuit board and the component electrode for mounting the chip component. This distance d ultimately represents the size of the portion where chip components cannot be mounted, that is, the size of the dead space, so that the larger the distance, the more the mounting density of the circuit board is restricted.

本発明の目的は、上記従来の欠点を克服し、従来の方法
に比しデッドスペースが実質的に小さく、リード電極の
末端縁の近くまでチップ部品が搭載されていても溶融半
田の熱的影響で搭載チップ部品に落下や位置ずれを生じ
させることなく、クリップリードな回路基板のリード電
極に半田付けすることのできる改善されたクリップリー
ドの半田付は方法を提供することである。
It is an object of the present invention to overcome the above-mentioned conventional drawbacks, to provide a method that has substantially smaller dead space than the conventional method, and to prevent thermal effects of molten solder even when chip components are mounted close to the terminal edges of lead electrodes. It is an object of the present invention to provide an improved clip-lead soldering method that can be soldered to lead electrodes of a clip-lead circuit board without causing drop or misalignment of mounted chip components.

〔課題を解決するための手段〕[Means to solve the problem]

チップ部品を搭載した混成集積回路基板のり−ド電庵に
、クリップリードのクリップ都を嵌合させた1&、該ク
リップ嵌合部を溶融半田中に浸漬することによって、ク
リップリードをリード電極に半田付けする際に、前記リ
ード電極2と前記部品電極4との間(第2図のdで示す
部分)に、半田Jに濡れにくく耐熱性に優れ、熱伝導率
の小さい耐半田性の材料(例えばガラスエポキシ板)で
つくられたスリットを有する薄い平板状の遮断用治具(
スペーサー)を、スリットで回路基板をその厚さ方向に
挾むように取り付けて半田付けを行なうことにより、回
路基板上の搭載チップ部品半田付は部分(部品電橋上に
ある)と溶融半田との直接接触を避けると共に溶融半田
から搭載チップ部品半田付は部分への熱の伝達を充分に
遮断することによって上記課題を解決した。すなわち、
上述のようにすることによって、前記リード電極2と前
記部品電極4との木端間隔dを従来法の場合より小さく
することができ、回路基板の実装密度を実質的に改善す
ることができた。
The clip lead of the clip lead is fitted to the hybrid integrated circuit board board on which the chip component is mounted, and the clip lead is soldered to the lead electrode by immersing the clip fitting part in molten solder. When attaching, between the lead electrode 2 and the component electrode 4 (the part shown by d in FIG. 2), a solder-resistant material (not easily wetted by solder J, excellent in heat resistance, and with low thermal conductivity) is placed between the lead electrode 2 and the component electrode 4 (the part shown by d in FIG. 2). For example, a thin plate-shaped blocking jig with slits made from a glass epoxy plate (for example, a glass epoxy plate)
By attaching a spacer to sandwich the circuit board in its thickness direction with a slit and soldering, the soldering of the chip components mounted on the circuit board can be done by directly contacting the part (on the component bridge) with the molten solder. The above problems were solved by avoiding heat transfer from the molten solder to the mounted chip components and sufficiently blocking the transfer of heat to the parts. That is,
By doing as described above, the distance d between the ends of the lead electrodes 2 and the component electrodes 4 can be made smaller than in the conventional method, and the mounting density of the circuit board can be substantially improved. .

本発明の方法で使用するスペーサーは5半田に濡れにく
く耐熱性に優れ、熱伝導率の小さい耐半田性の材料でつ
くられた、回路基板を挟める幅のやS長いスリットを有
する薄い平板状の遮断用治具である。すなわちスペーサ
ー6は回路基111ijlをその厚さ方向にスリット9
で挟んで、簡単に基板lに取り付け、基板に垂直に固定
することができ、基板上のすべての部品型Ii!4をす
べてのリード電極2から確実に隔離できる長さを有して
いる薄板状部材である(第1a図及び第1b図参照)。
The spacer used in the method of the present invention is a thin flat plate with a long slit wide enough to sandwich a circuit board, and is made of a solder-resistant material that is resistant to solder and has excellent heat resistance and low thermal conductivity. This is a blocking jig. That is, the spacer 6 forms the slit 9 in the thickness direction of the circuit board 111ijl.
It can be easily attached to the board L and fixed vertically to the board, and all parts on the board can be easily attached to the board L! It is a thin plate-like member having a length that can reliably isolate the lead electrodes 4 from all the lead electrodes 2 (see FIGS. 1a and 1b).

[作   用  ] 本発明に従って、混成集積回路基板縁辺部に設けらけた
リード電極にクリップリードな半田付けする場合は、搭
載チップ部品の半田付は部分である部品電極とクリップ
リードの半田付は部分であるリード電極との間を、半田
に濡れにくく耐熱性に優れ、熱伝導率の小さい耐半田性
の材料で作られたスリットを持つ薄い平板状のスペーサ
ーで遮断して半田付けを行なうので、前記部品重陽と溶
融半田との接触が回避され、半田の熱もスペーサーで遮
られるため搭載チップ部品の半田付は部分が再溶融する
のを防ぐことができ、更にスペーサーは半田に濡れにく
い材料で作られているので、スペーサー縁辺部における
溶融半田液面は、半田の表面張力により第1b図に示す
ような形となり、半田の持つ熱は回路基板上のチップ部
品に伝達されにくくなる。したがって、搭載チップ部品
の位置ずれや脱落が起こりにくいし、チップ部品の搭載
可能領域も回路基板のリード電極近接部分にまで広がり
、回路基板の実装密度を高めることができる。
[Function] According to the present invention, when clip leads are soldered to the lead electrodes provided on the edge of a hybrid integrated circuit board, the mounted chip components are partially soldered, and the component electrodes and clip leads are partially soldered. Soldering is performed by separating the lead electrode from the lead electrode using a thin flat spacer with a slit made of a solder-resistant material that does not easily get wet with solder and has low thermal conductivity. Contact between the components and the molten solder is avoided, and the heat of the solder is also blocked by the spacer, so the soldering of the mounted chip components can be prevented from remelting, and the spacer is made of a material that does not easily wet with solder. As a result, the molten solder liquid level at the edge of the spacer takes the shape shown in FIG. 1b due to the surface tension of the solder, making it difficult for the heat of the solder to be transferred to the chip components on the circuit board. Therefore, the mounted chip components are less likely to be misaligned or fall off, and the area in which the chip components can be mounted is expanded to areas near the lead electrodes of the circuit board, making it possible to increase the mounting density of the circuit board.

大−−]]L−− 例第5図及び第6図に示すように、チップ部品5′ (
積層コンデンサ1608タイプ)をリフロー半田付けし
た回路基板lのリード電極2にクリップリード3のクリ
ップ部を嵌合させ、前記クリップリードと搭載チップ部
品の部品電橋との間に第6図に示すようにガラスエキポ
キシ板のスペーサー6を挿入した。この時のり−ド電橋
2と積層コンデンサー5′の取り付は部である部品重陽
4との間隔は後に詳しく示すように0.6mm〜1.5
++mの範囲の値であった。
Large--]] L-- Example As shown in FIGS. 5 and 6, the chip component 5' (
The clip part of the clip lead 3 is fitted to the lead electrode 2 of the circuit board l on which the multilayer capacitor 1608 type) is reflow soldered, and the clip part of the clip lead 3 is inserted between the clip lead and the component bridge of the mounted chip component as shown in FIG. A spacer 6 made of a glass epoxy plate was inserted into the spacer. At this time, the distance between the glued electric bridge 2 and the mounting part of the multilayer capacitor 5' is 0.6 mm to 1.5 mm, as will be shown in detail later.
The values were in the range of ++m.

本実施例に使用したスペーサー及び回路基板の仕様は以
下の通りである。
The specifications of the spacer and circuit board used in this example are as follows.

スペーサー 断面形状:第4図に示す通り 材質ニガラスエポキシ板 寸法: j!=70.0mm、  w=7.0am 、
 x=5.0LIa+y=11口a+u、   t=0
.5mm  (厚さ)0 基  び  チップ。口 外観:第5図及び第6図に示す通り 基板材質:セラミックス基板 (AgPd厚膜電極) 寸法: L = 60.0+*s+、W = 10.0
mm、t ’  = 0.635mm  (厚さ)搭載
チップ部品:積層コンデンサ1608タイプ部品電極寸
法: 1.Omm X  1.Ommリード?t[i寸
法:1.4m鳳X  1.61mm使用リード:クリッ
プリード2.54mm  ピッチリード電極とチップ部
品重陽との間隔:d=0.6. 0.8.1.0. 1
.5.   (mm)■比較用として、スペーサーを取
り付けていない上記■と同様の回路基板を作成した。
Spacer cross-sectional shape: As shown in Figure 4 Material: Niglass epoxy board Dimensions: J! =70.0mm, w=7.0am,
x=5.0LIa+y=11 units a+u, t=0
.. 5mm (thickness) 0 chips. Appearance: As shown in Figures 5 and 6 Substrate material: Ceramic substrate (AgPd thick film electrode) Dimensions: L = 60.0+*s+, W = 10.0
mm, t' = 0.635mm (thickness) Chip components mounted: Multilayer capacitor 1608 type component Electrode dimensions: 1. Omm X 1. Omm lead? t[i dimension: 1.4m x 1.61mm Lead used: Clip lead 2.54mm Distance between pitch lead electrode and chip component doublet: d=0.6. 0.8.1.0. 1
.. 5. (mm) ■For comparison, a circuit board similar to the above (■) without a spacer was prepared.

■上記■、■で得られた回路基板を各々予熱(150℃
、30秒)後、第1a図及び第1b図に示すような配置
となるようビンセット等で持ち半田槽7内の溶融半田8
中に3秒間浸漬した。浸漬深さはリード電極2が完全に
浸漬する深さであった。引き上げ後嵌合したクリップリ
ードが完全に半田で覆われていることを確認した。
■Preheat each circuit board obtained in steps ■ and ■ above (150℃
, 30 seconds), hold the molten solder 8 in the solder tank 7 using a bottle set, etc. so that the arrangement is as shown in FIGS. 1a and 1b.
immersed in it for 3 seconds. The immersion depth was such that the lead electrode 2 was completely immersed. After pulling it up, it was confirmed that the fitted clip lead was completely covered with solder.

■上記で得られた結果を整理して第1表に示した0表中
の数字は個数を表わす、各試験につき、被験体の全数は
60個であった。
■The results obtained above are organized and shown in Table 1. The numbers in Table 1 represent the number of samples. The total number of subjects for each test was 60.

部品t[i4とリード電h2との間にガラスエポキシ仮
のスペーサー6を取り付けた場合、回路基板のチップ部
品の落下、位置ずれなどによる不良品発生数はゼロであ
り、チップ部品半田付は部分の再溶融によるチップ部品
の離脱は起らず、クリップリードとリード電極との接続
はきわめてQ好であった。さらに、部品型?II4とリ
ード電極2との末端間隔も従来の方法による場合に比較
し、きわめて小さくできた。
When the glass epoxy temporary spacer 6 is installed between the component t [i4 and the lead wire h2, the number of defective products due to dropping or misalignment of chip components on the circuit board is zero, and the soldering of chip components is only partially performed. The chip components did not come off due to remelting, and the connection between the clip lead and the lead electrode was extremely good. Furthermore, parts type? The distance between the ends of II 4 and lead electrode 2 was also made extremely small compared to the conventional method.

(以下余白) [R明の効果] 本発明によれば、混成集積回路基板の縁辺部に設けられ
ているリート電極に、クリップリードの半田付けを行な
う際、搭載チップ部品が溶融半田の熱的影響を受けるこ
とが少ないので、チップ部品の半田付は部分が再溶融さ
れ難く、このため搭載チップ部品が落下したり、位置ず
れを起こしたりすることが防がれる。また、従来デッド
スペースとなっていたり−ド重陽近接領域にまでチップ
部品搭載可能領域を広げることができるので、チップ部
品の回路基板への実装密度を高めることができる。
(Blank below) [Effect of R Light] According to the present invention, when soldering a clip lead to a lead electrode provided at the edge of a hybrid integrated circuit board, mounted chip components are exposed to the thermal effects of molten solder. Since the soldering of the chip components is less susceptible to remelting, the mounted chip components are prevented from falling or being misaligned. Further, since the area in which chip components can be mounted can be expanded to areas that are conventionally dead spaces or adjacent to the dome, it is possible to increase the mounting density of chip components on the circuit board.

【図面の簡単な説明】[Brief explanation of the drawing]

第1a図は、本発明に従ってスペーサーを混成集積回路
基板縁辺部のリード電極と搭載チップ部品の部品電掘と
の間に取り付けた状態を示す斜視図である。 第1b図は、第1a図に示した回路基板を基板面を垂直
にして溶融半田中に浸漬させた状態を示す概念図である
。 第2図は、従来の方法で回路基板のリード電極にクリッ
プリードを半田付けするために、溶融半田中に回路基板
の一部を浸漬させた状態を正面から見た場合を示す概念
図である。 第3図は、第2図の状態を側面から見た場合の概念図で
ある。 第4図は、本発明の方法で使用することの出来るスペー
サーの一例の断面形状を示す図である。 第5図は、本発明に従って回路基板にスペーサーを取り
付けた状態について、回路基板を垂直にして正面から見
た場合を示す概念図である。 第6図は、本発明に従ってスペーサーを混成集積回路基
板縁辺部のリード電極とチップ部品の部品電極との開に
取り付けた状態を示す概念図である。 図中の記号は次
のものを表わす。 1−・回路基板      2・・・リード電極3・・
・クリップリード   4−・部品電極5・−チップ部
品 5′−積層コンデンサ1608タイプ
FIG. 1a is a perspective view showing a spacer installed between a lead electrode on an edge of a hybrid integrated circuit board and a component groove of a mounted chip component according to the present invention. FIG. 1b is a conceptual diagram showing a state in which the circuit board shown in FIG. 1a is immersed in molten solder with the board surface vertical. FIG. 2 is a conceptual diagram showing a state in which a part of a circuit board is immersed in molten solder, viewed from the front, in order to solder clip leads to lead electrodes of a circuit board using the conventional method. . FIG. 3 is a conceptual diagram of the state shown in FIG. 2 viewed from the side. FIG. 4 is a diagram showing a cross-sectional shape of an example of a spacer that can be used in the method of the present invention. FIG. 5 is a conceptual diagram showing a state in which a spacer is attached to a circuit board according to the present invention, when the circuit board is vertically viewed from the front. FIG. 6 is a conceptual diagram showing a state in which a spacer according to the present invention is attached between a lead electrode at an edge of a hybrid integrated circuit board and a component electrode of a chip component. The symbols in the figure represent the following: 1-・Circuit board 2・Lead electrode 3・・
・Clip lead 4-・Component electrode 5・-Chip component 5'-Multilayer capacitor 1608 type

Claims (1)

【特許請求の範囲】[Claims] チップ部品を搭載した混成集積回路基板のリード電極に
クリップリードを半田付けするに際し、回路基板上のリ
ード電極と部品電極との間に、半田に濡れにくく熱伝導
率の小さい耐半田性の耐熱性材料でつくられたスリット
を有する薄い平板状のスペーサーを、スリットが回路基
板を回路基板の厚さ方向に挟むように取り付け、回路基
板上に搭載されたチップ部品の半田付け部分と溶融半田
との直接接触が完全に防止できるようにしてリード電極
部分を溶融半田中に浸漬することを特徴とするクリップ
リードの半田付け方法。
When soldering clip leads to the lead electrodes of a hybrid integrated circuit board on which chip components are mounted, a heat-resistant, solder-resistant material that is difficult to get wet with solder and has low thermal conductivity is placed between the lead electrodes on the circuit board and the component electrodes. A thin flat spacer with slits made of material is attached so that the slits sandwich the circuit board in the thickness direction of the circuit board, and the soldered parts of the chip components mounted on the circuit board are connected to the molten solder. A clip lead soldering method characterized by immersing the lead electrode portion in molten solder in a manner that completely prevents direct contact.
JP3930089A 1989-02-21 1989-02-21 Soldering clip lead Pending JPH02220382A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3930089A JPH02220382A (en) 1989-02-21 1989-02-21 Soldering clip lead

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3930089A JPH02220382A (en) 1989-02-21 1989-02-21 Soldering clip lead

Publications (1)

Publication Number Publication Date
JPH02220382A true JPH02220382A (en) 1990-09-03

Family

ID=12549276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3930089A Pending JPH02220382A (en) 1989-02-21 1989-02-21 Soldering clip lead

Country Status (1)

Country Link
JP (1) JPH02220382A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107181069A (en) * 2017-05-12 2017-09-19 番禺得意精密电子工业有限公司 The manufacture method of electric coupler component and electric coupler component

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107181069A (en) * 2017-05-12 2017-09-19 番禺得意精密电子工业有限公司 The manufacture method of electric coupler component and electric coupler component

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