JPH02219234A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize high speed operation by forming a base layer composed of second conductivity type compound SiGex (0<x<10) composed of silicon Si and germanium Ge, on an emitter region composed of first conductivity type single crystal silicon, and forming a collector composed of first conductivity type SiGex on the base layer. CONSTITUTION:On an emitter layer 102 of an N-type single crystal silicon film epitaxially grown on a silicon substrate 101, a base layer 103 of P-type polycrystalline SiGex (0<x<10) composed of silicon Si and germanium Ge doped with high concentration is formed by plasma CVD method, and then an insulating layer 105 is formed on the surface. After a window for forming an emitter is opened in the insulating layer 105, a collector layer 104 of N-type polycrystalline SiGex is formed by the same way se the base layer; a collector is formed by etching; a collector electrode 106, a base electrode 107, and an emitter electrode 108 are formed. Thereby a circuit of high speed and high performance can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a betero junction with a high current amplification factor and excellent high speed performance.

[Conventional technology]

2. Description of the Related Art In recent years, there has been an increasing demand for high-speed transistors, and so-called heterojunction transistors having an emitter layer with a wider bandgap than a base region are attracting attention.

Considering this transistor as an npn type transistor, holes injected from the base to the emitter are blocked by a large barrier in the valence band, so that the emitter injection efficiency becomes high. Furthermore, since the base impurity concentration can be increased, the base resistance can be reduced and the speed can be increased.

Conventionally, heterojunction transistors have been made of compound semiconductors mainly made of GaAs, but their industrial productivity is low due to their high cost and imperfect manufacturing technology, making it difficult for them to become widespread.

In contrast, research on heterojunction transistors using silicon as a matrix has recently become active. FIG. 4 is an example in which a 5iCy compound (the value of y decreases as the distance from the base regions 402 and 412 increases) is used for the emitters 403 and 413 in order to reduce the difference in lattice constant of the heterojunction.

(Special Publication No. 59-10651) By using silicon as the base material, it is compatible with the existing mass production manufacturing process.
In addition, by applying microfabrication technology, performance improvements such as speeding up can be achieved.

[Problem to be solved by the invention]

However, since the carrier mobility of silicon is much lower than that of GaAs compounds, it cannot be said that the use of a 5iCy emitter alone will achieve a sufficient speedup.

Furthermore, since there is a lattice mismatch in the heterojunction between the emitter and the base, current due to carrier recombination at the junction interface cannot be ignored.

Therefore, the electrical properties predicted from theory cannot be obtained. In addition, 5iCy compounds have low carrier mobility and therefore have large parasitic resistance, making high-speed operation difficult.

[Means to solve the problem]

The semiconductor device of the present invention includes: (1) forming a base layer made of a second conductivity type compound SiGex made of silicon Si and germanium Ge on an emitter region made of first conductivity type single crystal silicon;
Furthermore, it is characterized in that it is manufactured by forming a collector made of a first conductivity type compound SiGex thereon.

(2) The first item is characterized in that the value of X of the SiGex increases as the distance from the emitter region increases.

〔Example〕

FIG. 1 is a sectional view showing an embodiment in which the semiconductor device of the present invention is applied to an npn type heterojunction transistor. 101
102 is a heavily doped n-type silicon substrate, and 102 is an emitter layer made of an n-type single crystal silicon film epitaxially grown on the silicon substrate. After forming a base layer 103 of heavily doped p-type polycrystalline SiGex on the emitter layer 102 by plasma CVD, an insulating layer 105 is formed on the surface. After opening a window for emitter formation in the insulating N105, a collector layer 104 of n-type polycrystalline SiGex is formed in the same manner as the base layer, and the collector is formed by etching, and the collector electrode 106, base electrode 107, and emitter Electrode 108 is formed.

FIG. 2(a) is a band diagram of the heterojunction transistor of FIG. 1. SiG of base 202 and collector 203
The germanium mixing ratio X of the ex compound is as shown in FIG. 2(b). In addition to making the emitter-base heterojunction a graded junction, by making the X value of the base region graded, electrons traveling through the base can be accelerated and good high-frequency characteristics of the transistor can be obtained. In order to minimize the lattice matching mismatch between the base and the emitter sections, it is desirable that the carbon mixing ratio X be zero at the collector end of the base layer. Furthermore, for the same reason, it is desirable to continuously change the X value in the base-collector junction.

The base/emitter layer may be made of a non-single crystal SiGex compound such as microcrystalline or amorphous, and the formation method is also low pressure CVD.
method, normal pressure CVD method, sputtering method, etc. may be used.

When an amorphous SiGex compound is used as the base, the size of the band gap is quite different from that of the emitter even if X=O at the end of the emitter side, but by doping the base layer with a high concentration, the band gap can be increased. becomes smaller,
The step difference in the band between the base and emitter is alleviated and the base resistance is lowered, resulting in good results for speeding up.

As shown in Figure 1, the structure where the emitter is on the substrate side is an ECL
(Emitter Coupled Logic)
Circuits and CML (Current M.

It is suitable for de Logic) circuits. FIG. 3 shows an example in which a CML circuit was manufactured using the present invention. By using the present invention, higher speed (higher performance) than before
This makes it possible to create a circuit with a wide range of functions.

Furthermore, by forming the semiconductor device of the present invention on an insulating substrate or an insulating layer, it can be applied to many more devices such as image devices such as liquid crystal panels, and it can also be applied to three-dimensional devices. becomes. When forming the semiconductor device of the present invention on an insulating substrate or an insulating layer, it is possible to use not only a collector top type bipolar transistor as in the above-mentioned embodiment (FIG. 1), but also an emitter top type or even a lateral type bipolar transistor. This makes it possible to form a wide range of applications.

By combining the semiconductor device of the present invention and the 0M03 circuit, it is possible to fabricate a high performance BiCMO3()IBT-0MO8) circuit. A major advantage is that existing silicon processes (processing, film formation, etc.) can be used in this case.

Although an embodiment of an npn-type heterojunction transistor has been described above, similar effects can be obtained when applied to a pnp-type heterojunction transistor.

〔Effect of the invention〕

As described above, in the heterojunction bipolar transistor made of SiGex according to the present invention and having a sloped base and a narrow gap collector, a high amplification factor obtained by having a relatively wide gap emitter,
It becomes possible to further improve high speed and good high frequency characteristics. It is also highly compatible with existing mass-produced manufacturing processes.

SiGex has high carrier mobility and a lattice constant close to Si (x = 9: 5.63 for 5iGe9, 5 for Si
．． 431 people), it is possible to realize a transistor with higher performance than when using 5iCy (0<y<1).

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of an npn type transistor to which the semiconductor device of the present invention is applied. FIG. 2(a) is a band diagram in the embodiment of FIG. 1. Second
Figure (b) is a diagram showing the value of the germanium mixing ratio X in the embodiment of Figure 1. FIG. 3 is a diagram showing an example in which a CML circuit was manufactured using the semiconductor device of the present invention. FIG. 4(a) is a sectional view showing a conventional example. FIG. 4(b) is a band diagram of a conventional example. 102...Emitter 103...Base 104...Collector and above Applicant Seiko Epson Co., Ltd. Agent Patent attorney Masayoshi Ueyanagi 1 person ~101 Figure 1 (b) Figure 4

Claims (2)

[Claims] (1) A base layer made of a second conductivity type compound SiGe_x (0<x<10) made of silicon Si and germanium Ge is formed on the emitter region made of single crystal silicon of the first conductivity type, and then A semiconductor device characterized in that it is manufactured by forming a collector made of a first conductivity type compound SiGe_x on a semiconductor device. (2) The semiconductor device according to claim 1, wherein the value of x of the SiGe_x increases as the distance from the emitter region increases.