JPH02218278A - Fm modulation circuit - Google Patents

Abstract

PURPOSE:To eliminate tape noise, waveform distortion and residual carrier leakage or the like by supplying a control pulse to an FM modulation circuit and generating an FM modulation video signal with a phase specified by a control pulse. CONSTITUTION:A video signal SV from a terminal 1 is fed respectively to an FM modulation circuit 2 and a synchronizing signal separator circuit 3. A horizontal synchronizing signal HSY is separated from the video signal SV by the synchronizing signal separator circuit 3 and a synchronizing pulse PH is generated corresponding to the horizontal synchronizing signal SHY. When a synchronizing pulse PH is supplied to a monostable multivibrator 10, a pulse Pt1 is generated and a pulse Pt2 is generated by a monostable multivibrator 11 and fed to an FM modulation circuit 2. Thus, the start point of FM modulation is locked to a prescribed phase for each 1H of the video signal SV at the recording. Moreover, the information of the horizontal synchronizing signal HSY is obtained before FM demodulation at the reproduction. Thus, the S/N is improved and the accuracy of time axis correction is improved.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention is applicable to an FM modulation circuit, particularly a VTR equipped with a TBC.
The present invention relates to an FM modulation circuit suitable for.

[Summary of the invention]

This invention forms a control pulse in an FM modulation circuit based on a horizontal synchronization signal separated from a video signal,
By supplying a control pulse to the FM modulation circuit and generating an FM modulated video signal with a phase specified by the control pulse, the FM modulation start point is locked to a predetermined phase every horizontal period. Can form a modulated video signal, F
The information on the horizontal synchronizing signal can be accurately obtained before FM demodulating the M-modulated video signal, the S/N ratio can be improved, and the accuracy of time axis correction can be improved.

[Conventional technology]

Traditionally, in VTRs, TB is used to correct time axis fluctuations.
C is used. Specifically, a periodic signal is added to the video signal, FM modulated, and recorded, and during playback, the F.
Time axis correction is performed so that the periodic signal included in the video signal after M demodulation matches the phase of the reference signal.

FIG. 7 shows an example in which a horizontal synchronizing signal H5Y7 is used as the above-mentioned periodic signal. This horizontal synchronization signal H5
Y7 is the original horizontal synchronization signal H5 shown by the broken line in FIG.
Y is waveform-shaped to have an oblique side portion 70.

Further, FIG. 8 shows an example in which a burst signal SBST of the video signal Sv is used as the above-mentioned periodic signal.

[Problem to be solved by the invention]

However, when performing time axis correction with the above-mentioned conventional technology, if a horizontal synchronization signal after FM demodulation is used, tape noise, waveform distortion, residual carrier leakage, etc.
There is a problem in that the S/N ratio of the video signal after M demodulation deteriorates, and the accuracy of time axis correction decreases accordingly. Furthermore, as shown in Fig. 8, even when using a burst signal after FM demodulation, the S
/N deteriorates, and the accuracy of time axis correction decreases accordingly. Furthermore, there is a problem in that phase fluctuation occurs in the FM-demodulated burst signal due to sideband interference that occurs when the burst signal is FM-modulated, and as a result, the accuracy of time axis correction is reduced.

Therefore, the purpose of this invention is to improve the accuracy of time axis correction, and to improve the accuracy of time axis correction.
An object of the present invention is to provide an FM modulation circuit that can improve the performance of C.

[Means to solve the problem]

The invention provides an F
In the M modulation circuit, a control pulse is formed based on the horizontal synchronization signal separated from the video signal, and the control pulse is
F of the phase specified by the control pulse and supplied to the M modulation circuit.
The configuration is such that an M-modulated video signal is generated.

[Effect]

During recording, the horizontal synchronization signal is separated from the video signal to form control pulses. The operation of the FM modulation circuit is controlled by the control pulse, and the FM modulation circuit is synchronized with the phase of the control pulse.
A modulated video signal is formed. This makes it possible to form an FM modulated video signal in which the starting point of FM modulation is locked to a predetermined phase every horizontal period.

During playback, the timing of the horizontal synchronization signal can be obtained from the FM modulated video signal before FM demodulation. Therefore,
A decrease in S/N is prevented, and highly accurate time axis correction is performed.

〔Example〕

Embodiments of the present invention will be described below with reference to FIGS. 1 to 6.

FIGS. 1 to 4 are diagrams showing one embodiment.

First, I will explain the recording system.

In the configuration shown in FIG. 1, a video signal SV from a terminal 1 is supplied to an FM modulation circuit 2 and a synchronization signal separation circuit 3, respectively. A horizontal synchronizing signal H3Y is separated from the video signal Sv by the synchronizing signal separation circuit 3, and a synchronizing pulse PH as shown in FIG. 3A is formed corresponding to the horizontal synchronizing signal H5Y. The synchronizing pulse PH consists of two monostable multi-by-breaks [hereinafter referred to as
The signal is supplied to a pulse generating circuit 4 consisting of 10 and 11 (simply abbreviated as mono-multi). The synchronization pulse PH mentioned above
When is supplied to the monomulti 10, a pulse (pulse width is tl) Pt1 as shown in FIG. 3B is formed.

When the pulse Ptl falls, this pulse Ptl acts as a trigger, and a pulse (pulse width is t2) Pt2 as shown in FIG. 2.

The FM modulation circuit 2 has an astable multi-by-break configuration as shown in FIG.

Terminal 5 to which power supply voltage Vcc is applied is connected to resistors R1 and R2.
are connected to the collector sides of transistors Q1 and Q2, respectively.

Connection point 6 between resistor R1 and collector side of transistor Q1
is connected to the base of a transistor Q2 and one end of a resistor R4 via a capacitor CI, and the emitter of the transistor Q2 is grounded. Also, resistance R2
The connection point 7 on the collector side of the transistor Q2 is connected to the base of the transistor Q1 and one end of the resistor R3 via the capacitor C2, and the emitter of the transistor Q1 is grounded. And resistors R3 and R4
The other end is connected to a terminal 8 to which a video signal Sv is supplied. Furthermore, the above-mentioned connection point 6 is connected to a terminal 9 for taking out the FM modulated video signal SFM, while the connection point 7 is connected to the collector of a switching transistor Q3.

The emitter of this transistor Q3 is grounded, and the base is connected to one end of each of resistors R5 and R6. The other end of the resistor R5 is connected to the monomulti 11, and the other end of the resistor R6 is grounded. Note that 12 is a terminal to which the synchronization pulse PH is supplied.

When the above-mentioned pulse Pt2 is at high level, the transistor Q
3 is turned on, and the modulation operation of the FM modulation circuit 2 is stopped. That is, the above-mentioned pulse Pt2 is applied to the transistor Q.
When supplied to the base of transistor Q3, a current flows from the power supply voltage Vcc to ground through resistor R2 and the collector and emitter of transistor Q3.

At this time, the connection point 7 is momentarily grounded, the base side of the transistor Q1 becomes a negative potential, and the transistor Q1 is turned off. On the other hand, since the potential at the connection point 6 is also at the same level as the potential at the connection point 7, the transistor Q2 is also turned off. On the other hand, as shown in FIG. 3C, the pulse Pt2
When is at low level, transistor Q3 is turned off and F
A modulation operation of the M modulation circuit 2 is performed.

Thereafter, the normal astable multi-by-break operation continues until the pulse Pt2 is supplied again, and the video signal Sv is FM modulated. As shown in the third diagram, the falling point of the pulse Pt2 is set as the operation start point PST of the FM modulation circuit 2, and the start point of FM modulation is locked to a predetermined phase every horizontal period from this operation start point PST. A video signal SFM is formed.

The FM-modulated video signal SFM is supplied to a magnetic head 14 via a recording amplifier 13 and recorded on a magnetic tape 15.

Next, the reproduction system will be explained.

The video signal SFM reproduced from the magnetic tape 15 by the magnetic head 16 is FM modulated as shown in FIG.
8, supplied to the gate circuit 19.

The video signal SF is demodulated by the FM demodulation circuit 18 into a video signal Sv, which is supplied to the TBC 20. T.B.C.
A horizontal synchronizing signal H5Y separated by a synchronizing signal separation circuit (not shown) in 20 is supplied to a timing forming circuit 21,
A gate pulse PG is formed in synchronization with the horizontal synchronization signal H3Y. This gate pulse PG is supplied to the gate circuit 19 described above.

Only the horizontal synchronizing signal H3YF included in the video signal SFM is extracted by the gate pulse PG and supplied to the IH delay circuit 22 and the phase comparison circuit 23.

Note that the extracted horizontal synchronizing signal HSYF may have only one period. For example, as shown in FIG. 4B, the nH-th horizontal synchronization signal H5YFn that is FM modulated is
When supplied to the delay circuit 22, the IH delay circuit 22 outputs the (n-1)H-th horizontal synchronizing signal H5YF(n-1) as shown in FIG. 4C. Therefore, the phase comparator circuit 23 compares the phases of the nH-th and (n-1)H-th horizontal synchronizing signals H5YFn, H3YF(n-1), and obtains a phase error Ver as shown in the fourth diagram. Output. The phase error Ver is TB as the amount of change in the high frequency component HC from which the DC component is cut by the bypass filter 24.
It is supplied to a VCO (not shown) in C20. In the TBC 20, a write address/timing signal is generated by a VCO. According to this write address/timing signal, the digitized video signal SDV is written into a memory (not shown).

Further, a read address/timing signal is generated from the reference signal by a PLL (not shown). As a result, the digitized video signal S with time axis correction
The DV is output, converted into an analog signal by D/A conversion, and taken out from the terminal 25 as a video signal Sv.

According to this embodiment, during recording, the start point of FM modulation can be locked to a predetermined phase for each IH of the video signal Sv. Also, during playback, information on the horizontal synchronizing signal H3Y (l(SYF)) can be obtained before FM demodulation.
N can be improved, and the accuracy of time axis correction can be improved.

FIG. 5 and FIG. 6 are diagrams showing other embodiments.

First, I will explain the recording system.

In the configuration shown in FIG. 5, the video signal SV from the terminal 31
are supplied to the FM modulation circuit 32 and the synchronization signal separation circuit 33, respectively. From the video signal sv, a horizontal synchronizing signal I (SY) is separated in a synchronizing signal separation circuit 33, and a synchronizing pulse PH corresponding to the horizontal synchronizing signal HSY is formed. The signal is supplied to a pulse generation circuit 34 (not shown).

When the synchronization pulse PH is supplied to the pulse generation circuit 34,
The pulse Pt2 is supplied to the above-mentioned FM modulation circuit 32 using the synchronization pulse PH as a trigger.

As in the previous embodiment, the FM modulation circuit 32 outputs a pulse Pt
When pulse Pt2 is at a high level, the modulation operation of the FM modulation circuit 32 is stopped, and when pulse Pt2 is at a low level, the modulation operation of the FM modulation circuit 32 is performed.

The falling point of the pulse Pt2 is taken as the operation start point PST of the FM modulation circuit 32, and from this operation start point PST, a video signal SFM in which the FM modulation start point is locked to a predetermined phase is formed every horizontal period. .

FM modulated video signal SFM & recording amplifier 35
The signal is supplied to the magnetic head 36 via the magnetic head 36 and recorded on the magnetic tape 37.

Next, the reproduction system will be explained.

The video signal SFM4 reproduced from the magnetic tape 37 by the magnetic head 38 is supplied to an FM demodulation circuit 40 and a gate circuit 41 via a reproduction amplifier 39.

The video signal SFM& is demodulated by the FM demodulation circuit 4o to become a video signal Sv, which is supplied to an A/D conversion circuit 43 and a synchronization signal separation circuit 44 in the TBC 42, respectively. The demodulated video signal Sv is converted into a digitalized video signal SDV by the A/D conversion circuit 43 and supplied to the memory 45. The demodulated video signal Sv is converted into a horizontal synchronizing signal HSY as shown in FIG.
4, phase comparator circuit 46 and monomulti 47
are supplied respectively.

When the horizontal synchronization signal H5Y is supplied to the monomulti 47,
A gate pulse PG having a predetermined pulse width as shown in FIG. 6C is formed and supplied to the gate circuit 41.

By this gate pulse PG, only one period of the FM-modulated horizontal synchronizing signal HSYF is extracted from the gate circuit 41 and supplied to the pulse shaping circuit 48, as shown in FIG. The horizontal synchronizing signal HSYF modulated for one period is pulse-shaped by the pulse shaping circuit 48 as shown in FIG. 6E, and is supplied to the VCO 49 as a reset pulse P RES. This reset pulse P
The initial phase of the memory 45 is determined with RBS accuracy.

On the other hand, the horizontal synchronizing signal 1 (SY) is supplied to the phase comparator circuit 46, where the phase is compared with the signal from the frequency dividing circuit 50 to form a phase error Ver, which is supplied to the VC049. The VCO 49 changes the oscillation frequency according to the Ver.
It is supplied to the memory 45 as a timing signal SWA.

The aforementioned digitized video signal SDV is written into the memory 45 according to the write address/timing signal SWA. The VCO 49 is reset by the above-mentioned reset pulse PRES.

On the other hand, the reference signal SST is supplied from the terminal 51, and the PL
The phase is locked by the L circuit 52. The phase-locked reference signal SST is then supplied to the memory 45 as a read address/timing signal SRA.

Based on the read address/timing signal SR, the digitized video signal SDV is read out from the memory 45 and subjected to time axis correction. Then, the video signal SDV is converted into an analog signal by a D/A conversion circuit 53 and taken out from a terminal 54 as a video signal Sv.

Note that the other contents are the same as those in the previous embodiment, and redundant explanation will be omitted.

〔Effect of the invention〕

According to this invention, the control wholesale pulse is supplied to the FM modulation circuit to generate an FM modulated video signal with a phase specified by the control pulse, so that the starting point of FM modulation is 1.
This has the advantage that it is possible to form an FM modulated video signal that is locked to a predetermined phase for each horizontal period. This effect has the effect that, during reproduction, horizontal synchronization signal information can be accurately obtained from the FM modulated video signal before FM demodulating the FM modulated video signal. The above-mentioned effects eliminate tape noise, waveform distortion, residual carrier leak, etc., and improve the S/N ratio. Therefore, there is an effect that the performance of TBC can be improved and the accuracy of time axis correction can be improved.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram showing an FM modulation circuit, Fig. 3 is a timing chart showing the relationship between the horizontal synchronizing signal and the operation start point, and Fig. 4. 5 is a block diagram showing another embodiment of the present invention, FIG. 6 is a timing chart showing the formation of reset pulses, and FIGS. Each figure is a waveform diagram of a video signal showing a conventional example. Explanation of main symbols in the drawings 2.32: FM demodulation circuit, H3Y, HSY7, HSYF
. HSYF n, HSYF(n-1): horizontal synchronization signal, 5v1SDV, SFM: video signal, Pt2: pulse.

Claims (1)

[Claims] In an FM modulation circuit to which a video signal is supplied as a modulation input, a control pulse is formed based on a horizontal synchronization signal separated from the video signal, and the control pulse is transmitted to the FM modulation circuit. FM modulation circuit, characterized in that the FM modulation circuit is configured to supply the control pulses and generate an FM modulated video signal having a phase defined by the control pulse.