JPH0221806Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field This invention relates to a binarization device that binarizes a video signal, etc. by a so-called floating threshold method.

(B) Prior Art FIG. 1 is a principle diagram for explaining the prior art, and FIG. 2 is a block diagram schematically showing the configuration of the conventional device.

In other words, in order to deal with the shading of the imaging device and the low level of the video signal in minute parts, the binarization of the video signal from TV cameras, etc. splits the video signal Sa into two parts, and one is used for comparison. The other input is directly input to the circuit 1, and the other signal is obtained through the delay circuit 2 and the attenuation circuit 3, and after applying an appropriate bias in the bias circuit 4, the threshold signal Sb is used as the other input of the comparison circuit 1. giving. As a result, a binary signal Sc as shown in FIG. 1 is obtained as an output of the comparison circuit 1.

On the other hand, since the components of the delay circuit 2 and the attenuation circuit 3 have fixed constants, when the level of the input video signal is small, the amount of attenuation of that signal is also extremely small, so the difference between the two signals becomes small. . As a result, the comparator circuit 1 may not be able to compare both signals with sufficient precision, and binarization may end in failure.

However, in conventional devices, there is no means to indicate that binarization has ended unsuccessfully, so it is troublesome to have to infer this fact from the data processing results based on the unsuccessful binarization. There is.

(C) Purpose This device can easily determine whether binarization using the floating threshold method is successful.
The purpose is to provide a value conversion device.

(D) Configuration The binarization device according to this invention obtains a binarized signal by delaying and attenuating the original signal and comparing the threshold signal obtained by applying a bias voltage with the original signal. In the apparatus, a sample and hold circuit samples and holds the original signal and the threshold signal, and a delay that provides a trigger pulse with a time delay to the sample and hold circuit in response to rising and falling edges of the binarized signal. The gist of the configuration is to provide a circuit and means for displaying the level difference between the output of the original signal and the threshold signal of the sample-and-hold circuit.

(e) Embodiment FIG. 3 is a block diagram schematically showing the configuration of an embodiment of the binarization device according to this invention.

In this figure, the same parts as in FIG. 2 are indicated by the same reference numerals. 5 is a sample and hold circuit that inputs the video signal Sa and the threshold signal Sb and samples and holds each; 6 inputs the binarized signal Sc and samples the sample in relation to the rise or fall of the signal;・This is a delay circuit that issues a hold command to the hold circuit 5. The delay circuit 6 is composed of, for example, a counter to which a set value corresponding to a clock signal and delay time is given in advance. 7 is a differential amplifier for inputting each hold output of the sample-and-hold circuit 5 and outputting the differential signal; 8 is a meter as a display means for receiving the differential signal and displaying its level.

Next, the operation of the embodiment having the above-described configuration will be explained.

FIG. 4 is an operational waveform diagram of each part of the embodiment shown in FIG. 3.

The video signal Sa as shown in FIG. 4A is branched and input to the comparator circuit 1 and the delay circuit 2, respectively. The output signal of delay circuit 2 is given to attenuation circuit 3. A threshold signal Sb obtained by applying a bias voltage from a bias circuit 4 to the output of the attenuation circuit 3 is applied as the other input of the comparison circuit 1.

The comparison circuit 1 compares the video signal Sa and the threshold signal Sb and generates a binary signal Sc as shown in FIG.
Output. In response to the rise or fall of the binary signal Sc, the delay circuit 6 generates a trigger pulse with a certain time delay as shown in FIG.
Sd is given to the sample and hold circuit 5.

On the other hand, the video signal Sa and the threshold signal Sb are also input to the sample and hold 5, respectively. The sample-and-hold circuit 5 samples the values of the video signal Sa and the threshold signal Sb when the trigger pulse Sd is input, and holds them. Se and Sf in FIG. 2 indicate hold output signals of the video signal Sa and the threshold signal Sb.

The hold output signals Se and Sf are applied to a differential amplifier 7, whereby a differential output of the two signals is applied to a meter 8. Therefore, since the meter 8 displays the difference between the video signal Sa and the threshold signal Sb, when binarization is performed with a sufficient level difference, the meter reading will fluctuate greatly; If the level difference is very small and easily reversed due to noise, etc., the meter will hardly move.

In this way, the operator determines that the reliability of the binarization process is high when the meter indication is large, and that the reliability is low when the indication is small.

In addition, in the embodiment, a meter is used as a means for displaying the level difference between the video signal and the threshold signal, but the invention is not limited to this, and for example, a display device such as a lamp may be used. Good too.

(f) Effects This invention uses a display to notify the level difference between the original signal and the threshold signal, so the reliability of the binarization can be easily judged from the display, which is very convenient.

Furthermore, according to this invention, since it is possible to adjust the illumination that illuminates the subject while viewing the display results, a different effect is achieved in that the optimum binarization conditions can be easily set.

[Brief explanation of the drawing]

FIG. 1 is a principle diagram for explaining the prior art, FIG. 2 is a block diagram schematically showing the configuration of the conventional device, and FIG. 3 is a schematic diagram showing the configuration of an embodiment of the binarization device according to this invention. The block diagram shown in FIG. 4 is an operational waveform diagram of each part of the embodiment shown in FIG. 3. 1... Comparison circuit, 2... Delay circuit, 3... Attenuation circuit, 4... Bias circuit, 5... Sample/hold circuit, 6... Delay circuit, 7... Differential amplifier, 8... Meter.

Claims (1)

[Scope of utility model registration request] In a device that obtains a binarized signal by comparing the original signal with a threshold signal obtained by delaying and attenuating the original signal and applying a bias voltage, the original signal and the threshold signal are sampled and held. a delay circuit that provides a trigger pulse with a time delay to the sample and hold circuit in response to the rise and fall of the binarized signal, and an original signal and a threshold value of the sample and hold circuit; 2 characterized in that it is provided with means for displaying a level difference in the output of the signal.
Value device.