JPH02217826A - Liquid crystal electrooptic device - Google Patents

Abstract

PURPOSE:To enable development even to a liquid crystal display by forming field-effect semiconductor devices IGF, resistances, and capacitors on a substrate, specially, an insulating substrate. CONSTITUTION:On one electrode 22 which is coupled electrically to a semiconductor 12, the other electrode 24 and one electrode 32 of a 2nd liquid crystal capacitor 31 which is coupled with the electrode 24a are coupled through an opening 25, and a counter electrode 27 made of a transparent electrode is provided corresponding to the electrode 32 by pinching a dielectric of liquid crystal 26. Thus, the IGF capacitors, and resistor or the plane panel of the liquid crystal display as a sandwich structure are provided on the substrate 1 at the same time, they are covered from above so as to prevent light from leaking in a 0 state when the IGFs 10 are irradiated with light from above, and one electrode 3 of a picture element is provided. Consequently, a solid-state display device for a plane television replacing a cathode-ray tube can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a liquid crystal electro-optical device in which a vertical channel type stacked insulated gate type semiconductor device is provided on a substrate.

Furthermore, the present invention relates to a liquid crystal electro-optical device provided with a composite semiconductor device having a capacitor connected to the source or drain of a stacked insulated gate field effect semiconductor device on a substrate.

The present invention is characterized in that such a composite semiconductor device is provided on a substrate in a matrix configuration, and a liquid crystal display type display device is provided.

When the present invention provides a surface type solid state display device, a liquid crystal display device is known in which electrodes are provided in parallel glass plates and liquid crystal is injected between the electrodes. However, in this case, the limit for the number of picture elements in this display section is 20 to 200, and if it is more than that, the number of terminals taken out from the R socket will be equal to the number of picture elements, which is completely impractical. I was unable to provide it.

For this reason, this display section is made up of a plurality of picture elements, arranged in a matrix, and in order to control any picture element and turn it on or off, a field-effect semiconductor device (
(IGF) was needed. A control signal is then given to this ICF to turn on or off the corresponding picture element.

This liquid crystal display section can be represented by a capacitor (hereinafter referred to as C) as its equivalent circuit. For this reason, ICF and C
FIG. 1 shows, for example, a 2×2 matrix configuration (40).

In Figure 1, the matrix (40) is one IG
One picture element is composed of F (10) and one C (31). Connect this to the bit lines in rows (51) and (51'), and connect the other gates to column (41).
, (41') are provided.

Then, for example, let (51) and (41) be 11",
If (51") and (41゛) are "θ", only the address (1, 1) is selected and turned on, and the liquid crystal display electrically equivalently shown as C (31) is selectively turned on. It can be done.

The present invention aims at providing another insulated gate type semiconductor device (50), another inverter (60), and a resistor (70) on the same substrate in order to configure a decoder and a driver on the same substrate.

In this way, by combining the present invention based on its design specifications, it was possible to create a solid-state display device for flat-screen televisions that can replace cathode ray tubes.

Furthermore, a display device for Curicule Lake only needs to have 10" to 10" picture elements, and for a TV, 104 to 10S picture elements, for example, 25X10' picture elements, should be provided on the same board, and the necessary surroundings should be provided. It can be seen that the decoder and driver can be made using IGF, inverter, and resistor formed at the same time.

Laminated type I necessary for making the system according to the present invention
This invention relates to a CF and a picture element in which a liquid crystal display section is connected to the CF.

FIG. 2 shows a vertical sectional view of the stacked IGF of the present invention and its manufacturing process.

In the drawings, a first semiconductor (having a P+ or N' conductivity type) is placed on an insulating substrate, such as a glass or alumina substrate.
2) (hereinafter simply referred to as 51) an insulating or semi-insulating film having a thickness that allows tunneling current to flow; (3) a second intrinsic or N or P type semiconductor; (4) (hereinafter simply referred to as S2), the first semiconductor and A third semiconductor (5) (hereinafter simply referred to as S3) having the same conductivity type was provided in a stacked manner.

This semiconductor is fabricated on a substrate using a silane glow discharge method at temperatures ranging from room temperature to 500°C, using a silicon semiconductor with an amorphous or semi-amorphous structure. There is. The present invention focuses on semi-amorphous semiconductors (hereinafter referred to as SAS).

Regarding this SAS, patents related to inventions of the present inventors include, for example, Japanese Patent Application No. 55143885 (filed on 55, 10, 15) (semi-amorphous semiconductor), Japanese Patent Application No. 122786 (1983)
55, September, 4 application) (semiconductor device), patent application 1982-02
A detailed example thereof is shown in 6388 (55,3,3 application) (semi-amorphous semiconductor).

Further, in FIG. 2, S3 was selectively removed by photolithography, and S2 was further removed using S3 as a mask. In order to see the end point of this photoetching, an insulating or semi-insulating film (hereinafter simply referred to as an insulating film) (1
3) was provided using silicon nitride.

Furthermore, the thickness was 5 to 30 people thick and was achieved by exposing the first semiconductor to an ammonia atmosphere irradiated with plasma. Next, after chemically removing this insulating film (13), FIG. 2(B) was obtained.

In order to make the insulating film formed later on S3 even thicker, a silicon oxide film may be formed in advance to a thickness of 0.3 to 1 μm by LPCVD (low pressure vapor phase method). In addition, Mo and W are added on this S3 from 0.2 to 0.5,1
/Furthermore, set Sin to 0.3 to 1 μ and S3
It was effective to improve the conductivity of the matrix.

In addition, in FIG. 2(B), the side surface may be formed perpendicularly to the surface of the substrate (1), but it is preferable to perform a Taber etch on the trapezoid and remove the step cut at the step part of the gate electrode to be further stacked. was effective.

Furthermore, as shown in FIG. 2(C), the Sl was formed into an arbitrary predetermined shape by photolithography. For this reason, in the drawing, the surface of the substrate was exposed in step (11).

Furthermore, after this, an insulating film (6) was formed on the entire surface of these 51, 32, and S3. This insulating film is 13°56MIIz~
Activated by electromagnetic energy with a frequency of 2.45 GIIz, it is activated to create an atmosphere of oxygen or a mixed gas of oxygen and hydrogen.
Formed by oxidation by soaking at ~700°C.

Furthermore, a multilayer structure may be formed by forming silicon nitride or phosphorus glass by the LPCVD method.

Then, a gate insulator (1
6), this insulator (16) is formed, and S1, S3
The surface could be formed as an isolation film.

Furthermore, as shown in (D), the electrode hole (8) for S I (12>) is formed by the electrode hole (8) for S I (12) (metal or semiconductor that forms a force and connects to the gate electrode). The layers were relaminated.

Next, this film is selectively etched using a fourth photolithography technique to form a gate electrode (17) with gate insulators (16) and (16'') provided in two directions.
At the same time, wires were closely connected from 31 (12) and S 3 (15) to other IGFs, capacitors, and resistors through the electrode holes on the substrate surface or the insulator (6).

When viewed from the lateral direction along line A-A'' of the vertical sectional view of FIG. 2(D), it can be shown as FIG. 2(E).The numbers correspond to each other.

The semiconductor of the present invention mainly uses SAS, hydrogen is used to neutralize the dangling bonds in the semiconductor, and the substrate, semiconductor, and electrode leads are made of different materials to reduce stress caused by thermal expansion of them. Therefore, all processing is 300~6
The temperature was preferably 00°C or lower, preferably 300'C or lower.

Further, the gate electrode (17) may have a multilayer wiring structure in which a semiconductor of the same conductivity type as 31 and S3 and a metal such as MO are used as a double structure.

Thus, S 2 (with source or drain 31 (12), channel forming regions (9), (9'))
14), the drain or source is formed by 33 (15), and a gate insulator (
16) , (16°) A gate electrode (17
) was able to make a stacked ICF plate.

In this invention, it is determined by the thickness of the channel length S 2 (14), and here it is set to 0.05 to 0.5 μ. Then, the mobility of SAS is 115 to 1/1 that of single crystal.
Since there is no 00 L, the purpose is to shorten the channel length to enhance the characteristics as an ICF.

SAS has an electron bulk mobility of 100 to 500 cm2V
/S and 1/3 to 1/10, while that of holes is 5 to 100 cm"V/S and 115 to 1/100. However, amorphous silicon
Considering that m"V/S, !- is 10 to 103 times longer than 0.01CO1"V/S or less, it is extremely advantageous to use SAS having a microcrystal structure in the semiconductor device of the present invention. It's important.

Furthermore, in the ICF of the present invention, the electron mobility is more than 3 times that of a single crystal and 5 to 100 times that of a hole, so it is extremely preferable to use an N-channel type.

Therefore, in S2, an intrinsic semiconductor whose surface portion is not doped with impurities is an N-type, so it was used as a P-type.

FIG. 3 shows a vertical sectional view of another IGF of the present invention and its manufacturing process.

In FIG. 3(A), a SAS silicon film 31 (2) was formed on the substrate (1). Furthermore, selective etching is performed using photolithography technology to form the substrate (1).
A part (11) of was exposed.

Next, this SAS was transformed into a single crystal or polycrystalline structure using optical (laser) annealing, thermal annealing, or a combination of these to crystallize the SAS. The heating temperature was set to 700"C or less to prevent thermal stress on the substrate material.

This S 1 (2) basically only needs to have different enching rates from S2 and S3. For this reason, P- or N-type oxygen or nitrogen is added to Sl to form 5in2-.

It may be an intrinsic or semi-insulating semiconductor having a stoichiometry of (0,5<x<2) and S 1zN4-(1<x<4).

As shown in Figure 3 (8), 32 (4) is then placed on this top surface.
was intrinsic, N- or P type, and 33 (5) of the same conductivity type as Sl was laminated as P or N type and formed in the same reactor.

Furthermore, as shown in Figure 3(C) (, this 52(4), 53
(5) are formed into approximately the same shape by selectively removing other parts, and S 2 (14) and S 3 (15) are formed into S l (1
2) Provided on top.

After this, the upper surface of this 5132 and S3 is oxidized to form an insulating film (6
). At this time, the periphery of the S 2 (14) side was provided as a gate insulating film (16), and the other part was provided as an isolation film.

Next, using the third photolithography technique, a semiconductor or conductor film was provided on the entire upper surface of the electrode hole or contact part (force, (8). This film was selected using the fourth photolithography technique. S 1 (
12) has a continuous electrode lead (22) to other parts, and S
3 (15) is provided with similar electrodes and leads via contacts (7), and the channel forming region (9) around the side of S 2 (14), the gate electrode (
16) A gate electrode (17) was formed on (16').

In this way, the source or drain is connected to the channel forming region (9), (9') by 51 (12) to 32 (14
), the drain or source was configured by 33 (15). Gate insulator (16), (1
6') and a gate electrode (17). In this way, the gate electrode is "l" and the source or drain is "l".
When B was used, a current flowed through the channel forming region to create an on state, and if one or both of them were set to "O", an off state could be created.

1'' means a positive current of 0.5 to IOV for N-channel type IGF, and 'O'' means a current below OV or threshold voltage.

For P-channel type IGF, the polarity of its electrodes may be changed. These logic systems are the same in FIGS. 1 and 2 as well as in FIG. 3 below or in the embodiments of the present invention.

Also, the resistance (70) in Figure 1 is shown in Figures 2 (D) and (E).
In FIG. 3(D), it is determined by the resistivity of the bulk component of 32, regardless of the voltage applied to the gate. That is, it is sufficient to stack 51, S2, and S3 without providing a gate electrode. Also, this resistance value is determined by the resistivity of S2 and its thickness.
The area to be fitted on the board can be determined according to the design specifications.

In the inverter (60) in Fig. 1, the driver (61
) are shown in Figures 2 and 3 (D), and their load (6
4) was an enhancement type or debension type rGF in which one of S 3 (15) and S 1 (12) was connected to a gate electrode (17).

Furthermore, the output of this inverter (60) consists of (62), which can be combined by laminating two ICFs spaced apart on this substrate, and the input part can be provided corresponding to the gate electrode (17). good.

FIG. 4(A) shows a vertical sectional view of another embodiment of the present invention. That is, S l (12), 52(
14), S 3 (15) and I whose gate part is made of a gate insulator (16) and a gate electrode (17)
CF (to) and the other part S 1 (12) and connected to the electrical system have one electrode (22) of the capacitor,
This other portion also constitutes one electrode (32) of the liquid crystal display. That is, Sl serves as one electrode of two capacitors. One of the capacitors has a large storage capacity and is used to extend the display time of the liquid crystal display.

In other words, even if a specific IGF is on for 10 to 100 ns in Figure 1, the liquid crystal display lasts for 1 to 1000 ms because the liquid crystal panel and the capacitor are connected in series. It was possible to achieve so-called afterglow characteristics. For this reason, storage
If the capacitor is large, for example, the display on a flat panel corresponding to a TV's cathode ray tube will be vivid, and the number of picture elements will be 10' to IOS, and even if they are digitally scanned, other picture elements will be It becomes possible to continue displaying "0" and "1" on the screen. This storage capacity is effective in preventing viewers from feeling strained when the number of picture elements exceeds 10.

Also, the capacitor of this storage capacity is a Dito insulator (16)
By using the same material as Badge 2, it was possible to make the same Badge 2 without the need for any new process. However, in order to increase this capacitance in a small area, silicon nitride, tantalum oxide, or other ferroelectric material may be used instead of silicon oxide.

Another electrode (32) electrically connected to S I (12) in the present invention is provided through an electrode hole (25). Polyimide or PIQ on these IGF dishes
A glabellar insulator such as the above may be provided to a thickness of 1 to 3 μm, and it may be selectively provided by photolithography. This electrode (32) determines the size of one picture element. Calculita etc. have O11~5■φ or square shape. However, in the scanning type system as shown in Figure 1,
500 x 50 with 1~50μ openings in matrix form
It was set to 0. The liquid crystal display section (31) has semiconductor device electrodes provided on this substrate on one side and a transparent electrode (such as ITO) on the other side.
A nematic type liquid crystal (26), for example, was injected into the glass plate (28) with a gap of 1 to 20 μm.

The display may also be displayed in color. Furthermore, for example, these picture elements may be superimposed three times. Then, the three elements of red, green, and blue may be arranged alternately.

In contrast to FIG. 4(A) in which a storage capacitor and a liquid crystal capacitor shown in an equivalent circuit are connected in parallel, FIG. 4([1]) is in series.

That is, on one electrode (22) electrically connected to S l (12), a dielectric film (23), the other electrode (24),
Further, one electrode (32) of a second liquid crystal capacitor (31) connected to this electrode (24) is connected via an opening (25), and a transparent electrode is provided to counteract this electrode (32). Electrodes (27) are provided across the dielectric of the liquid crystal (26).

As is clear from FIGS. 4(A) and 4(B), the present invention provides a substrate (
1) It is characterized in that a plurality of IGF capacitors, resistors, or a liquid crystal display flat panel is provided as a sandwich structure at the same time.

Furthermore, as is clear from the drawing, in order to prevent light from irradiating the ICF (10) from above and leaking when it is in the "0" state, this is covered from above and the picture element is Another feature is that one electrode (32) is provided.

In addition, unlike conventional methods, the ICF is completely isolated from other picture elements and provided in a stacked manner on an insulating substrate, which is an extremely significant feature.In particular, this entire process is carried out at temperatures below 600°C, especially below 300°C. The fact that this panel can be manufactured at a temperature of 1000 yen has the great advantage that it is less susceptible to thermal distortion even if it has a large area.

In addition, the semiconductor used in the present invention mainly has a non-single crystal structure, and in particular, the semiconductor used in the present invention has a structure called SAS, which is an intermediate structure between amorphous and single crystal, and is stable against thermal energy up to 600'C. Other characteristics of

In particular, SAS is a non-single-crystal semiconductor with a lattice strain of 10 to 100 large microcrystal structures, and even if induction energy of 500Kllz to 3Gllz is used for its manufacture, a temperature of up to 300°C is sufficient; The diffusion length of electrons and holes is 100 to 10 that of amorphous silicon.
It has physical properties that are twice as large. The structure in which such non-single crystal semiconductors are stacked on a substrate allows for the provision of an ICF, and in addition, because current flows in the vertical direction, a microchannel type IGF with a channel length of 0.1-1μ is created.
An extremely significant feature is that it can be made without using high-precision photolithography technology.

Furthermore, in the present invention, the characteristics of the IGF are determined by its threshold voltage (vtn) in consideration of the characteristics of the SAS.
For example, instead of doping by ion implantation, S
Another feature is that it is controlled by the amount of impurities added to 2 and the high frequency power applied.

Therefore, the breakdown voltage is 20~30■, Vrs = -4~4V
could be controlled within a range of ±0°2■. Furthermore, the frequency characteristics are microchannels with a channel length of 0.1-1μ, so
115 conventional single crystal insulated gate semiconductor devices
~1150 could be obtained despite using a non-single crystal semiconductor.

Also, although it is a reverse leak, the Sl
By inserting silicon nitride to a thickness of 10 to 40 mm between S2 and S2, the leakage of this N''-P junction or P'-N junction was 10 mA or less even when IOV was applied in the opposite direction. This was comparable to the reverse leakage of a single crystal.

Also, if 10 to 30 mol% of oxygen is added to Sl,
Similarly, in the structure shown in FIG. 3, there was less leakage in the opposite direction, and the leakage was 1/10 to 1710 times less than in the case without additives. Naturally, this low leakage is extremely effective when implementing the matrix structure of FIG.

Furthermore, this reverse leakage is caused by the laminated type Sl, S2, S
When 3 was made of only amorphous silicon semiconductors, when a reverse bias of 10 μ was applied, the current was over 1 mA, but when this was used as a SAS, the current was reduced to 5 to 50 nA.

It is Sl, B in P or N type semiconductor of S3,
The P impurity was coordinated in a substitutional manner, and its ionization rate was 4N or more, the same as in the single crystal, and its activation energy was 0.2 to 0.3 eV, compared to the amorphous case of 0.2 to 0.3 eV.
The reason is that it is as small as 0.005 to 0.001 eV.

For this reason, highly coordinated impurities did not out-diffusion during lamination, resulting in clean bonding.

That is, the present invention is a stacked rGF, uses a non-single crystal semiconductor therein, in particular uses SAS, and also adds nitrogen oxide to Sl at the same time to clarify the junction between Sl and 52. The main features are that the reverse breakdown voltage is increased within the energy band, or that an SIS junction is used with an insulating or semi-insulating film interposed.

Furthermore, because of such a stacked IGF, it has become possible to fabricate a plurality of TCFs, resistors, and capacitors on a substrate, especially an insulating substrate, without using high-precision photolithography technology as in the past. This made it possible to develop it into a liquid crystal display.

In the present invention, silicon was used as the semiconductor, and silicon oxide or silicon nitride was used as the insulator. However, germanium, rnP, BP, GaAs, etc. may also be used as the semiconductor. It goes without saying that a single crystal semiconductor may be used instead of a non-single crystal semiconductor, and a polycrystalline semiconductor with a large crystal grain size may be used instead of SAS.

[Brief explanation of the drawing]

FIG. 1 shows an equivalent circuit of a mad-link structure in which an insulated gate type semiconductor device, an inverter resistor, a capacitor, or an insulated gate type semiconductor device and a capacitor are used as picture elements in a liquid crystal electro-optical device according to the present invention. FIGS. 2 and 3 are vertical sectional views showing the steps of manufacturing a stacked insulated gate type semiconductor device used in a liquid crystal electro-optical device according to the present invention. FIG. 4 is a vertical sectional view of a composite semiconductor showing a flat display in which the stacked insulated gate semiconductor device of the present invention and a capacitor or liquid crystal are integrated.

Claims (1)

[Scope of Claims] 1. A structure in which a liquid crystal display device and a charge storage capacitor are connected in series to an insulated gate field effect semiconductor device, wherein the liquid crystal display device is connected on the insulated gate field effect semiconductor device. A liquid crystal electro-optical device provided with one electrode. 2. A liquid crystal electro-optical device according to claim 1, wherein one electrode of the liquid crystal display device is provided so that no light is irradiated to the insulated gate field effect semiconductor device.