JPH02213500A - Method for flattening surface of semiconductor substrate with high precision - Google Patents
Method for flattening surface of semiconductor substrate with high precisionInfo
- Publication number
- JPH02213500A JPH02213500A JP3334589A JP3334589A JPH02213500A JP H02213500 A JPH02213500 A JP H02213500A JP 3334589 A JP3334589 A JP 3334589A JP 3334589 A JP3334589 A JP 3334589A JP H02213500 A JPH02213500 A JP H02213500A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- electrode
- projecting part
- semiconductor substrate
- high precision
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 35
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 title claims abstract description 13
- 238000005498 polishing Methods 0.000 claims abstract description 26
- 230000003287 optical effect Effects 0.000 claims abstract description 6
- 239000007788 liquid Substances 0.000 claims description 3
- 238000003672 processing method Methods 0.000 claims description 3
- 239000003792 electrolyte Substances 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 239000008151 electrolyte solution Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005305 interferometry Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000012224 working solution Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
この発明は、部分的に微小とつ部を有する半導体基板の
微小とつ部を取り除き、部分的に高精度で平坦面とする
加工方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of processing a semiconductor substrate partially having minute ridges by removing the minute ridges and partially forming a flat surface with high precision.
従来の技術
半導体基板は、単結晶インゴットから切断、研摩、エツ
チングおよびポリッシングなどの加工工程を経て仕上げ
られる。BACKGROUND OF THE INVENTION Semiconductor substrates are manufactured from single crystal ingots through processing steps such as cutting, grinding, etching, and polishing.
そして、半導体基板には高い平坦度が要求されるため、
通常上記加工工程において平面研削盤やラッピング盤な
どによる機械加工により鏡面仕上げが行われる。And since high flatness is required for semiconductor substrates,
Usually, in the above-mentioned processing step, a mirror finish is performed by machining using a surface grinder, a lapping machine, or the like.
機械加工は加工速度が速い利点がおるが、シリコン基板
の表面近傍に機械的損傷領域を形成し、その損傷内に異
物、不純物がたまりやすい。高い清浄度が要求されるシ
リコン基板は、加工)麦に被加工物を洗浄しても、これ
らの異物、不純物を完全に取り除くことは困難である。Although machining has the advantage of high processing speed, it forms a mechanically damaged area near the surface of the silicon substrate, and foreign matter and impurities tend to accumulate within the damaged area. Silicon substrates require a high level of cleanliness, and even if the workpiece is cleaned, it is difficult to completely remove these foreign substances and impurities.
しかし、機械研摩はバッチ処理的に手軽にでき、しかも
従来要求されている程度の平坦度は一応機械研摩で対処
できていた。そのため、半導体基板の鏡面加工に電解研
摩を利用することはなかった。However, mechanical polishing can be easily carried out in a batch process, and the level of flatness conventionally required can be achieved by mechanical polishing. Therefore, electrolytic polishing has not been used for mirror finishing of semiconductor substrates.
最近、デバイスにおけるリソグラフィー技術と関連して
、半導体基板に部分的領域の平坦度が高いことが要求さ
れるようになった。しかし、通常のメカノケミカル研摩
で仕上げられた基板表面の平坦度は、部分的に精度が要
求仕様から外れることが多々ある。ところが、平坦度の
精度が外れた基板は、再度通常の研摩を行っても修正で
きる保証が少ない。Recently, in connection with lithography technology for devices, it has become necessary for semiconductor substrates to have high flatness in partial regions. However, the flatness of the substrate surface finished by ordinary mechanochemical polishing often deviates from the required specifications in some areas. However, there is little guarantee that a substrate whose flatness is not accurate can be corrected even if it is polished again using normal polishing.
発明が解決しようとする課題
゛上記のごとく、部分的領域の平坦度が高いことが要求
される半導体基板において、部分的に平坦度の精度が要
求仕様から外れた基板の修正が容易に、かつ確実にでき
る方法の出現が望まれる。Problem to be Solved by the Invention: As described above, in a semiconductor substrate where high flatness is required in a partial region, it is possible to easily correct a substrate whose flatness accuracy partially deviates from the required specification. It is hoped that a reliable method will emerge.
この発明は、上記の要望を満たす半導体基板の高精度平
坦面加工方法を提供するものでおる。The present invention provides a high-precision flat surface processing method for semiconductor substrates that satisfies the above requirements.
課題を解決するための手段
上記目的を達成するため、この発明の高精度平坦面加工
方法は、通常のメカノケミカル研摩または電解研摩で鏡
面加工を施した半導体基板を、当該半導体基板と電気化
学的に反応する液体中に浸漬して光学的または電磁気的
方法により微小とつ部を検出し、当該微小とつ部に針状
電極を対向して電解研摩を行い、加工面に存在する微小
とつ部を選択的に溶解して部分的に高精度平坦化を行う
のである。Means for Solving the Problems In order to achieve the above object, the high-precision flat surface processing method of the present invention involves electrochemically processing a semiconductor substrate that has been mirror-finished by ordinary mechanochemical polishing or electrolytic polishing. Microscopic pits are detected by optical or electromagnetic methods by immersing them in a liquid that reacts with High-precision planarization is performed by selectively dissolving the parts.
作 用
液中に浸漬した半導体基板の微小とつ部に針状電極を対
向して電解研摩を行い、加工面に存在する微小とつ部を
選択的に溶解することにより、部分的に高精度平坦化を
行うことができ、要求精度を満した平坦度で再仕上げで
きる。Electrolytic polishing is performed by placing a needle-like electrode facing the micro-protrusions of the semiconductor substrate immersed in the working solution, and by selectively dissolving the micro-protrusions present on the machined surface, high precision is achieved locally. It can be flattened and refinished with flatness that meets the required accuracy.
また、半導体基板は陽極として電解研摩されるため、半
導体基板の加工面から不純物が取り除かれ清浄面に仕上
げることができる。Furthermore, since the semiconductor substrate is electrolytically polished as an anode, impurities are removed from the processed surface of the semiconductor substrate, resulting in a clean surface.
実施例 実施例1 この発明の詳細を第1図に基いて説明する。Example Example 1 The details of this invention will be explained based on FIG.
通常の機械研摩により鏡面仕上げされたシリコン基板(
1)を電解液(4)として5%旺を入れた電解液槽(3
)に浸漬する。また、シリコン基板(1)に対向して針
状電極(2)を浸漬する。この針状電極(2)の先端は
針状にとがるか、または小球状で突出させ、研摩加工し
たい位置に電気力線が集るように形成する。そして、シ
リコン基板(1)と針状電極(2)の間に調整可能な電
圧、電流を出力できる電!(5)を接続する。A silicon substrate that has been mirror-finished by ordinary mechanical polishing (
1) as the electrolyte (4) and an electrolyte tank (3) containing 5% oxygen.
). Further, a needle electrode (2) is immersed opposite the silicon substrate (1). The tip of this needle-shaped electrode (2) is sharpened into a needle shape or protruded into a small spherical shape so that lines of electric force are concentrated at the position desired to be polished. And an electric current that can output adjustable voltage and current between the silicon substrate (1) and the needle electrode (2)! Connect (5).
図示しない通常の光干渉法やインピーダンス変化法など
の光学的または電磁気的方法による平坦度計測器を使っ
て加工面の加工精度を調べ微小とつ部を検出する。そし
て、針状電極(2)の先端を微小とつ部に対向した近接
位置に調整する。Using a flatness measuring instrument (not shown) that uses an optical or electromagnetic method such as a normal optical interferometry method or an impedance variation method, the machining accuracy of the machined surface is checked and minute dents are detected. Then, the tip of the needle electrode (2) is adjusted to a close position facing the minute prong.
この方法により電解研摩を行えば、研摩速度は液温と印
加電圧量により調整される。したがって、電場印加条件
は微小とつ部の形状によって決められる。When electrolytic polishing is performed using this method, the polishing speed is adjusted by the liquid temperature and the amount of applied voltage. Therefore, the conditions for applying the electric field are determined by the shape of the microscopic portion.
また、加工面上に複数の微小とつ部がある場合は、例え
ばコンピュータ制御したX−Yステージにより針状電極
を位置合せして連続的に電解研摩する。Furthermore, if there are a plurality of microscopic pits on the surface to be machined, the needle-like electrodes are aligned using, for example, a computer-controlled X-Y stage, and electrolytic polishing is performed continuously.
今、下記の条件で電解研摩を行ったところ、鏡面加工し
たあとの微小とつ部を完全に取り除き、高精度平坦面に
仕上げることができた。When we performed electrolytic polishing under the following conditions, we were able to completely remove the microscopic ridges left after mirror polishing and create a highly accurate flat surface.
シリコン基板:機械研摩により鏡面仕上げした直径5イ
ンチ基板
針状白金電極:陰極を印加
印加電流電圧条件:50〜160 mA々、3〜6■電
解 液: 5重量%HF
電解液温度:10〜25℃
実施例2
次の条件で直径6インチのシリコン基板に通常の電解研
摩を行い鏡面仕上げした。Silicon substrate: 5-inch diameter substrate with mirror finish by mechanical polishing Needle-shaped platinum electrode: Apply cathode Applied current and voltage conditions: 50 to 160 mA, 3 to 6 Electrolyte solution: 5% by weight HF Electrolyte temperature: 10 to 25° C. Example 2 A silicon substrate with a diameter of 6 inches was subjected to ordinary electrolytic polishing under the following conditions to give it a mirror finish.
電 解 液:I HF:2 )12sO4:5 H
2Oを混合
電解液温度:20〜80℃
板状白金電極:陰極
印加電流電圧条件二80〜200 mA4. 0.5〜
6■上記電解研摩により鏡面加工されたシリコン基板に
実施例1と同じ要領で微小とつ部を選択的に電解研摩し
て高精度平坦面に仕上げた。Electrolyte: IHF:2)12sO4:5H
2O mixed electrolyte temperature: 20~80℃ plate-shaped platinum electrode: cathode applied current voltage conditions 280~200 mA4. 0.5~
6) In the same manner as in Example 1, minute ridges were selectively electrolytically polished on the silicon substrate mirror-finished by the electrolytic polishing described above to obtain a high-precision flat surface.
発明の効果
この発明は、通常のメカノケミカル研摩または電解研摩
で鏡面加工されたシリコン基板に針状電極を使って微小
とつ部を選択的に電解研摩することにより高精度平坦面
に仕上げることができ、また、加工面をクリーンに保て
るため、半導体装置の高集積化に寄与できる。Effects of the Invention This invention makes it possible to finish a highly precise flat surface by selectively electrolytically polishing minute ridges using a needle-like electrode on a silicon substrate that has been mirror-finished by ordinary mechanochemical polishing or electrolytic polishing. In addition, since the processed surface can be kept clean, it can contribute to higher integration of semiconductor devices.
第1図はこの発明を実施するための電解研摩装置の基本
構成を示す説明図である。
1・・・シリコン基板
2・・・針状電極
3・・・電解液槽
4・・・電解液FIG. 1 is an explanatory diagram showing the basic configuration of an electrolytic polishing apparatus for carrying out the present invention. 1...Silicon substrate 2...Acicular electrode 3...Electrolyte solution tank 4...Electrolyte solution
Claims (1)
工を施した半導体基板を、当該半導体基板と電気化学的
に反応する液体中に浸漬して光学的または電磁気的方法
により微小とつ部を検出し、当該微小とつ部に針状電極
を対向して電解研摩を行い、加工面に存在する微小とつ
部を選択的に溶解して部分的に高精度平坦化を行う半導
体基板の高精度平坦面加工方法。1. A semiconductor substrate that has been mirror-finished by ordinary mechanochemical polishing or electrolytic polishing is immersed in a liquid that electrochemically reacts with the semiconductor substrate, and minute protrusions are detected by an optical or electromagnetic method. A high-precision flat surface of a semiconductor substrate in which electrolytic polishing is performed with a needle-like electrode facing the micro-protrusions, selectively dissolving the micro-protrusions present on the processed surface and partially planarizing them with high precision. Processing method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3334589A JPH02213500A (en) | 1989-02-13 | 1989-02-13 | Method for flattening surface of semiconductor substrate with high precision |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3334589A JPH02213500A (en) | 1989-02-13 | 1989-02-13 | Method for flattening surface of semiconductor substrate with high precision |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02213500A true JPH02213500A (en) | 1990-08-24 |
Family
ID=12383979
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3334589A Pending JPH02213500A (en) | 1989-02-13 | 1989-02-13 | Method for flattening surface of semiconductor substrate with high precision |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02213500A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08139334A (en) * | 1994-11-10 | 1996-05-31 | Nec Corp | Thin film transistor and manufacturing method thereof |
JPWO2008140058A1 (en) * | 2007-05-09 | 2010-08-05 | 株式会社カンタム14 | Silicon substrate processing method, processed product and processing apparatus thereof |
JP2015515901A (en) * | 2012-05-10 | 2015-06-04 | レニショウ パブリック リミテッド カンパニーRenishaw Public Limited Company | Laser-sintered dental restoration and manufacturing method |
US10383713B2 (en) | 2012-05-10 | 2019-08-20 | Renishaw Plc | Method of manufacturing an article |
US10548696B2 (en) | 2012-05-10 | 2020-02-04 | Renishaw Plc | Method of manufacturing an article |
-
1989
- 1989-02-13 JP JP3334589A patent/JPH02213500A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08139334A (en) * | 1994-11-10 | 1996-05-31 | Nec Corp | Thin film transistor and manufacturing method thereof |
JPWO2008140058A1 (en) * | 2007-05-09 | 2010-08-05 | 株式会社カンタム14 | Silicon substrate processing method, processed product and processing apparatus thereof |
JP4562801B2 (en) * | 2007-05-09 | 2010-10-13 | 株式会社カンタム14 | Silicon substrate processing method and processing apparatus |
JP2015515901A (en) * | 2012-05-10 | 2015-06-04 | レニショウ パブリック リミテッド カンパニーRenishaw Public Limited Company | Laser-sintered dental restoration and manufacturing method |
US10383713B2 (en) | 2012-05-10 | 2019-08-20 | Renishaw Plc | Method of manufacturing an article |
US10548696B2 (en) | 2012-05-10 | 2020-02-04 | Renishaw Plc | Method of manufacturing an article |
US11553995B2 (en) | 2012-05-10 | 2023-01-17 | Renishaw Plc | Method of manufacturing an article |
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