JPH02212890A - Graphic data writing device - Google Patents

Abstract

PURPOSE:To shorten a graphic drawing time by providing a 1st and a 2nd first-in first-out memory means stored with start point addresses and end point addresses, a data holding means which holds the density of a figure and data on colors, and a 3rd first-in first-out memory means. CONSTITUTION:A start point and end point writing means 110 writes a calculation result in 1st and 2nd first-in first-out memory means 132 and 131 without waiting for the operation end of an address generating means 152, and moves to the calculation of next line coordinates. When the operation time of the address generating means 152 is shorter than that of the software processing of the means 110, the address generating means 152 starts next operation without waiting for the calculation of the means 110 as long as the values of the start point and end point of a next straight line are stored on memory means 132 and 131. Further, data on the density and colors of a figure are held in a data holding means 124 and then written in a memory means 134. Therefore, the same data is written in the memory means 134 repeatedly unless there is alteration. Consequently, the drawing time of a figure can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a two-figure data writing device, which is used, for example, to write information of an arbitrary figure pattern onto a two-dimensional array memory.

[Prior art] When processing a two-dimensional image, one image is
Divide into each minute position in the axial direction.

An image is expressed as a two-dimensional array of many pixels. When performing image processing on memory.

A two-dimensional array memory is used in which one or more memories are allocated to each of a large number of pixels.

When drawing an arbitrary graphic pattern on this type of memory, calculating the addresses in the X-axis and Y-axis directions is relatively complicated, so each pixel that makes up the graphic pattern is usually calculated by computer software processing. It is written sequentially into memory.

However, as a matter of course, software processing takes time, so it is not possible to draw complex graphic patterns in a short time, especially when drawing two-dimensional figures with filled interiors.

Since the number of pixels to be processed is enormous, it also takes an enormous amount of time to draw them.

In order to reduce the drawing time of this type of figure, conventionally,
For example, X
The coordinates are x1. , from point P1 whose Y coordinate is y, to whose X coordinate is x2. When drawing a straight line along the X axis to point P2 whose Y coordinate is y, each locus B (xl+1.
xl+2. xl+3. By providing a counter that sequentially generates =), it is possible to shorten the drawing time. [Problem to be solved by the invention] By the way, for example, a two-dimensional graphic pattern as shown in FIG. It can be expressed as a collection of. Therefore, when drawing this two-dimensional graphic pattern, it is necessary to calculate the coordinates of each straight line composing the pattern and to repeatedly draw each calculated straight line.

In this case, if the above-mentioned counter is provided, straight lines can be drawn in a short time. However, since the calculation of the coordinates of each straight line is complicated, it has to be done by software processing. Therefore, in that case, the graphic pattern is drawn by a combination of hardware and software.

That is, the software calculates the coordinates of the starting point and ending point of a straight line, passes the calculation results as parameters to the hardware device, and the hardware device draws the straight line according to the parameters.

While the hardware device is drawing a straight line, the software calculates the start and end points of the next straight line. Such processing is repeated.

However, the time required for the software to calculate the coordinates of one family 11A and the time required for the hardware device to draw one straight line are not constant, so they usually do not match.

When the length of a straight line is long, the time it takes for the hardware to draw a straight line is much longer than for software processing, so the software waits for a long time for the hardware to finish processing, and then transfers the calculation results to the hardware. It will be passed to the device. In other words, there is no choice but to waste time waiting during software processing.

Therefore, it is an object of the present invention to further shorten the time required for drawing a figure by using this type of software.

[Means to solve the problem] In order to solve the above iag, in the present invention.

Store multiple starting point addresses. First first-in, first-out memory means; second first-in, first-out memory means for storing a plurality of end point addresses; data holding means for holding density or color data of a figure; a data input terminal is connected to an output terminal of the data holding means and stores data for multiple densities or colors. Third first-in, first-out memory means; connected to the first and second first-in, first-out memory means and the data input terminal of the data holding means, which calculates the address values of the starting and ending points of the figure, and also calculates the address values of the calculated starting and ending points. With address values applied to the data input terminals of the first and second first-in first-out memory means, respectively, the first. A write signal is applied to the second and third first-in-first-out memory means all simultaneously. Start point end point writing means; the first point. Read pulse generating means for applying a read pulse to the second and third first-in, first-out memory means; connected to the data output terminals of the first and second first-in, first-out memory means, and between them based on the addresses of the start and end points; address generating means including a counter for sequentially generating addresses of; and one-figure output means = connected to an output terminal of said address generating means and an output terminal of said third first-in, first-out memory means.

[Operation] According to the present invention, the address generation means uses a counter to sequentially generate addresses between the start point and the end point based on the start point and end point calculated by the start point and end point writing means. The addresses of all the pixels forming the straight line can be generated in a short time by interpolating between them and the end point. Furthermore, since the first and second first-in, first-out memory means are provided between the start point/end point writing means and the address generation means, even if one processing of the address generation means is slower than the software processing of the address generation means, .

The start/end point writing means writes the calculation results to the first and second first-in, first-out memory means without waiting for the completion of the operation of the address generating means to write the calculation results to the first and second first-in, first-out memory means.
Now we can move on to calculating the s coordinate.

Conversely, even if the operating time of the address generation means is shorter than the software processing of the start and end point writing means, if the values of the start and end points of the next straight line are stored in the first and second first-in, first-out memory means, , the address generation means can move on to the primary operation without waiting for the calculation by the start/end point writing means. Therefore, it is no longer necessary to wait for one hour, so that the drawing time for figures can be shortened.

According to one aspect of the present invention, the density or color data of the five figures is stored in the data holding means and then written into the third first-in first-out memory means. Therefore, as long as there is no change in the density or color of the figure to be drawn, it is sufficient to repeatedly write the same data held in the data holding means into the third first-in, first-out memory means. There is no need to update the data in the data holding means until a change occurs, and the processing is simplified, so if there is no change in density or color, the drawing time of the figure is further shortened.

Other objects and features of the present invention will become clear from the description of the embodiments with reference to the following nine drawings.

[Example] Fig. 1 shows an electric circuit of one type of image processing device that implements the present invention. A page memo IJ 160 having a memory is provided, and the information of the processed image is written and stored as two-dimensional images on this page memory 160. Referring to FIG. 1, the page memory 160 has an X address terminal for specifying the X coordinate of one pixel (memory), a Y address terminal for specifying the Y coordinate of 700 pixels, a write strobe input terminal WE, and It is equipped with a data input terminal DI.

Microcomputer! 10 is connected to an input device (not shown) such as a keyboard or a disk memory device, and when a predetermined instruction is given, the image information is input.
Page memory 160 Graphic data is written on the two-dimensional storage area. In this embodiment, the input image information is encoded. For example, if it is a triangular figure shown in FIG. It includes coordinate values of three points PI, P2, and P3 indicating the figure, and a value indicating the density or color of the figure.

The operation of converting this coded image information into two-dimensional pixel group information as shown in FIG. 2 is a combination of software processing of the microcomputer 110 and processing of other hardware circuits as shown in FIG. executed by

In addition, in FIG. 2, the hatched portion indicates the portion to be filled in, and FIG. 3 shows an enlarged view of a portion A1 in FIG. 2.

The triangular pattern shown in FIG. 2 can be expressed by a large number of straight lines, for example, in a direction along the X-axis.

In other words, at an arbitrary Y coordinate YO between the Y coordinate JRYs at the lower end of this triangle and the Y coordinate Yg at the upper end, find the X coordinates Xs and Xs of the boundary between this triangle and the part that touches it, and calculate those points. Draw a straight line connecting them. The movement, Y
If the process is repeated for all ya marks between s and Ye in the order of the arrows shown in FIG. 3, the triangle shown in FIG. 2 will be drawn.

In the device shown in Fig. 1, the starting point of each of the many straight lines constituting a two-dimensional figure, the X locus II (Xs), the ending point X locus 41 (Xs), and the Y locus 1% (Y) are controlled by a microcomputer. It is obtained by calculation of 110. And an electric circuit connected between the microcomputer 110 and the page memory 160.

Through hardware processing, address information for each pixel forming a straight line connecting each starting point and ending point is sequentially generated.
It operates to write density data DATA to that address.

Referring to FIG. 1, the data bus of the microcomputer 110 has four latches 121, 122, 123, and
24 are connected, and each latch receives the end point Xe, start point Xs, and Y output from the microcomputer 110.
Coordinate Y and density data DATA are held.

Output terminal Q of latches 121, 122, 123 and 124
are first-in-first-out memories (FIF○: first-in-first-out) 131, 132.1, respectively.
33 and 134 are connected. In this example, all four memories 131-134 have the same storage capacity. These memories include a data input terminal IN, an IF strobe input terminal W, a data output terminal OUT, a read strobe input terminal R, and a full flag output terminal FF.

and an empty flag output terminal FE.

Each of the memories 131 to 134 can store N sets of data at once, but when all N sets of data are written, the full flag output terminal FF becomes active level (low level: L). When all the accumulated data is read out and the internal data becomes empty, the empty flag output terminal FE becomes active level (L).

The end point coordinate Xe output by the microcomputer 110 is latched by the latch 121, written to the memory 131, and then read out and applied to the input terminal P of the comparator 153. Similarly, the microcomputer 110
．． The starting point coordinates Xtt outputted by is latched by the latch 122, written to the memory 132, and then read out and applied to the preset data input terminal A of the counter 152.

After presetting the data applied to the data input terminal A, the counter 152 counts the clock pulses output from the first oscillator 151 and outputs the counted value to its output terminal Q. Since the preset value of the counter 152 is Xs, the cursed value at the output terminal Q of the counter 152 is Xs, Xs+
1. Xs+2゜Xs+3 lXs+4#
...changes sequentially. This value is page memory 1
60 and at the same time comparator 153.
is applied to the input terminal Q of.

Comparator 153 compares the values of two sets of input terminals P and Q. Then, while the value of P and the value of Q are not the same, the output terminal P
≠ Make Q active (H).

When the value of Q reaches the value of P, that is, when the address of the generated X coordinate reaches the end point IRX e, the output terminal P≠Q
The level of is switched to low level L, indicating that the operation for one line has been completed.

The signal output from the P≠Q terminal of the comparator 153 is applied to the counting permission input terminal EN of the counter 52, and when the signal becomes L, the counting operation of the counter 152 is prohibited.

Therefore, the counter 152 stops counting when the count value reaches Xe, and counts in the range from Xs to Xs.

The two input terminals of the gate 154 receive the signal output from the P≠Q terminal of the comparator 153 and the oscillation 111, respectively.
51 is applied. Therefore,
At the output terminal of gate 154.

When the P#Q terminal of the comparator 153 is H, that is, the counter 1
When 52 is counting, the signal that is the inverted level of the clock pulse is cursed.

That is, one clock pulse is applied to the write strobe input terminal WE of page memory 160 each time counter 152 counts and the X address it outputs is updated.

The read pulse generator 140 includes a pulse generator (not shown) therein, and has a first-in first-out memory 134.
When the empty flag output terminal FE of the comparator 153 is H (when data exists in the memory) and the signal output from the P≠Q terminal of the comparator 153 is L (the counter is stopping counting), a pulse is generated. Occur. This pulse is applied to the read strobe input terminal R of each of the four first-in first-out memories 131 to 134 and the data load input terminal L of the counter 152.
applied to D.

Every time the read pulse generator 140 outputs one pulse, the four first-in first-out memories 131 to 134 read the first data Xs, Xs, Y, and D held by each of them.
While outputting ATA to the output terminal, the counter 152
presets the input data Xs.

When the counter 152 presets data Xs, the value of its output terminal Q becomes Xs, and the value of P of the comparator becomes Xs.
s, the comparison result between P and Q becomes inconsistent, and the signal output from the P≠Q terminal of the comparator 153 switches to H. Therefore, counter 152 is allowed to count, addresses from Xs to Xs are sequentially output, and at the same time a write pulse is output from gate 154.

Further, the Y coordinate value Y output from the first-in first-out memory 133 and the density data DATA output from the first-in first-out memory 134 are applied to the Y address input terminal and data input terminal DI of the page memory 160, respectively.

Therefore, each time the readout pulse generator 140 generates one pulse, YIg, the address of each pixel group constituting one straight line at the position where the standard value is Y and the X coordinate value is from x3 to Xs. are sequentially applied to the page memory 160, and the concentration data DATA is applied to the address of the gate 1.
The data are sequentially written in synchronization with the write pulses outputted by 54. That is, each time the read pulse generator 140 generates one pulse, one line segment is drawn on the page memory 160.

FIG. 4 shows an outline of the processing of the microcomputer 110 of FIG. 1, and the contents of the processing of FIG. 4 will be explained.

In step 1, it is checked whether there is information on the figure to be drawn on the internal memory. If there is information to be drawn, in the first step 2, a set of figure data is read.0For example, in the case of the triangle shown in Figure 2, a code indicating its type, three vertices PI, P2 ．． Each coordinate value of P3 and the density value DAT^ are read.

In step 3, the smallest Y coordinate value Ys in the area of the figure to be drawn is stored in the Y coordinate value register for straight line drawing.For example, in the case of the triangle shown in FIG. Y! Store it in the register as l.

In step 4, the X coordinate value of the two intersections between the horizontal line (line parallel to the X axis) of the Y coordinate value (initially Ys) stored in the register and the line segment of the outline of the triangle is determined, and the coordinate value The smaller one is the starting point coordinate 41xs+the larger one is the ending point coordinate Xs.

In step 5, first, the X coordinate value Xe of the end point obtained in step 4 is output to the data bus, and a pulse CKI is output to hold Xs in the latch 121. and pulse CK.
2 is output to hold Xs in the latch 122, and further, the Y coordinate value stored in the register in step 3 is output to the data bus, and a pulse CK3 is output to hold Y in the latch 1.
23 to be held. Next, the density data D of the figure data
At the same time as outputting ATA to the data bus, pulse CK'
4 and causes the latch 124 to hold DATA.

In step 6, the state of the full plug FF output from the first-in, first-out memory 134 is referred to. If it is at the active level, that is, if there is no free space in the storage area of the memory 134, it waits until a free space becomes available, that is, until the FF is no longer active.

In this example, the full flag output from the first-in, first-out memory 134 is referred to, but the four first-in, first-out memories 131 to 134 have the same configuration, and in this example, the same amount of information is written to the four memories at the same time, as will be described later. Therefore, the same result can be obtained no matter which of the four memories 131 to 134 outputs the full flag.

If full flag FF is not active in step 6,
Proceed to step 7 and output one pulse to CKO.

At the falling edge of the pulse, first-in, first-out memories 131, 132, 133, and 134 contain Xe
, Xs, Y and DATA are written simultaneously.

In step 8, the Y coordinate value stored in the register is incremented (+1), and in the next step 9, the contents are checked. That is, it is checked whether the Y value exceeds the largest Y coordinate value Ya in the graphic area to be drawn.*Y) If Y6, it means that writing of one graphic has been completed.

If Y>Ya, return to step 4 after step 9 and calculate the starting point X of the straight line again for the updated Y coordinate value.
s and the end point Xs, and draw the straight line. This operation is repeatedly executed until Y)Ye is reached.

On the other hand, when data is written to the first-in, first-out memories 131 to 134, the empty flag FE becomes inactive, so the read pulse generator 140 outputs one pulse to the read strobe input terminal R of each of the first-in, first-out memories 131 to 134. Output. As a result, the counter 152 sequentially generates X-coordinate address information, and the gate 1.54 outputs a write pulse, so that the data of the pixel group forming an elliptical straight line is sequentially written into the page memory 160 at high speed. , when writing of that straight line is completed, if the empty flag FE is not active, that is, when data of the next straight line exists in the memories 1.31 to 134, the read pulse generator 140 immediately writes the next pulse to the memory. It outputs signals 131 to 134 and moves on to the drawing operation of the first-order straight line.

In other words, on the output side of the first-in, first-out memories 131-134, as long as data exists in those memories, a straight line drawing operation is performed regardless of the operation timing of the microcomputer 110 (i.e., asynchronously). is first-in first-out memory 131-1
Counter 1 will remain as long as there is no free space in the storage area of 34.
Processing such as calculation of the coordinates Xs and Xe can be continued regardless of the execution of the straight line drawing operation by the hardware circuit such as 52, that is, without waiting for time in step 6 of FIG. Therefore, unnecessary operations are eliminated and processing time is shortened.

Incidentally, the density or color of each figure handled by this type of image processing apparatus is constant. Therefore, while performing drawing processing on the same figure.

Density (or color) data DATA to be written into page memory 160 is constant. In this embodiment, the concentration data DATA output from the microcomputer 110 is temporarily held by the latch 124.

When the held data is written to the Xs, Xs, and Ytt first-in-first-out memories 131-133, it is simultaneously written to the first-in, first-out memory 134.

Therefore, while there is no need to change the concentration data DATA, the microcomputer 110 does not change the 41st! In step 5 of 1, the process of writing data DATA to the latch 124 is omitted. That is, while drawing figures with the same density or color, in step 5, Xa.

It is only necessary to write Xs and Y, which further reduces the drawing time of the figure.

[Effects] As described above, by using the present invention, it becomes possible to draw figures at high speed by combining a hardware device and software processing. In particular, it is possible to reduce wasted waiting time on the software and hardware sides in the part of data transfer between the software and hardware, so that the actual figure drawing time can be significantly shortened compared to the conventional method.

In particular, when there are few changes in the density or color of the figure, the data holding means (124) of the start point/end point writing means (110)
), the amount of software processing is reduced, and the time required to draw figures is further shortened.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the electrical circuit of the main part of an image processing apparatus embodying the present invention. FIG. 2 is a plan view showing an example of a figure drawn by the apparatus shown in FIG. 1, and FIG. 3 is a plan view showing an enlarged part AI of FIG. FIG. 4 is a flow chart showing an outline of the operation of the microcomputer 11O shown in FIG. 110: Microcomputer (starting point/end point writing means)
121-I24: Latch 124: (Data holding hand R) 131-] 34: First-in, first-out memory 131: (Second first-in, first-out memory means) 132
: (First first-in, first-out memory means) 134: (Third first-in, first-out memory means) 140: Read pulse generator (read pulse generation means) 151: Sent word 152: Counter (address generation means) 153: Comparator 154: Gate 160: Page memory 14 diagram Yakusai diagram e X sum

Claims (1)

[Claims] First first-in, first-out memory means for storing a plurality of starting point addresses; Second first-in, first-out memory means for storing a plurality of end-point addresses; Data holding means for holding density or color data of figures. ; a third data input terminal connected to the output terminal of the data holding means and storing data of a plurality of densities or colors;
first-in, first-out memory means; connected to the first and second first-in, first-out memory means and the data input terminal of the data holding means, which calculates the address values of the starting point and ending point of the figure, and the calculated address values of the starting point and ending point; starting point and ending point writing means for simultaneously applying a write signal to all of the first, second and third first-in, first-out memory means while applying a write signal to the data input terminals of the first and second first-in, first-out memory means, respectively; read pulse generating means for applying read pulses to the first, second and third first-in, first-out memory means; connected to the data output terminals of the first and second first-in, first-out memory means; Contains a counter that sequentially generates addresses between them,
A graphic data writing device comprising: address generating means; and graphic output means connected to an output terminal of the address generating means and an output terminal of the third first-in, first-out memory means.