JPH02206069A - Information reproducing device - Google Patents

Abstract

PURPOSE:To always reproduce exact data by controlling a write operation to the memory of read data of an optical card, etc., based on the relative position of a recording medium and a read head, and also, executing a read-out operation from the memory by synchronizing with the clock of a prescribed period. CONSTITUTION:Two pieces of tracks (n), (n + 1) of a recording medium are illuminated simultaneously, and reflected light beams are received with photodetectors 31, 41, respectively. The output of the detector 31 is demodulated by a demodulator 38 through a selector 34 and a PLL circuit 35. On the other hand, the output of the detector 41 is stored in a memory 44, and demodulated in the same way after the data of the track (n) is demodulated. In this case, write to the memory 44 is executed by generating a relative position detecting signal P with a frequency setting circuit 47, based on the output signal of a rotary encoder 46 connected to a motor 45, and read-out from the memory 44 is executed by the clock of a prescribed period. In such a manner, a jitter portion is eliminated, and exact data can always be reproduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information reproducing device that reads information recorded on a recording medium such as an optical card.

[Conventional technology]

In information reproducing devices such as optical cards, the reading speed is determined by the relative speed between the optical head and the recording medium for reading information, so it is difficult to illuminate a single track and read only that track. In this case, the read speed cannot be increased very much.

Therefore, for example, as disclosed in U.S. Pat. No. 4,730,293, multiple tracks are illuminated at the same time and information is read out in parallel for multiple tracks to increase the reading speed. is proposed.

In addition, the applicant also stated in Japanese Patent Application No. 63-295549,
Multiple recording areas of the recording medium are illuminated simultaneously to demodulate the read data of one recording area, store the read data of the other recording area in memory, and transfer the data stored in this memory to the one recording area. We have proposed a single system demodulation circuit that reads and demodulates the data after demodulating it.

FIG. 4 shows the configuration of an example of the information reproducing device proposed by the applicant. In this example, two tracks n and n+1 of the recording medium are simultaneously illuminated and their reflected lights are received by photodetectors 11 and 21, respectively, and the output of photodetector 11 is transmitted to amplifier 12. After being amplified by
loop) circuit 15, a phase comparator 16 and a VFO
(variable frequency oscil
The signal is supplied to a demodulator 18 via a demodulator 17 for demodulation. Further, the output of the photodetector 21 is amplified by the amplifier 22 and then converted into a binary signal by the binarization circuit 23 and stored in the memory section 24. After demodulating the data of track n, the selector 14 and the PLL circuit 15 The signal is then supplied to a demodulator 18 for demodulation.

FIG. 5 shows the configuration of the memory section 24 shown in FIG. 4. The memory section 24 includes a clock module 25 , a semiconductor memory 26 , a counter 27 and an AND gate 28 . When storing data, first, the read/write switching signal is set to the write state, the AND gate 28 is opened, and a reset signal is manually applied to the counter 27 to reset the count value.

These operations are controlled by a controller (not shown). Thereafter, the counter 27 is clock module 2
5, and its output is supplied as an address to the semiconductor memory 26 via the address bus 29, and the clock from the clock module 25 is supplied to the AND gate 28, thereby setting and synchronizing the address. A write pulse is then supplied from the AND gate 28 to the semiconductor memory 26, thereby storing data at the set address. Furthermore, in order to read data stored in the semiconductor memory 26, after demodulating the data of track n, the selector 14 is activated by a select signal from the controller (see FIG. 4) so that the data from the memory section 24 is transferred to the PLL circuit 15. This is done by manually switching the address, setting the read/write switching signal to the read state, and providing a reset signal to the counter to increment the address.

[Problem to be solved by the invention]

However, in the information reproducing device shown in FIG. 4, since the clock from the clock module 25 is used as a write pulse to the semiconductor memory 26 as shown in FIG. 5, the data contains jitter. If so, the data will be stored in the semiconductor memory 26 while including the thick data. This inevitably causes the problem that the data cannot be accurately reproduced, especially when demodulating data recorded using the self-clock modulation method. Note that, for example, when a rotary motor is used as a drive source for a recording medium, the above-mentioned jitter is caused by rotational unevenness called cogging due to non-uniformity of magnetic force within the morph.

This invention was made with attention to such problems, and it is possible to effectively remove thick portions of read data when it is stored in a memory and read out, and therefore to properly reproduce recorded data at all times. The purpose of the present invention is to provide an information reproducing device configured as follows.

[Means and operations for solving the problem] In order to achieve the above object, the present invention provides an information reproducing apparatus that reads data recorded on a recording medium by relatively moving a recording medium and a reading head. a memory means for storing data read by the reading head; a means for detecting a relative position between the recording medium and the reading head; and a memory means for storing the data read by the reading head based on an output of the relative position detecting means. Means for controlling a write operation to the memory means, and means for sequentially reading and demodulating the data stored in the memory means in synchronization with a clock having a predetermined period are provided.

In this way, by controlling the writing operation of the data read by the reading head to the memory means based on the relative position of the recording medium and the reading head, it is possible to write the data into the memory means with the thick portion removed. By reading out and demodulating the stored data in synchronization with a clock of a predetermined period, it is possible to obtain data free of jitter, thus making it possible to always accurately reproduce recorded data.

〔Example〕

FIG. 1 shows an embodiment of the present invention.

In this embodiment, as in the information reproducing apparatus shown in FIG. 4, two tracks n and n+1 of the recording medium are simultaneously illuminated, and the reflected lights are received by photodetectors 31 and 41, respectively. The data of each track nn+l is reproduced.

The output of the photodetector 31 is amplified by an amplifier 32, then converted to a binary signal by a binarization circuit 33, and then sent to a selector 34 and a PL signal.
I, the signal is supplied to a demodulator 38 via a phase comparator 36 and a VFG 37 which constitute a circuit 35, and is demodulated. Also,
The output of the photodetector 41 is amplified by an amplifier 42, then converted into a binary signal by a binarization circuit 43, and stored in a memory section 44.
Selector 34 and PLL after demodulating data of track n
The signal is supplied to a demodulator 38 via a circuit 35 for demodulation.

In this embodiment, in order to read data recorded on a track of a recording medium, a low reencoder 46 is connected to a motor 45 that relatively moves the recording medium and an optical head in the track direction. In the frequency setting circuit 47, based on the output signal representing the relative position between the recording medium and the optical head from the memory section 44,
A relative position detection signal P for obtaining an address and a write pulse when writing data is generated and supplied to the memory section 44.

FIG. 2 shows an example of the configuration of the memory section 44 shown in FIG. 1. As shown in FIG. The memory unit 44 includes a clock module 50 that generates a clock with a predetermined cycle, a semiconductor memory 51 that stores the binary signal from the binarization circuit 43, and a read/write switching signal from a controller (not shown). a selector 52 that selects either the output of the clock module 50 or the relative position detection signal P from the frequency setting circuit 47 based on the output of the clock module 50; A counter 53 sets a write/read address in the semiconductor memory 51, and an AND gate 54 outputs a write pulse to the semiconductor memory 51 based on a read/write switching signal and a signal selected by a selector 52.

The operation of this embodiment will be explained below.

When data is stored in the memory section 44, the read/write switching signal is first set to the write state, the AND gate 54 is opened, and the relative position detection signal P is selected by the selector 52, and furthermore, the counter 53 is set to the write state. A reset signal is input manually to reset the count value. These operations are controlled by a controller (not shown). Thereafter, the counter 53 is counted up by the relative position detection signal P, and its output is supplied as an address to the semiconductor memory 51 via the address bus 55, and the relative position detection signal P is supplied to the AND gate 54. A write pulse is supplied from the ND gate 54 to the semiconductor memory 51 in synchronization with the address setting, thereby storing data at the set address. In this manner, by writing data into the semiconductor memory 51 using the relative position detection signal P, jitter due to relative velocity fluctuation contained in the data can be removed from the data in the semiconductor memory 51.

Furthermore, when reading data stored in the semiconductor memory 51, after demodulating the data on track n, a select signal from the controller causes the selector 34 to be set so that the data from the memory section 44 is input to the PLL circuit 35. At the same time, the read/write switching signal is set to the read state, the selector 52 selects the output of the clock module 50, and a reset signal is given to the counter 53 to increment the address. In this way, the address of the semiconductor memory 51 is generated by the counter 53 using the clock from the clock module 50, and the stored data is read out and demodulated. In this way, if data is read from the semiconductor memory 51 using a clock with a predetermined period from the clock module 50, jitter will not be included in the reproduced data.

The jitter removal described above will be explained in more detail with reference to FIG.

In Figure 3, ■ uses an optical card as a recording medium,
The relationship between the relative speed (vertical axis) and relative position (horizontal axis) of the optical card and the optical head in an information reproducing apparatus that reproduces data by relatively moving the optical head back and forth in the track direction is shown.

Here, in the constant speed area where data is read, if the speed becomes slower as shown by symbol J, the read data in this area has a lower frequency than the read data in other constant speed areas as shown in ■. Become. Therefore, if read data is stored in memory using a clock with a predetermined period from the clock module shown in ■, and the stored data is read out using the same clock, it will be almost the same as the read data as shown in ■. The data is regenerated and the jitter remains included.

On the other hand, as in the embodiment described above, the read data is
If the relative position detection signal P shown by is used to store in the memory, jitter will be included in both the data to be stored and the relative position detection signal P, so the jitter will be canceled in the memory. It turns out. therefore,
If the data stored in the memory is read in this way using a clock with a predetermined period from the clock module shown in ■, you can obtain data without jitter as shown in ■, and the recorded data will always be accurate. It becomes possible to play.

Note that this invention is not limited only to the embodiments described above, and numerous modifications and changes are possible. For example, in the embodiment described above, the output of the low reencoder 46 is supplied to the frequency setting circuit 47 to obtain the relative position detection signal P, but the frequency of the signal obtained from the low reencoder 46 is The frequency setting circuit 47 can be omitted if it is suitable for writing data. Further, the relative position detection signal P may be obtained by recording a mark indicating the position on the recording medium and reading it without using a rotary encoder, or when the recording medium moves linearly like an optical card. may be obtained using a linear scale. Furthermore, if the signal from the encoder includes phase information, for example in the case of sine waves with a 90° phase difference, the position information is obtained by phase division, and a pulse is generated based on this position information. can also be used as the relative position detection signal P. Further, in the above-described embodiment, a plurality of tracks are illuminated at the same time to read out their data, but a plurality of sectors within one track may be illuminated at the same time to read out their data. Furthermore, the present invention can be effectively applied to the case where one track or one sector is illuminated and the data is read out, and the recording medium is not limited to an optical card, but also includes optical disks, magneto-optical disks, magnetic disks, magnetic cards, etc. It can be effectively applied to information reproduction from various recording media.

〔Effect of the invention〕

As described above, according to the present invention, the writing operation of data read by the reading head to the memory means is controlled based on the relative position between the recording medium and the reading head, and the reading operation is controlled at a predetermined period. Since this is performed in synchronization with the clock, it is possible to obtain data from which jitter has been removed, and therefore the data recorded on the recording medium can always be accurately reproduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of the configuration of the memory section shown in FIG. 1, and FIG. 3 explains the effects of the embodiment shown in FIG. 1. FIG. 4 is a block diagram showing the configuration of an example of an information reproducing apparatus previously proposed by the applicant. FIG. 5 is a block diagram showing the configuration of the memory section shown in FIG. 4. 31, 41... Photodetector 32.42... Amplifier 33, 43... Binarization circuit 34... Selector 35... PLL circuit 36... Phase comparator 37... VFO38. ... Demodulator 45 ... Motor 46 ... Rotary encoder 47 ... Frequency setting circuit 50 ... Clock module 51 ... Semiconductor memory 52 ... Selector 53 ... Counter 54 ... AND gate 55...address bus

Claims (1)

[Claims] 1. An information reproducing device that reads data recorded on a recording medium by relatively moving a recording medium and a reading head, comprising a memory means for storing data read by the reading head, and a memory means for storing data read by the reading head; means for detecting the relative position of the relative position detecting means; means for controlling the writing operation of the data read by the reading head into the memory means based on the output of the relative position detecting means; 1. An information reproducing apparatus comprising means for sequentially reading and demodulating in synchronization with a clock having a period of .