JPH02205066A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH02205066A
JPH02205066A JP1024883A JP2488389A JPH02205066A JP H02205066 A JPH02205066 A JP H02205066A JP 1024883 A JP1024883 A JP 1024883A JP 2488389 A JP2488389 A JP 2488389A JP H02205066 A JPH02205066 A JP H02205066A
Authority
JP
Japan
Prior art keywords
fuse
group
comparator
potential
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1024883A
Other languages
Japanese (ja)
Inventor
Norimasa Kurahara
藏原 憲政
Takumi Nishikido
錦戸 拓美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP1024883A priority Critical patent/JPH02205066A/en
Publication of JPH02205066A publication Critical patent/JPH02205066A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Dram (AREA)

Abstract

PURPOSE:To avoid the fluctuation of a composite output voltage by a method wherein comparators which judges whether fuses are cut off or not are provided. CONSTITUTION:A comparator group 9 composed of the same number of comparators as the number of fuses in a fuse group 8 is provided between a switch group 4 and respective points A. The (+) input terminals of the respective comparators in the comparator group 9 are connected to the respective points A. One of resistors in a resistor group 7 is connected to a reference resistor 10 whose one end is grounded and is used as the (-) input terminal of the comparator. The resistance of the fuse before cutting-off in the fuse group 8 is denoted by (r) and the resistance of the fuse after cutting-off is denoted by (r'). Further, the resistance of the reference resistor 10 is denoted by R. R is a little larger than (r) and large enough for the respective comparators in the comparator group 9 to judge IR>Ir for a current I. After the fuse is cut off, as r'>>R, the potential of the point A becomes higher than the potential of the point B, so that the output of the comparator is turned to 'H'.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に係り、特に高精度の出力電圧を発
生させるため、複数本のフユーズの中から任意のフュー
ズを切断する事によりトリミングを行う回路を有する半
導体装置に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device, and in particular, in order to generate a highly accurate output voltage, trimming is performed by cutting an arbitrary fuse out of a plurality of fuses. The present invention relates to a semiconductor device having a circuit that performs the following steps.

〔従来の技術〕[Conventional technology]

従来、この種の半導体装置は、第3図に示す様に、複数
本(ここでは3本)のフューズ群8の中から、任意のフ
ューズを切断した場合、切断したフューズにつながるA
点の電位が、スイッチ群4を構成する対応したトランジ
スタのしきい値電圧より高くなる(以下、このしきい値
電圧より高い電位を”H”、低い電位を”L”と称する
)事により、直接スイッチ群4を切り換え、所望の出力
電圧3を発生させていた。即ち、フューズが切断されて
いるかどうかの判定は、A点の電位がL”側にあるか、
H”側にあるかにより、決定されていた。
Conventionally, in this type of semiconductor device, as shown in FIG. 3, when an arbitrary fuse is cut out of a plurality of (three in this case) fuse group 8, an A connected to the cut fuse is connected to the cut fuse.
The potential at the point becomes higher than the threshold voltage of the corresponding transistor constituting the switch group 4 (hereinafter, a potential higher than this threshold voltage will be referred to as "H" and a potential lower than this threshold voltage will be referred to as "L"). The desired output voltage 3 was generated by directly switching the switch group 4. In other words, whether the fuse is blown or not is determined by whether the potential at point A is on the L'' side or not.
The decision was made depending on whether it was on the "H" side.

今、フューズ群8の一つのフユーズを切断した場合、電
流制限用抵抗群7の対応した抵抗は他端が電源電圧6に
接続されているから、電源電圧6の電圧レベルまでA点
の電位が上昇する。各A点は、各々スイッチ群4に導か
れ、このスイッチ群4によって制御された抵抗群5によ
り、出力端子3の電圧が決定される。
Now, if one fuse in fuse group 8 is cut, the other end of the corresponding resistor in current limiting resistor group 7 is connected to power supply voltage 6, so the potential at point A will rise to the voltage level of power supply voltage 6. Rise. Each point A is guided to a switch group 4, and a resistor group 5 controlled by the switch group 4 determines the voltage at the output terminal 3.

スイッチ群4は、演算増幅器(オペアンプ)2の−(マ
イナス)入力端子に接続され、オプアンプ2の出力は、
出力端子3と、9個の抵抗の直列体からなる抵抗群5の
一端に接続される。オペアンプ2の+(プラス)入力端
子1には、入力電圧が印加される。
The switch group 4 is connected to the - (minus) input terminal of the operational amplifier 2, and the output of the operational amplifier 2 is
It is connected to the output terminal 3 and one end of a resistor group 5 consisting of nine resistors connected in series. An input voltage is applied to the + (plus) input terminal 1 of the operational amplifier 2 .

ここで、スイッチ群4は、各A点に対応したインバータ
20.21.22と、これらインバータ20.21.2
2の出力を各々入力とするMOSトランジスタ24,2
5,28,30,32゜34.36と、各A点から直接
ゲートに導かれるMOS)ランジスタ23,26.27
.29゜31.33.35とを備えている。
Here, the switch group 4 includes inverters 20.21.22 corresponding to each point A, and these inverters 20.21.2.
MOS transistors 24, 2 each receiving the output of MOS transistor 2 as an input.
5, 28, 30, 32゜34.36 and MOS) transistors 23, 26.27 led directly from each point A to the gate.
.. 29°31.33.35.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

前述した従来の半導体装置は、A点の電位により、直接
スイッチ群4を切り換えるため、−担フーーズを切断し
て所望の出力電圧3が得られたとしても、フューズの切
断がまだ不完全で、熱その他のストレスにより、再び物
理的に接続される事故がある。この場合、高抵抗となっ
て導通が回復し、その抵抗値によってはA点の電位が“
L”に変化し、フューズの切断作業をしたにも拘らず、
切断されていないものと判定され、スイッチ群4が切り
換り、出力電圧3が変動してしまうという欠点がある。
In the conventional semiconductor device described above, since the switch group 4 is directly switched by the potential at point A, even if the - carrying fuse is cut and the desired output voltage 3 is obtained, the fuse is still not completely cut. There are accidents where they are physically reconnected due to heat or other stress. In this case, the resistance becomes high and continuity is restored, and depending on the resistance value, the potential at point A becomes “
Despite changing to "L" and cutting the fuse,
There is a drawback that it is determined that the disconnection is not performed, the switch group 4 switches, and the output voltage 3 fluctuates.

本発明の目的は、前記欠点が解決され、フューズの切断
が不完全で、切断後に熱やその他のストレスにより、再
び物理的lこ接続゛され、高抵抗となって導通が回復し
た場合でも、フューズが切断されているかどうかの誤判
定が起こりにくく、合わせ込んだ出力電圧が変動しない
ようにした半導体装置を提供することにある。
It is an object of the present invention to solve the above-mentioned drawbacks, and even when the fuse is incompletely cut and is physically connected again due to heat or other stress after cutting, the resistance becomes high and continuity is restored. It is an object of the present invention to provide a semiconductor device in which erroneous determination as to whether a fuse is blown or not is unlikely to occur and the adjusted output voltage does not fluctuate.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装置の構成は、所定のフユーズを切断す
る事によりトリミングが行えるように、複数のフューズ
を備えた半導体装置ζこおいて、前記フ飄−ズが切断さ
れているかどうかを判、定するコンパレータを設けたこ
とを特徴とする。
The structure of the semiconductor device of the present invention is such that trimming can be performed by cutting off a predetermined fuse. It is characterized by providing a comparator that determines the

〔実施例〕〔Example〕

次に本発明lこついて図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の半導体装置の回路図である
。第1図において、本実施例の半導体装置は、スイッチ
群4と各A点との間に、7工−ズ群8のフーーズの本数
と同数のコンパレータからなるコンパレータ群9を備え
ている点が、従来の第3図と大きく異なる。このコンパ
レータ群9の各コンパレータは、十入力端子を各A点に
接続している。抵抗群7の一つの抵抗と、一端が接地さ
れた基準抵抗10との間を接続し、コンパレータの一入
力端子としている。スイッチ!#:4等その他の回路は
、第3図と同様である。
FIG. 1 is a circuit diagram of a semiconductor device according to an embodiment of the present invention. In FIG. 1, the semiconductor device of this embodiment is provided with a comparator group 9 consisting of the same number of comparators as the number of foos of the seven-piece group 8 between the switch group 4 and each point A. , which is significantly different from the conventional figure 3. Each comparator of this comparator group 9 has ten input terminals connected to each point A. One resistor of the resistor group 7 and a reference resistor 10 whose one end is grounded are connected to serve as one input terminal of the comparator. switch! #: 4, etc. The other circuits are the same as in FIG.

今、フューズ群8に示す切断前のフューズの抵抗値をr
1切断後のフューズの抵抗値をr′とする。
Now, the resistance value of the fuse before cutting shown in fuse group 8 is r
Let the resistance value of the fuse after one cut be r'.

また、基準抵抗10の抵抗値をRとする。ここで、Rは
電流工に対し、(In > Ir)であると、コンパレ
ータ群9に示す各コンパレータが判定でき、rより若干
大きな値である。フューズ切断前は、A点の電位はB点
の電位より低いため、コンパレータの出力は”L”とな
フている。
Further, the resistance value of the reference resistor 10 is assumed to be R. Here, each comparator shown in the comparator group 9 can determine that R is (In > Ir) with respect to the electric current, and is a value slightly larger than r. Before the fuse is cut, the potential at point A is lower than the potential at point B, so the output of the comparator remains "L".

フューズ切断後は、(r’>R)となり、A点の電位は
B点の電位より高くなるため、コンパレータの出力は“
H”に変わる。こうして、任意のフニーズを切断し、ス
イッチ群4を切り換える事により、所望の出力電圧3を
得ることができる。さらに、フユーズの切断が不完全で
あり、熱その他のストレス番こより、切断したフユーイ
が再び物理的に接続され、その抵抗値が(r/→r“(
r’< r”刀と変化し念場合、A点の電位は低くなる
が、それがB点の電位より高ければ、すなわち(r’>
R)でありさえすれば、コンパレータの出力は′H@の
まま変化せず、従って出力電圧3が変動することもない
After the fuse is blown, (r'>R) and the potential at point A is higher than the potential at point B, so the output of the comparator is “
In this way, the desired output voltage 3 can be obtained by cutting off any fuse and switching the switch group 4.Furthermore, if the fuse is not completely cut off, heat or other stress may occur. , the disconnected fuse is physically connected again, and its resistance value becomes (r/→r“(
If the potential changes to r'<r'', the potential at point A will be low, but if it is higher than the potential at point B, that is, (r'>
R), the output of the comparator remains at 'H@' and does not change, so the output voltage 3 does not fluctuate.

実際には、フユーズを切断した後で、再び物理的lこ接
続されても rl はRと比較すると、かなり高い抵抗
値を示すため、フューズが切断されているかどうかの誤
判定は起こらない。□M2図は本発明の他の実施例の半
導体装置の回路図である。第2図に・おいて、本実施例
の半導体装置は、フューズ群8内の・フューズの本数と
同数の基準抵抗からなる基準抵抗群1工と、2倍の数の
抵抗から抵抗群7とを有する点が第1図と相違する。こ
こで、コンパレータ群9内の各コンパレ−タは9、各々
対応した基準抵抗のB点に接続される。
In reality, even if the fuse is physically reconnected after being cut, since rl exhibits a considerably higher resistance value than R, an erroneous determination as to whether the fuse is cut or not will not occur. □M2 is a circuit diagram of a semiconductor device according to another embodiment of the present invention. In FIG. 2, the semiconductor device of this embodiment has a reference resistor group 1 consisting of the same number of reference resistors as the number of fuses in the fuse group 8, and a resistor group 7 consisting of twice the number of resistors. It differs from FIG. 1 in that it has . Here, each comparator in the comparator group 9 is connected to the point B of the corresponding reference resistance.

本実施例は、基準抵抗群11を有し、フューズ群8の各
フユーズlこ対応した基準抵抗を用い、コンパレータ群
9のコンパレータにてフューズが切断されているかどう
かを判定する。
This embodiment has a reference resistance group 11, and uses reference resistances corresponding to each fuse in the fuse group 8 to determine whether or not a fuse is blown by a comparator in the comparator group 9.

この地合も、前記一実施例と同様に、フューズが切断さ
れているかどうかの誤判定が起こりにくいという利点が
ある。
This formation also has the advantage of being less likely to cause an erroneous determination as to whether or not the fuse is blown, as in the first embodiment.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は、基準抵抗による基準電
位と、フューズによる電位とをコンパレータを用いて比
較することにより、フユーズが切断されているかどうか
の誤判定が起ζりにくいため、フユーズの切断が不完全
であり切断後に熱、その他のストレスζこより、再び物
理的に接続され、高抵抗となって導通が回復した場合で
も、所望の出力電圧を得られるという効果がある。
As explained above, the present invention uses a comparator to compare the reference potential provided by the reference resistor and the potential provided by the fuse, thereby making it difficult to misjudge whether or not the fuse is disconnected. Even if the disconnection is incomplete and the connection is physically reconnected due to heat or other stress ζ after the disconnection, resulting in high resistance and continuity is restored, the desired output voltage can be obtained.

第1図は本発明の一実施例半導体装置の回路図、第2図
は本発明の他の実施例の半導体装置の回路図、第3図は
従来の半導体装置の回路図である。
FIG. 1 is a circuit diagram of a semiconductor device according to one embodiment of the present invention, FIG. 2 is a circuit diagram of a semiconductor device according to another embodiment of the present invention, and FIG. 3 is a circuit diagram of a conventional semiconductor device.

1・・・・・・入力電圧、2・・・・・・オペアンプ、
3・川・・出力端子、4・・・・・・スイッチ群、5・
・・・・・出力電圧制御用抵抗群、6・・・・・・電源
電圧、7・・・・・・電流制限用抵抗N、8・・・・・
・フユーズ群、9・・・・・・コンパレータ群、10・
・・・・・基準抵抗、11・・・・・・基準抵抗群、2
o。
1... Input voltage, 2... Operational amplifier,
3. River: Output terminal, 4: Switch group, 5.
...Output voltage control resistor group, 6...Power supply voltage, 7...Current limiting resistor N, 8...
・Fuse group, 9...Comparator group, 10・
...Reference resistance, 11 ...Reference resistance group, 2
o.

21.22・・・・・・インバータ、23乃至36・川
・・MOS)ランジスタ。
21.22... Inverter, 23 to 36... MOS) transistor.

代理人 弁理士   内 原   音Agent Patent Attorney Oto Uchihara

【図面の簡単な説明】[Brief explanation of the drawing]

Claims (1)

【特許請求の範囲】[Claims] 所定のフューズを切断する事によりトリミングが行える
ように、複数のフューズを備えた半導体装置において、
前記フューズが切断されているかを判定するコンパレー
タを設けたことを特徴とする半導体装置。
In a semiconductor device equipped with multiple fuses, trimming can be performed by cutting a predetermined fuse.
A semiconductor device comprising a comparator for determining whether the fuse is blown.
JP1024883A 1989-02-02 1989-02-02 Semiconductor device Pending JPH02205066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1024883A JPH02205066A (en) 1989-02-02 1989-02-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1024883A JPH02205066A (en) 1989-02-02 1989-02-02 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH02205066A true JPH02205066A (en) 1990-08-14

Family

ID=12150587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1024883A Pending JPH02205066A (en) 1989-02-02 1989-02-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH02205066A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57101769U (en) * 1980-12-13 1982-06-23

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57101769U (en) * 1980-12-13 1982-06-23

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