JPH02199584A - Method of image contraction - Google Patents

Abstract

PURPOSE:To attain the rapid processing of contraction by using a process for obtaining an added value of reference picture element values determined in accordance with contraction ratios and a process for converting a picture element having digits smaller than the number M of digits required when the added value of the reference picture elements is expressed by a decimal number into the data of N planes expressed by a bit for the contraction. CONSTITUTION:Added values, e.g. a11 to a28, to be inputted to a reference picture element added value memory 4 for calculating the added value of reference picture elements and the data in the 1st line and the 1st byte are inputted to a reference picture element adding means 1. Since the initial reference picture element interval data is '0', the value is shifted to the right by one bit by a shift register 1A, a picture element P112 is moved to the 1st bit position, the P112 is similarly extracted by a mask circuit 1B and added to Q11 by an adder 1C. Similarly, a P113 is extracted and added to a Q11 to end the processing of three reference picture elements. Thus, each three picture elements are processed, the maximum value of the added value is set up to '9' and the necessary number of digits is set up to a value less than M4 only by one.

Description

Detailed Description of the Invention (Industrial Field of Application) This invention performs reduction conversion in order to output a digital image in which one pixel is expressed as one bit in black and white binary to an image output device capable of multi-value display. In this case, the present invention relates to an image reduction conversion method for obtaining a reduction conversion image with less deterioration in image quality by converting it into a multivalued image.

[Conventional technology]

Conventionally, the simplest method for reducing and converting digital images (black and white binary images) in which one pixel is represented by one bit in black and white binary values is to change the rows and columns of the original image to the values required in the converted image. One method is to thin out images appropriately, and is used as a reduction conversion method for displaying images on a display such as a personal computer. This method is easy to process, and is used as a simple method when, for example, you only want to know the layout of a word processor. However, when reading the contents of a document, this method is not suitable because the image quality deteriorates significantly due to occurrence of cuts and smearing. On the other hand, as a reduction conversion method from a black and white binary image to a black and white binary image, S
PC method (-Proceedings of the 7th National Conference of the Society of Image Electronics Engineers, Proceedings No.
, 10, 1975) and area discrimination method (IEICE Technical Report RPL8)
1-92) have been published. These conversion methods have the disadvantage that the image quality deteriorates due to breakage caused by the disappearance of thin black lines and blurring caused by the disappearance of thin white lines. In order to resolve these shortcomings, the TP method (IEICE Technical Report ED84-26, 1986), which prevents deterioration of image quality by determining thin lines and storing them, was also announced. ing. Even with this method, cuts and distortions were not eliminated, so it was insufficient as a reduction conversion method for outputting to an image output device capable of multi-value display such as a personal computer display. Furthermore, as a reduction conversion method for outputting to an image output device capable of multi-level display to prevent clipping or collapse, when the converted image is mapped to the original image, the values of the surrounding original pixels to the converted pixel of interest are added. A method has been considered in which multi-valued data is used as the value of the converted pixel.

In this method, the relationship between the original image and the converted image is shown in Figure 7(a).
, in the case shown in (b), the reduction ratio (vertical direction B/A,
The position of the converted pixel and the reference pixel are calculated from the horizontal direction (C/D). As shown in Figure 7, black pixels are
The values of the reference pixels around the conversion pixel of interest are added as °1°', white pixel °"0°". In Fig. 7(a), the added values of the reference pixels are o", "i°". , “'2”, ““3
゛.

Five types of “4”, °°0゛1°° in Figure 7(b)
“°2°° “”3” '4°' 5°
There are 10 types: "6"', 7, "8", and "9°". A converted image of good quality can be obtained by displaying the gradation value corresponding to the added value of the reference pixels.

This conversion method has the drawback that the added value of the reference pixels becomes multivalued data of the number of reference pixels + Lebel, and the amount of data increases compared to the case of reduction to binary data.

This invention solves the above-mentioned drawbacks in the reduced-converted image, which utilizes the values of a plurality of surrounding original pixels around the converted pixel of interest when mapping the reduced-converted image to the original image. The purpose of this invention is to provide an image reduction conversion method that allows high-quality multi-value reduction conversion images with a small amount of data to be obtained from value images at high speed with a simple circuit configuration and a small number of calculations.

[Means to solve the problem]

The invention described in claim (1) of the image reduction conversion method according to the present invention includes a process of obtaining an added value of the reference pixel values determined according to the reduction ratio, and a process of obtaining the added value of the reference pixel values obtained thereby. 1 less than the number of digits M required when expressed in base numbers
It consists of a process of converting pixels into M-plane data expressed in 1 bit.゛Also, the process of converting 1 pixel into M-plane data expressed with 1 bit involves converting each digit of the added value in the order of the converted pixel up to the number M of digits required when the added value of the reference pixel is expressed in binary.・The process of converting 1-byte length or 1-word length data determined by the number to a predetermined position to convert it into M-plane data in which 1 pixel is expressed with 1 bit, and converting the M-plane data into 1 pixel less than M. It can also be a logical operation process to create an M plane expressed in 1 bit.

(Operation) According to the present invention, a high-quality converted image can be obtained with a smaller amount of data than conventional reduction conversion to a multivalued image.

Further, in the invention described in claim (2), similarly to the invention described in claim (1), a high-quality multivalued converted image with a small amount of data can be obtained, and furthermore, the calculation can be performed with a simpler circuit configuration. Converted pixels can be obtained quickly with a small number of times.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of the present invention.

However, here, to simplify the explanation, the reduction ratios in the horizontal direction and the vertical direction are assumed to be the same, which is B/A. DATA indicates the position data of the reference pixel consisting of the number of reference pixels corresponding to the reduction ratio, reference pixel processing unit, and reference pixel group interval data when the converted image is mapped to the original image, and 1 is the shift register I.
A means for adding the value of the reference pixel consisting of a mask circuit 1B and an adder circuit 1C; 2 is necessary when the added value of the reference pixel consisting of a shift register 2A, a mask circuit 2B and an OR circuit 2C is expressed in binary numbers; Means for converting each bit of the added value of reference pixels up to the number of bits M into M plane data consisting of 1 bit per pixel; 4 is a memory for addition values of reference pixels with an initial value of O, 5 is a memory for M-plane data with an initial value of 0, and 6 is a memory for N-plane 2-minute data.

Among the reference pixel position data, the reference pixel number indicates the number of pixels to be added in the horizontal and vertical directions.
For example, when the number of reference pixels is 3, the unit of addition is three lines of data in the vertical direction and three pixels in the horizontal direction. The number of reference pixels may be determined according to the relationship shown in FIG. 2 depending on the reduction ratio.

The reference pixel processing unit is a processing unit for performing addition of reference pixels. When converting the reference pixel addition value into M-plane multi-value data, when processing is performed in 1-byte length units, the reference pixel processing unit may be the number A in the denominator of the reduction rate. At this time, the number of added values of the reference pixels corresponding to the converted pixels is 8×(the number B of the numerator of the reduction rate). When processing is performed in units of one word, the denominator of the reference pixel processing unit reduction ratio is A)X (one word length/8).

Reference pixel group spacing data is data that indicates the overlap of a collection of reference pixels (reference pixel group), and when the reduction ratio and reference pixels have the relationship shown in Figure 2, the reduction ratio is always O at a reduction ratio of 1/integer.
It is. At a reduction rate of 1/a non-integer, the values are 0 and -1, and the cycle is repeated at a period determined by the numerator B of the reduction rate. When adding reference pixels, when the reference pixel group interval is 0, addition is started from a new reference pixel, but when it is -1, addition is started from the previous reference pixel.

The reduction conversion method according to the present invention will be described for a case where the reduction ratio is 215 and processing is performed using 1-byte length data.

The positional relationship between the reference pixel and the converted pixel is the same as in FIG. 7(b). At this time, as the position data of the reference pixel, the number of reference pixels in the horizontal and vertical directions is 3, and the reference pixel processing unit is 5.
The byte and reference pixel intervals are values obtained by repeating 0 and -1 each time.

The input data will be explained below assuming that the left pixel in FIG. 7 is stored starting from the right bit, as shown in FIG.

In the data in Figure 3, P ill + P 112 +
P 113 is the conversion pixel Q + reference pixel, P 113
+P114 +2015 is the reference pixel of conversion pixel Q,,2, pttaP 117 * P III! l is the converted pixel Q, 1. Reference pixel of Ptea + PL21 +
P 122 is the reference pixel of conversion pixel Q, 14, P 12
3 + P 124 + P + 28 is the converted pixel Q11
5 reference pixels, P 125 + P 12B + P1
27 is the reference pixel of conversion pixel Q 118, P1□8 *
P 13'l + P 132 is the reference pixel of the conversion pixel Q117, P132, PI3'3, P, 34 is the reference pixel of the conversion pixel Q118, P136 + P 138 + P
+37 is the reference pixel of conversion pixel Q 121, P137・+
P 138 + P 141 is the reference pixel of conversion pixel Q, 22, PI42 + P143 + PI44 is the reference pixel of conversion pixel Q123, PI'441 145'I
P+48 is the reference pixel of conversion pixel Q124, P147
+ P+4a l P+s+ is the reference pixel of conversion pixel Q126, P+s'+ + P182P153 is conversion pixel Q
128 reference pixels, P154Pe55+ P+5a is conversion pixel Q, 27 reference pixels, Po5e + Plst
+P+sa becomes the reference pixel for the conversion pixel Q128.

Next, the operation of the embodiment shown in FIG. 1 will be explained.

First, an added value of reference pixels is calculated. For the purpose of explanation, the addition value to be stored in the addition value memory 4 of the reference pixel is all+
a12+ a13+ a14+ al! +a
lB+817+ ” Ia+ 821+ 82
2+ 823+ 824+ 8 28a 261
The data of the first byte of the 01 line represented by a 271 a 28 is input to the addition means 1 of the reference pixel. Initially, the reference pixel interval data is 0. Since the value is 0, pHl
, Add the value of PI12PII3 to all. This addition is performed by the following operation. Rightmost bit P11 on shift register 1A! is taken out as 1-byte length data by the mask circuit 1B, and added to all by the adder circuit 1C. Next, shift register 1A shifts 1 bit to the right to move P112 to the first bit position, similarly takes out mask circuit IB"rP++2, and adds it to a1□ by adder circuit 1C.Similarly, p+B Take out all
Add to. This completes the processing for three reference pixels. Next, since the reference pixel group interval is -1, the values of the previous reference pixels P, 13 and P 114 + P 115 are added to a12 by the same operation as above. Next, since the reference pixel group interval is 0, P 116 + P 117 +
The value of P118 is added to als by the same operation as above. Next, since the reference pixel group interval is -1, the value of Pl, 8 is added to a14. This completes the first byte of data.

Input the second byte data to the addition means 1 of the reference pixel,
P 121 + P 122 is also added to at4 to complete the processing for three reference pixels. Repeat the process below,
The data of the 5th byte is input to obtain the added value of the 5 bytes of reference pixels on the first line.

As mentioned above, by inputting and processing the data of each byte, all, a 12+ a lj+ a14
+a IS+ a 16+ a 17+
a Ia+ a 2++ a 22+ a
23+824+ a2S+ a2B+ a27+ a
For 2a, the added value of the 5-byte first line, which is the reference pixel processing unit, can be obtained.

Subsequently, similarly, the 5 bytes of the second line and the 5 bytes of the third line are sequentially input and added to the added value of the reference pixels up to that point.

In this way, an added value of 2×8 reference pixels as shown in FIG. 4 is obtained from the 5 bytes and 3 lines of data shown in FIG. 3.

Second, the added value of the reference pixels is extracted for each digit expressed in binary numbers and converted into plain data. The number of planes is up to M, which is the number of digits required when expressed in binary numbers. When the number of reference pixels is 3, the maximum value of the added value of converted pixels is 9, so M is 4.

2 from the added values of the 2 sets of 8 pixels obtained by the reference pixel addition means 1.
The set is converted into one byte length of four blocks of data. To explain the memory of this 1-byte length data, E all E 1
2+ E l'3+ E 14+ E 21+ E 2
2+ E 23E24.

The reference pixel addition value is transferred from reference pixel addition value memory 4 to 1.
The added values shown in FIG. 1 are input one by one to the means 2 for converting them into M-plane data. Shift register 2A from 1-byte binary representation "00000101" of value 5 of all
The following processing is performed by the mask circuit 2B and the OR circuit 2C. The first digit "1'' of all is taken out by the mask circuit 2B at the first bit position of the 1-byte length data and logically ORed with Ell. Next, the second digit "0" is transferred to the right by the shift register 2A. After shifting 1 bit to the first position of 1-byte length data, mask circuit 2
B is taken out and logically summed with EI2. Similarly, 3
Take out the digit ``1°°, OR with E13, the 1st digit''
o'' is taken out and logically summed with E14.

a 12(7) value” o o o o o o ti
” is taken out at the second bit position by the shift register 2A and mask circuit 2B, and E l l by the OR circuit 2C.
+E 12°E 13+E +4 and logical OR. Similarly, as3 is the third bit position, a14 is the fourth bit position, als is the fifth bit position,
a16 is the sixth bit position, a17 is the seventh bit position, and a□8 is the eighth bit position. E
11+ E 121 E 131 E 14 is obtained. For 821 to 82B, E2++ E22+ E23E24 shown in the figure is obtained in the same manner.

Thirdly, a case will be explained in which the logic operation means 3 of FIG. 1 converts data into data for N=2, that is, two plays. 1 of 2
D all D
12+D 21'+D 22.

The data Ell to E14 for 4 blocks of 1 byte length are input to the logical operation means 3, and the data D I l+ for 2 blocks shown in FIG. D
Obtain I2. The logical operation means 3 in this case may have any configuration as long as it realizes the logical formula shown by the following formula.

D nl"' E nJ+(E n2* E n3)
D n2” E n4+E n3 n is 1or
2 +++++ (1) However, the ten symbol represents a logical sum, the * symbol represents a logical product, and the - symbol represents a complement.

Similarly, D2□ and D22 are obtained for E21 to E24.

Furthermore, when data for two brains is used as shown in FIG. 6(b), the logical expression (1) may be changed to the following expression. That is, by changing the -arithmetic calculation means 3, it is possible to obtain data for any two blocks other than those shown in FIG.

D n, = (E na * E nl) + (En3 * (
En2* Ens) )+(-En3*(En2+E
n1)) Dn2=En4+(El13* (Enz+Ent)
). teeth,. r2...
・ (2) In the vertical direction, because the reference pixel group interval is repeated every time with values of O and 1, it is recommended to use the last line of the previous three lines of data as the first line. You can repeat it every time. In this way, by processing all the original pixels in the horizontal and vertical directions as reference pixels, we obtain a converted image of multi-value data for one 2-ray frame in which one pixel with a reduction ratio of 215 is expressed in one bit. be able to.

For example, when a personal computer has a memo 'spi' for displaying image data, it has a pole number plane configuration with one pixel and one bit, and the specific display color is determined by a lookup table. To do this, the two planes of data described above are transferred to the image data display memory via the bus, and white, black, and two intermediate colors are determined using a lookup table.

Note that the order of the original pixels has been explained assuming that the right end is the first pixel, but if the left end is the first pixel, when calculating the added value of the reference pixel, the manual data as the reference pixel processing unit is processed in reverse order. Similar processing is possible if you do this.

(Effects of the Invention) As explained above, the present invention provides a method for reducing and displaying a monochrome binary digital image on an output device capable of multi-value display.
Calculate the sum of nxn reference pixels surrounding the conversion pixel of interest as the value of the conversion pixel, and express 1 pixel with 1 bit corresponding to the number of digits M required when expressing the acid value in binary. The amount of data is A reduced conversion image of good quality with a small number of calculations can be obtained at high speed with a simple circuit configuration.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining the present invention in detail, FIG. 2 is a diagram showing an example of the relationship between the reduction ratio and the number of reference pixels, and FIG. 3 is a diagram explaining the flow of the reduction No. 11 conversion method of the present invention. black and white 2
Figure 4 shows the added value of the reference pixel in the data example of Figure 3 and its binary representation, and Figure 5 (a) shows the data example of 5 bytes and 3 lines of a part of the value digital image. Figure 5 (b) is a diagram showing multi-value data obtained by converting the added value into 4 planes of 1 bit per pixel.
Diagram 6 showing 2-plane multi-value data of 1-bit pixel
FIGS. 7A and 7B are explanatory diagrams of examples of logical operation means, and FIG. 7 is a diagram for explaining a conventional reduction conversion method in which the added value of reference pixels is converted into multivalued data. In the figure, 1 is the reference pixel addition means, 1 is the shift register, 1B is the mask circuit, 1c is the addition circuit, and 2 is the number of bits M required when expressing the added value of the reference pixels in binary. 2A is a shift register, 2B is a mask circuit, 2C is an OR circuit, 3 is a logic operation means, 4 is for addition value Memory, 5 is memory for M plane data, 6 is memory for N plane data. cQ × ○−−− ○ ○ ○−−− × × ○ ○ ○ ○−◆ × × ○ ○ × Bad Q bacteria○ ○ ×

Claims (2)

[Claims] (1) When reducing or converting a digital image in which 1 pixel is expressed by 1 bit at an arbitrary magnification, when the value of each converted pixel of the converted image after conversion is mapped to the original image before conversion, the conversion to focus on In a reduction conversion method in which the value of a pixel is determined by referring to the value of the original pixels of the surrounding original image for the converted pixel, a process of obtaining an added value of the value of the reference pixel determined according to the reduction ratio, and the obtained reference It consists of the process of converting one pixel, which is less than the number of digits M required when expressing the pixel addition value in binary, into N-plane data expressed in one bit, and the converted image is expressed in one bit per pixel. A method for reducing and converting an image into an N-plane multivalued image. (2) The process of converting one pixel into N-plane data, which is expressed by one bit, converts each digit of the added value to the converted pixel until the number M of digits is required when the added value of the reference pixel is expressed in binary. A process of converting one pixel into M-plane data in which one pixel is represented by one bit by extracting it at a predetermined position of one-byte length or one-word length data determined by the order, and converting the data of the M plane into one pixel less than M. 2. The method for reducing and converting an image according to claim 1, further comprising a logical operation process for converting an image into N planes expressed in bits.