JPH0219675B2 - - Google Patents

Info

Publication number
JPH0219675B2
JPH0219675B2 JP55155350A JP15535080A JPH0219675B2 JP H0219675 B2 JPH0219675 B2 JP H0219675B2 JP 55155350 A JP55155350 A JP 55155350A JP 15535080 A JP15535080 A JP 15535080A JP H0219675 B2 JPH0219675 B2 JP H0219675B2
Authority
JP
Japan
Prior art keywords
charge
signal line
vertical signal
bias
horizontal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55155350A
Other languages
Japanese (ja)
Other versions
JPS5779774A (en
Inventor
Shinichi Teranishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP55155350A priority Critical patent/JPS5779774A/en
Publication of JPS5779774A publication Critical patent/JPS5779774A/en
Publication of JPH0219675B2 publication Critical patent/JPH0219675B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14831Area CCD imagers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor

Description

【発明の詳細な説明】 この発明は2次元固体撮像装置に関する。[Detailed description of the invention] The present invention relates to a two-dimensional solid-state imaging device.

第1図は従来の2次元固体撮像装置の平面模式
図である。図において、半導体基板の受光側の主
面にこの基板とpn接合し、入射光による信号電
荷を蓄積する蓄積領域1が複数列に多数個配列形
成されている。蓄積領域1の各列ごとに対応して
垂直信号線2が設けられている。蓄積領域1と垂
直信号線2の間にはMOS型電界効果トランジス
タ(MOSFET)の垂直スイツチ3があり、蓄積
領域1から垂直信号線への信号電荷の移動を制御
する。これらの垂直スイツチ3は垂直シフトレジ
スタ4によつて駆動される。垂直信号線2の一方
の端部に対応して埋め込み型電荷結合装置5が設
けられている。水平電荷転送装置としては埋め込
み型電荷結合装置(BCCD)や表面型電荷結合装
置(SCCD)やバケツトブリゲードデバイス
(BBD)を用いることができる。BCCDは信号電
荷の転送効率が良いので適している。1本の垂直
信号線に対して埋め込み型電荷結合装置5の少な
くとも1転送段以上の転送段が対応している。垂
直信号線2と埋め込み型電荷結合装置5との間に
は、垂直信号線2から埋め込み型電荷結合装置5
への信号電荷の移動を制御する水平スイツチ6が
設けられている。この水平スイツチ6は1個また
は複数個のMOSFETで構成されている。第1図
ではMOSFETを1個用いた場合を示した。埋め
込み型電荷結合装置5の一方の端部は出力装置7
に接続されている。
FIG. 1 is a schematic plan view of a conventional two-dimensional solid-state imaging device. In the figure, a large number of storage regions 1 are formed in a plurality of rows on the light-receiving side main surface of a semiconductor substrate and are connected to the substrate in pn junction and accumulate signal charges caused by incident light. A vertical signal line 2 is provided corresponding to each column of storage region 1 . A vertical switch 3 of a MOS field effect transistor (MOSFET) is located between the storage region 1 and the vertical signal line 2, and controls the movement of signal charges from the storage region 1 to the vertical signal line. These vertical switches 3 are driven by a vertical shift register 4. An embedded charge coupled device 5 is provided corresponding to one end of the vertical signal line 2 . As the horizontal charge transfer device, a buried charge coupled device (BCCD), a surface charge coupled device (SCCD), or a bucket brigade device (BBD) can be used. BCCD is suitable because it has good signal charge transfer efficiency. At least one transfer stage of the embedded charge coupled device 5 corresponds to one vertical signal line. Between the vertical signal line 2 and the embedded charge-coupled device 5, there is a connection between the vertical signal line 2 and the embedded charge-coupled device 5.
A horizontal switch 6 is provided to control the movement of signal charges to. This horizontal switch 6 is composed of one or more MOSFETs. Figure 1 shows the case where one MOSFET is used. One end of the embedded charge-coupled device 5 is connected to an output device 7
It is connected to the.

第1図に示した2次元固体撮像装置は、蓄積領
域1に蓄積された入射光による信号電荷を、垂直
スイツチ3を介して垂直信号線2に移し、これを
水平スイツチ6を介して埋め込み型電荷結合装置
5へ転送し、さらに埋め込み型電荷結合装置5の
転送によつて出力装置7に送り、出力信号として
取り出すという撮像動作を行なう。
The two-dimensional solid-state imaging device shown in FIG. An imaging operation is performed in which the signal is transferred to the charge-coupled device 5, and further sent to the output device 7 by transfer from the embedded charge-coupled device 5, and taken out as an output signal.

しかし垂直信号線2の容量は5pF程度であり非
常に大きいために、垂直信号線2より埋め込み型
電荷結合装置5への信号電荷の転送の転送効率は
よくない。入射光が小さく信号電荷が小さいとき
は特に転送効率が悪く、再生画面上では垂直方向
に絵が流れ見苦しくなるという欠点があつた。ま
た転送効率を高めるために、バイアス光を利用す
る試みがあるが、各蓄積領域にバイアス光を一様
に照射することが困難であるという欠点があつ
た。
However, since the capacitance of the vertical signal line 2 is about 5 pF, which is very large, the transfer efficiency of signal charges from the vertical signal line 2 to the embedded charge-coupled device 5 is not good. The transfer efficiency was particularly poor when the incident light was small and the signal charge was small, and the picture on the playback screen ran vertically, making it unsightly. In addition, attempts have been made to utilize bias light in order to improve transfer efficiency, but this method has the disadvantage that it is difficult to uniformly irradiate each storage region with bias light.

この発明の目的は上記のような欠点を除去し、
良好な再生画像を得ることができる2次元固体撮
装置の駆動方法を提供することにある。
The purpose of this invention is to eliminate the above-mentioned drawbacks,
An object of the present invention is to provide a method for driving a two-dimensional solid-state imaging device that can obtain good reproduced images.

この発明によれば入射光による信号電荷を蓄積
する複数列に多数個配列された蓄積領域と、この
蓄積領域の列に対応して設けられた垂直信号線
と、前記蓄積領域と前記垂直信号線との間に設け
られた垂直スイツチと、前記垂直信号線の一方の
端部に対応して設けられた電荷読み出しのための
埋め込み型水平電荷結合装置と、前記垂直信号線
と埋め込み型水平電荷結合装置との間に設けられ
た水平スイツチと、前記垂直信号線の他方の端部
に対応してバイアス電荷を注入するための表面型
水平電荷結合装置とを有する2次元固体撮像装置
の駆動方法であつて水平帰線期間に前記表面型水
平電荷結合装置のチヤンネル電位を前記垂直信号
線の電位より浅くし、前記表面型水平電荷結合装
置に貯えられたバイアス電荷を前記垂直信号線に
完全転送し、さらに、前記蓄積領域から前記垂直
信号線に移された信号電荷と前記バイアス電荷と
を前記垂直信号線より前記埋め込み型水平電荷結
合装置へ転送することを特徴とする2次元固体撮
像装置の駆動方法が得られる。
According to the present invention, a large number of accumulation regions are arranged in a plurality of columns for accumulating signal charges caused by incident light, a vertical signal line is provided corresponding to the column of the accumulation region, and the accumulation region and the vertical signal line are arranged in a plurality of columns. a vertical switch provided between the vertical signal line and the embedded horizontal charge coupling device for charge readout provided corresponding to one end of the vertical signal line; A method for driving a two-dimensional solid-state imaging device, comprising: a horizontal switch provided between the device and the vertical signal line; and a surface-type horizontal charge coupling device for injecting a bias charge corresponding to the other end of the vertical signal line. During the horizontal retrace period, the channel potential of the surface-type horizontal charge coupling device is made shallower than the potential of the vertical signal line, and the bias charge stored in the surface-type horizontal charge coupling device is completely transferred to the vertical signal line. Driving a two-dimensional solid-state imaging device, further comprising transferring the signal charge transferred from the accumulation region to the vertical signal line and the bias charge from the vertical signal line to the embedded horizontal charge coupling device. method is obtained.

以下この発明の実施例を図面に基いて説明す
る。第2図はこの発明の一実施例による2次元固
体撮像装置の模式的平面図である。第1図と第2
図において、同一記号は同一構成要素を示す。こ
の装置では、垂直信号線2の他方の端部に対応し
てバイアス電荷を垂直信号線2へ注入するための
表面型水平電荷結合装置8が設けられている。1
本の垂直信号線に対して水平電荷結合装置8の少
なくとも1転送段以上の転送段が対応している。
この実施例では1転送段が対応している。表面型
電荷結合装置8の一方の端部には入力装置9が設
けられており、バイアス電荷を表面型電荷結合装
置8へ注入する。垂直信号線2と表面型電荷結合
装置8との間には、表面型電荷結合装置8から垂
直信号線2へのバイアス電荷の転送を制御するト
ランスフアゲート10が設けられている。この2
次元固体撮像装置では入力装置9より表面型電荷
結合装置8へ一定量のバイアス電荷が注入され
る。信号電荷が埋め込み型電荷結合装置5によつ
て転送されていときに、この動作に同期して、バ
イアス電荷は表面型電荷結合装置8によつて転送
される。1本の水平走査線に対応する信号電荷が
すべて埋め込み型電荷結合装置5によつて出力装
置7へ転送されたとき、すべての垂直信号線2に
対応する表面型電荷結合装置8の転送段に一定量
のバイアス電荷が蓄積されている。水平帰線期間
では、このバイアス電荷がトランスフアゲート1
0を介して垂直信号線2へ転送される。この転送
は完全転送であり、表面型電荷結合装置8の各転
送段は完全に空乏化する。さらに蓄積領域1に蓄
積された入射光による信号電荷は垂直スイツチ3
を介して垂直信号線2に移され、この信号電荷と
バイアス電荷とは水平スイツチ6を介して埋め込
み型電荷結合装置5へ移される。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a schematic plan view of a two-dimensional solid-state imaging device according to an embodiment of the present invention. Figures 1 and 2
In the figures, the same symbols indicate the same components. In this device, a surface type horizontal charge coupling device 8 for injecting bias charges into the vertical signal line 2 is provided corresponding to the other end of the vertical signal line 2 . 1
At least one transfer stage of the horizontal charge coupling device 8 corresponds to the vertical signal line of the book.
In this embodiment, one transfer stage corresponds. An input device 9 is provided at one end of the surface charge coupled device 8 for injecting a bias charge into the surface charge coupled device 8. A transfer gate 10 is provided between the vertical signal line 2 and the surface-type charge-coupled device 8 to control the transfer of bias charges from the surface-type charge-coupled device 8 to the vertical signal line 2 . This 2
In the dimensional solid-state imaging device, a certain amount of bias charge is injected from the input device 9 into the surface-type charge-coupled device 8 . While signal charges are being transferred by the embedded charge coupled device 5, bias charges are transferred by the surface charge coupled device 8 in synchronization with this operation. When all the signal charges corresponding to one horizontal scanning line are transferred to the output device 7 by the embedded charge coupling device 5, the signal charges are transferred to the transfer stage of the surface charge coupling device 8 corresponding to all the vertical signal lines 2. A certain amount of bias charge is stored. During the horizontal retrace period, this bias charge is transferred to transfer gate 1.
0 to the vertical signal line 2. This transfer is a complete transfer, and each transfer stage of the surface charge coupled device 8 is completely depleted. Furthermore, the signal charge due to the incident light accumulated in the accumulation region 1 is transferred to the vertical switch 3.
The signal charges and bias charges are transferred to the embedded charge coupling device 5 via the horizontal switch 6.

この発明による実施例では、1つの入力部9よ
り一定量のバイアス電荷が表面型電荷結合装置8
へ注入され、このバイアス電荷が表面型電荷結合
装置8の各転送段より対応する垂直信号線2へ完
全転送されるために、各垂直信号線2へ転送され
たバイアス電荷量のばらつきは非常に小さい。
In an embodiment according to the invention, a certain amount of bias charge is supplied from one input section 9 to the surface charge coupled device 8.
Since this bias charge is completely transferred from each transfer stage of the surface-type charge coupled device 8 to the corresponding vertical signal line 2, the variation in the amount of bias charge transferred to each vertical signal line 2 is very large. small.

上記したこの発明の実施例では信号電荷よりも
先にバイアス電荷を垂直信号線に転送したが逆の
順序でもよい。
In the embodiment of the present invention described above, the bias charge is transferred to the vertical signal line before the signal charge, but the reverse order may be used.

表面型電荷結合装置8より垂直信号線2へのバ
イアス電荷の転送を完全転送にするためには、表
面型電荷結合装置8のオフレベルのチヤンネル電
位よりも垂直信号線2のバイアス電位を大きくし
なければならない。垂直信号線2のバイアス電位
を小さくするには、BCCDよりチヤンネル電位が
小さいSCCDを水平電荷結合装置として用いた方
が有利である。SCCDはBCCDに比較して転送効
率が悪いが、一定量のバイアス電荷を転送するの
であるから転送効率は関係ない。
In order to completely transfer the bias charge from the surface-type charge-coupled device 8 to the vertical signal line 2, the bias potential of the vertical signal line 2 is made larger than the off-level channel potential of the surface-type charge-coupled device 8. There must be. In order to reduce the bias potential of the vertical signal line 2, it is advantageous to use an SCCD, which has a lower channel potential than a BCCD, as a horizontal charge coupling device. SCCDs have lower transfer efficiency than BCCDs, but transfer efficiency is irrelevant because a fixed amount of bias charge is transferred.

垂直信号線より埋め込み型電荷結合装置へ信号
電荷の転送の転送効率を高めるために、呼び水転
送法が提案されている。この呼び水転送法では、
水平スイツチがMOSFET2個とコンデンサ1個
で構成されており、内部的にバイアス電荷を生成
し、吸収している。この呼び水転送法において
も、外部的にバイアス電荷を注入し信号電荷と共
に出力すると、転送効率が高まる。この発明によ
る方法を呼び水転送法と組み合わせて用いると一
層転送効率がよくなる。
In order to increase the transfer efficiency of signal charge transfer from the vertical signal line to the embedded charge coupled device, a priming transfer method has been proposed. In this priming transfer method,
The horizontal switch consists of two MOSFETs and one capacitor, and internally generates and absorbs bias charges. Also in this priming transfer method, if bias charges are externally injected and output together with signal charges, the transfer efficiency is increased. When the method according to the present invention is used in combination with the priming water transfer method, the transfer efficiency is further improved.

入射光量が大きく、蓄積領域の最大蓄積電荷量
よりも大きい量の電荷が発生すると、蓄積領域よ
り垂直信号線へ電荷が流出し、この流出電荷が他
の蓄積領域の信号電荷と混じる。再生画面上では
白い線状になつてあらわれ、画質を劣化させる。
このような現象をブルーミング現象と呼んでい
る。ブルーミング現象を防止するために、垂直信
号線に対応して電荷吸収部と、垂直信号線と電荷
吸収部との間に垂直信号線から電荷吸収部への電
荷の転送を制御するための制御ゲートを設けた2
次元固体撮像装置が提案されている。この2次元
固体撮像装置では、水平帰線期間において、垂直
信号線に流出した電荷は制御ゲートを介して電荷
吸収部へ転送され電荷吸収部に吸収させ、次に蓄
積領域より垂直信号線へ信号電荷が移され、さら
にこの信号電荷は水平スイツチを介して垂直信号
線より埋め込み型電荷結合装置へ転送される。こ
のため、流出した電荷が信号電荷に混入しないの
でブルーミング現象は防止される。このとき、流
出した電荷を垂直信号線より電荷吸収部へ転送す
るときの転送効率は高いことが望まれる。この発
明による方法によつてバイアス電荷を用い、高い
転送効率を実現することができる。なお、電荷吸
収部と制御ゲートとを埋め込み型電荷結合装置に
隣接しかつ水平スイツチの反対側に設け、流出し
た電荷を水平スイツチと埋め込み型電荷結合装置
の1転送段と制御ゲートとを介して垂直信号線よ
り電荷吸収部へ転送するという2次元固体撮像装
置にももちろん適用できる。
When the amount of incident light is large and a charge larger than the maximum amount of accumulated charge in the accumulation region is generated, the charge flows out from the accumulation region to the vertical signal line, and this outflow charge is mixed with signal charges in other accumulation regions. It appears as a white line on the playback screen and deteriorates the image quality.
This phenomenon is called blooming phenomenon. In order to prevent the blooming phenomenon, a charge absorption part is provided corresponding to the vertical signal line, and a control gate is provided between the vertical signal line and the charge absorption part to control the transfer of charge from the vertical signal line to the charge absorption part. 2
A dimensional solid-state imaging device has been proposed. In this two-dimensional solid-state imaging device, during the horizontal retrace period, the charge flowing out to the vertical signal line is transferred to the charge absorption section via the control gate and absorbed by the charge absorption section, and then the signal is sent from the storage region to the vertical signal line. Charge is transferred and the signal charge is transferred from the vertical signal line to the embedded charge coupled device via the horizontal switch. Therefore, the blooming phenomenon is prevented because the leaked charges are not mixed into the signal charges. At this time, it is desired that the transfer efficiency is high when transferring the leaked charges from the vertical signal line to the charge absorption section. The method according to the present invention allows high transfer efficiency to be achieved using bias charges. Note that the charge absorption section and the control gate are provided adjacent to the embedded charge-coupled device and on the opposite side of the horizontal switch, and the charge that flows out is transferred through the horizontal switch, one transfer stage of the embedded charge-coupled device, and the control gate. Of course, it can also be applied to a two-dimensional solid-state imaging device in which charge is transferred from a vertical signal line to a charge absorption section.

垂直信号線より電荷吸収部への流出電荷の転送
と、垂直信号線より埋め込み型電荷結合装置への
信号電荷の転送との両方の転送においてバイアス
電荷が必要な場合がある。このように1回の水平
帰線期間において複数回バイアス電荷が必要なと
きは、1本の垂直信号線に対して表面型電荷結合
装置の複数転送段を対応させればよい。または、
表面型電荷結合装置を複数本設ければよい。
A bias charge may be necessary for both the transfer of outflow charge from the vertical signal line to the charge absorption section and the transfer of signal charge from the vertical signal line to the embedded charge-coupled device. In this way, when bias charges are required multiple times in one horizontal retrace period, multiple transfer stages of the surface-type charge coupling device may be associated with one vertical signal line. or
A plurality of surface charge coupled devices may be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の2次元固体撮像装置の模式的平
面図、第2図はこの発明の一実施例による2次元
固体撮像装置の模式的平面図である。 1……蓄積領域、2……垂直信号線、3……垂
直スイツチ、5……埋め込み型電荷結合装置、6
……水平スイツチ、8……表面型電荷結合装置。
FIG. 1 is a schematic plan view of a conventional two-dimensional solid-state imaging device, and FIG. 2 is a schematic plan view of a two-dimensional solid-state imaging device according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Storage region, 2...Vertical signal line, 3...Vertical switch, 5...Embedded charge coupled device, 6
...Horizontal switch, 8...Surface type charge coupled device.

Claims (1)

【特許請求の範囲】[Claims] 1 入射光による信号電荷を蓄積する複数列に多
数個配列された蓄積領域と、この蓄積領域の列に
対応して設けられた垂直信号線と、前記蓄積領域
と前記垂直信号線との間に設けられた垂直スイツ
チと、前記垂直信号線の一方の端部に対応して設
けられた電荷読み出しのための埋め込み型水平電
荷結合装置と、前記垂直信号線と埋め込み型水平
電荷結合装置との間に設けられた水平スイツチ
と、前記垂直信号線の他方の端部に対応してバイ
アス電荷を注入するための表面型水平電荷結合装
置とを有する2次元固体撮像装置の駆動方法であ
つて、水平帰線期間に前記表面型水平電荷結合装
置のチヤネル電位を前記垂直信号線の電位より浅
くし、前記表面型水平電荷結合装置に貯えられた
バイアス電荷を前記垂直信号線に完全転送し、さ
らに、前記蓄積領域から前記垂直信号線に移され
た信号電荷と前記バイアス電荷とを前記垂直信号
線より前記埋め込み型水平電荷結合装置へ転送す
ることを特徴とする2次元固体撮像装置の駆動方
法。
1. A large number of accumulation regions arranged in multiple columns for accumulating signal charges caused by incident light, vertical signal lines provided corresponding to the columns of the accumulation regions, and between the accumulation regions and the vertical signal lines. a vertical switch provided, an embedded horizontal charge coupling device for reading charge provided corresponding to one end of the vertical signal line, and between the vertical signal line and the embedded horizontal charge coupling device; A method for driving a two-dimensional solid-state imaging device comprising: a horizontal switch provided at the horizontal switch; and a surface-type horizontal charge coupling device for injecting a bias charge corresponding to the other end of the vertical signal line, the method comprising: During the retrace period, the channel potential of the surface-type horizontal charge-coupled device is made shallower than the potential of the vertical signal line, and the bias charge stored in the surface-type horizontal charge-coupled device is completely transferred to the vertical signal line, and further, A method for driving a two-dimensional solid-state imaging device, characterized in that the signal charge and the bias charge transferred from the accumulation region to the vertical signal line are transferred from the vertical signal line to the embedded horizontal charge coupling device.
JP55155350A 1980-11-05 1980-11-05 Secondary dimension solid-state image sensor and its drive method Granted JPS5779774A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55155350A JPS5779774A (en) 1980-11-05 1980-11-05 Secondary dimension solid-state image sensor and its drive method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55155350A JPS5779774A (en) 1980-11-05 1980-11-05 Secondary dimension solid-state image sensor and its drive method

Publications (2)

Publication Number Publication Date
JPS5779774A JPS5779774A (en) 1982-05-19
JPH0219675B2 true JPH0219675B2 (en) 1990-05-02

Family

ID=15603966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55155350A Granted JPS5779774A (en) 1980-11-05 1980-11-05 Secondary dimension solid-state image sensor and its drive method

Country Status (1)

Country Link
JP (1) JPS5779774A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2554955B1 (en) * 1983-11-10 1989-05-26 Thomson Csf MULTILINEAR LOAD TRANSFER

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5739173B2 (en) * 1975-07-31 1982-08-19

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5678364U (en) * 1979-11-14 1981-06-25
JPS5739173U (en) * 1980-08-13 1982-03-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5739173B2 (en) * 1975-07-31 1982-08-19

Also Published As

Publication number Publication date
JPS5779774A (en) 1982-05-19

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