JPH02191353A - Inspection of semiconductor substrate - Google Patents

Inspection of semiconductor substrate

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Publication number
JPH02191353A
JPH02191353A JP1010901A JP1090189A JPH02191353A JP H02191353 A JPH02191353 A JP H02191353A JP 1010901 A JP1010901 A JP 1010901A JP 1090189 A JP1090189 A JP 1090189A JP H02191353 A JPH02191353 A JP H02191353A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
silicon semiconductor
infrared rays
bonded
void
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1010901A
Other languages
Japanese (ja)
Inventor
Tadahide Hoshi
星 忠秀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1010901A priority Critical patent/JPH02191353A/en
Publication of JPH02191353A publication Critical patent/JPH02191353A/en
Pending legal-status Critical Current

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  • Investigating Or Analysing Materials By Optical Means (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

PURPOSE:To detect a void formed in an adhesive bond with ease by irradiating a bond surface of a semiconductor substrate which is yielded by bonding semiconductor substrates or by doing the same through an oxide layer with specific wavelength infrared rays. CONSTITUTION:Any void of a bonded silicon semiconductor substrate 4 is inspected by irradiation thereof with 2.0mum or less infrared rays, the silicon semiconductor substrate portion 4 is displaced substantially as a black image on a monitor of a video device 10. On the contrary, the void 11 is displaced on the monitor as a black interference fringe, and hence it is clearly detachable. Thus, the yield of void detection in a silicon semiconductor substrate bonded surface is sharply improved and yields of a dicing process and a polishing process as manufacturing processes thereafter are also increased.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、半導体基板の検査方法に関するもので、特に
、相対向して配置した半導体基板同士あるいは、半導体
基板の一方もしくは双方に酸化膜を形成後、この酸化膜
に形成する鏡面同士もしくは酸化膜に形成した鏡面と半
導体基板表面に形成した鏡面を接着して得られる接着半
導体基板の検査に好適する。
[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a method for inspecting semiconductor substrates, and in particular, the present invention relates to a method for inspecting semiconductor substrates, and in particular, the present invention relates to a method for inspecting semiconductor substrates that are arranged facing each other, or one or more of the semiconductor substrates. This method is suitable for inspecting a bonded semiconductor substrate obtained by forming an oxide film on both sides and then bonding mirror surfaces formed on the oxide films or a mirror surface formed on the oxide film and a mirror surface formed on the surface of the semiconductor substrate.

(従来の技術) 単結晶からなるシリコン半導体基板表面を研磨して得ら
れる鏡面を清浄な雰囲気内で密着して熱処理することに
より接告され、あたかも−枚の半導体基板として振舞え
るような機械的強度が得られ、更に、この接着面は、形
成されるPN接合に電気的悪影響を与えないことが確認
されている。従って、接着半導体基板に不純物を導入し
て能動素子または受動素子を形成した半導体装置が開発
され、実用化の段階に入っている。
(Prior art) A mirror surface obtained by polishing the surface of a single-crystal silicon semiconductor substrate is brought into close contact with the surface in a clean atmosphere and heat-treated. Strength is obtained, and furthermore, it has been determined that this bonding surface does not have any negative electrical effects on the PN junction that is formed. Therefore, a semiconductor device in which an active element or a passive element is formed by introducing impurities into a bonded semiconductor substrate has been developed and is now in the stage of practical use.

接着半導体基板としては、シリコン半導体基板同士の他
に、その表面に被覆した酸化物層同士、酸化物層とシリ
コン半導体基板更に、シリコン半半導体基板とそこに形
成したポリシリコン層更にまた、ポリシリコン層同士の
接着構造が知られている。
Bonded semiconductor substrates include not only silicon semiconductor substrates, but also oxide layers coated on their surfaces, oxide layers and silicon semiconductor substrates, silicon semi-semiconductor substrates and polysilicon layers formed thereon, and polysilicon substrates. Adhesive structures between layers are known.

このような組合わせのシリコン半導体基板を前記処理工
程により形成する接着面にゴミなどが付着すると、未接
着部分即ちボイド(Void)が形成され、半導体素子
の電気的特性が不良になる他、半導体素子に必要なダイ
シング(Dlcing)工程や研磨工程、更に他の製造
工程で割れなど、が発生する原因となる。このために、
接着シリコン半導体基板はボイドの検査工程を経てから
、半導体素子の製造工程に移行している。
If dust or the like adheres to the adhesive surface formed by such a combination of silicon semiconductor substrates through the above processing steps, unbonded portions, or voids, will be formed, which will not only deteriorate the electrical characteristics of the semiconductor element, but also cause the semiconductor to deteriorate. This causes cracks to occur during the dicing process, polishing process, and other manufacturing processes necessary for the device. For this,
After the bonded silicon semiconductor substrate passes through a void inspection process, it is transferred to the semiconductor element manufacturing process.

5L−8IO(X−0<X≦2)−8tまたは5t−8
l構造の接着シリコン半導体基板の検査工程は、波長2
.0μm〜5.6μmの赤外線を照射して透過赤外線強
度を測定する方法が採られており、ボイド発生により生
ずる空隙では入射赤外線が反射して透過しないことにな
る。
5L-8IO (X-0<X≦2)-8t or 5t-8
The inspection process for bonded silicon semiconductor substrates with a structure of
.. A method is adopted in which the intensity of transmitted infrared rays is measured by irradiating infrared rays with a wavelength of 0 μm to 5.6 μm, and the incident infrared rays are reflected in the voids created by voids and are not transmitted.

第4図は、接着シリコン半導体基板の赤外線透過率を縦
軸に、横軸に赤外線波長(μm)を採り、両者の関係を
示した曲線図が明らかにされている。
FIG. 4 is a curve diagram showing the relationship between the infrared transmittance of the bonded silicon semiconductor substrate and the infrared wavelength (μm) on the horizontal axis and the vertical axis, respectively.

一方、波長2.0μm〜5.6μmの赤外線による5i
−8iO(X−0<X≦2)−8tまたは5i−st構
造接着面からなる接着シリコン半導体基板の検査装置は
、接着シリコン半導体基板を挟んで赤外線を放射するハ
ロゲン光源及びモニターを備えたカメラ機構により構成
する。
On the other hand, 5i by infrared rays with a wavelength of 2.0 μm to 5.6 μm
-8iO (X-0 < It consists of a mechanism.

この検査装置の概略を第8図及び第9図により説明する
。第8図は、ハロゲンランプなどの光源50から放射す
る赤外線平行光線を?Ii測定接着シリコン半導体基板
51に照射する方式を備えており、第9図では、単に赤
外線を利用する型の検査装置である。
The outline of this inspection device will be explained with reference to FIGS. 8 and 9. Figure 8 shows parallel infrared rays emitted from a light source 50 such as a halogen lamp. It is equipped with a method of irradiating the Ii measurement adhesive silicon semiconductor substrate 51, and in FIG. 9, it is a type of inspection device that simply uses infrared rays.

赤外線平行光線を利用する第8図では、ハロゲンランプ
などの光源50に続いてフィルター52、反射ミラー5
3及び凸面鏡54を設置して接着シリコン半導体基板5
1の接着面を調査する。
In FIG. 8, which uses parallel infrared rays, a light source 50 such as a halogen lamp is followed by a filter 52 and a reflecting mirror 5.
3 and a convex mirror 54 are installed to bond the silicon semiconductor substrate 5.
Investigate the adhesive surface of No.1.

これに対して、wi9図の検査装置では、ハロゲンラン
プなどの光源50から放射する赤外線を凸面鏡54を介
して被測定接着シリコン半導体基板51に入射する方式
が採用されている。両装置とも被測定接着シリコン半導
体基板5Iに対応するように、支柱55に撮像管5Bが
上下自在に取付けられると共に、撮像管56に直結した
モニター57を設置する。
On the other hand, the inspection apparatus shown in FIG. wi9 employs a method in which infrared rays emitted from a light source 50 such as a halogen lamp are incident on a bonded silicon semiconductor substrate 51 to be measured via a convex mirror 54. In both apparatuses, an image pickup tube 5B is attached to a column 55 so as to be vertically movable, and a monitor 57 directly connected to the image pickup tube 56 is installed so as to correspond to the bonded silicon semiconductor substrate 5I to be measured.

この再検査装置の結果即ちボイドの有無は、後段のダイ
シング工程における情報として利用される。
The result of this re-inspection device, that is, the presence or absence of voids, is used as information in the subsequent dicing process.

(発明が解決しようとする課題) 前記透過赤外線強度の測定方法は、特許協会公開技報8
5−8424号により公知事項であるが、第4図の曲線
図に示したように、5t−SLOx(0<X≦2)−S
t構造の接着シリコン半導体基板では波長2.0μm〜
5.6μmの赤外線がボイドを照射すると反射して減衰
する。検査装置のカメラによる接合面撮影像がモニター
に写されると、シリコン半導体基板は白つぼく写るのに
対して、ボイドも同様に白っぽく写されて、干渉縞が判
別できない場合もある。
(Problem to be solved by the invention) The method for measuring the intensity of transmitted infrared rays is described in Patent Association Publication Technical Report 8.
5-8424, as shown in the curve diagram in FIG. 4, 5t-SLOx (0<X≦2)-S
For a bonded silicon semiconductor substrate with a t structure, the wavelength is 2.0 μm ~
When 5.6 μm infrared light irradiates a void, it is reflected and attenuated. When an image of the bonded surface taken by the inspection device's camera is displayed on a monitor, the silicon semiconductor substrate appears white, but voids also appear whitish, and interference fringes may not be discernible.

このように、ボイド検査は、グイシング工程用の情報と
して確実でないばかりか、なかなか難しかった。従って
、半導体素子製造工程や研磨工程で割れ不良やカケ不良
が発生したり、更には、接着ウェー八を使用した半導体
素子の電気的特性が悪くなるなどの問題があつた。
As described above, void inspection is not only inaccurate as information for the guising process, but also quite difficult. Therefore, there have been problems such as cracking or chipping defects occurring in the semiconductor device manufacturing process or polishing process, and furthermore, the electrical characteristics of the semiconductor device using the adhesive wafer deteriorate.

本発明はこのような事情により成されたもので、特に、
接着面にシリコン酸化物層を形成したシリコン半導体基
板の検査方法を提供することを目的とする。
The present invention was made under these circumstances, and in particular,
An object of the present invention is to provide a method for inspecting a silicon semiconductor substrate having a silicon oxide layer formed on an adhesive surface.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 半導体基板同士または酸化物層を介して接着した半導体
基板の接着面を、光源から発生する2、0μm未満の赤
外線の透過強度を測定することに本発明の特徴がある。
(Means for Solving the Problems) A feature of the present invention is that the transmitted intensity of infrared rays of less than 2.0 μm generated from a light source is measured on the adhesive surface of semiconductor substrates that are adhered to each other or through an oxide layer. There is.

(作 用) 第4図から明らかなように、シリコン半導体基板接着面
に形成したシリコン酸化物層を波長が2.0μm未満の
赤外線で照射した場合、例えボイドが存在していても赤
外線透過率には変化がないことが判明したし、シリコン
半導体基板同士でも同様な結果が得られることは明らか
である。
(Function) As is clear from Figure 4, when the silicon oxide layer formed on the adhesive surface of the silicon semiconductor substrate is irradiated with infrared rays with a wavelength of less than 2.0 μm, even if voids exist, the infrared transmittance decreases. It has been found that there is no change in , and it is clear that similar results can be obtained between silicon semiconductor substrates.

この現象を利用して接着シリコン半導体基板のボイドを
、2.0μm未満の赤外線を照射して検査すると、映像
装置のモニターにシリコン半導体基板部分がほぼ黒い映
像として写る。
When this phenomenon is utilized to inspect voids in a bonded silicon semiconductor substrate by irradiating it with infrared rays of less than 2.0 μm, the silicon semiconductor substrate portion appears as a nearly black image on the monitor of the imaging device.

これに対してボイドは、黒い干渉縞としてモニターに写
るので、はっきりと検出可能となった。
In contrast, voids appear on the monitor as black interference fringes, making them clearly detectable.

従って、シリコン半導体基板接着面のボイド検出歩留り
は大幅に向上して、以後の製造工程であるダイシング工
程や研磨工程の歩留りも増大する結果となる。
Therefore, the yield of detecting voids on the bonding surface of the silicon semiconductor substrate is greatly improved, and the yield of subsequent manufacturing steps such as dicing and polishing steps also increases.

ところでシリコン半導体基板の接着工程により生成され
る接着層は、シリコン半導体基板を構成するバルク(B
ulk)の組織と多少異なる組織からなる酸化物層やシ
リコン層により形成される。この接着層に形成されるボ
イド検出に、波長2.0μm未満の透過赤外線強度が減
衰されない理由は判然としない。
By the way, the adhesive layer produced in the silicon semiconductor substrate bonding process is the bulk (B) that constitutes the silicon semiconductor substrate.
It is formed from an oxide layer or a silicon layer having a structure that is somewhat different from that of Ulk). It is not clear why the intensity of transmitted infrared rays with a wavelength of less than 2.0 μm is not attenuated when detecting voids formed in this adhesive layer.

(実施例) 第1図乃至第7図を参照して本発明に係わる実施例を説
明する。
(Example) An example according to the present invention will be described with reference to FIGS. 1 to 7.

(1)抵抗比9〜12Ω・備、厚さ525μmで表面を
研磨して鏡面を形成したP型シリコン半導体基板100
枚用意した後、1100℃に維持したH210 雰囲気
内に100分間保持して、7000Åの熱酸化膜を鏡面
に形成する。
(1) P-type silicon semiconductor substrate 100 with a resistance ratio of 9 to 12 Ω, a thickness of 525 μm, and a mirror-polished surface
After preparing the sheet, it is kept in an H210 atmosphere maintained at 1100° C. for 100 minutes to form a thermal oxide film of 7000 Å on a mirror surface.

清浄度としては例えばクラスlO程度に保持した清浄な
部屋に配置した熱酸化物層を被覆したP型シリコン半導
体基板に、他のP (N)型シリコン半導体基板表面に
被覆した熱酸化物層を対向密着保持する。このまま加熱
処理すると第1図に示すように、5L−SLO(0<X
<2)/SLの構造からなる被検査接着シリコン半導体
基板4・・・50枚が得られる。
In terms of cleanliness, for example, a P-type silicon semiconductor substrate coated with a thermal oxide layer placed in a clean room maintained at about class 1O, and a thermal oxide layer coated on the surface of another P (N)-type silicon semiconductor substrate are placed in a clean room maintained at about class 1O. Hold the two in close contact with each other. If heat treatment is performed as it is, 5L-SLO (0<X
<2) Fifty bonded silicon semiconductor substrates 4 to be inspected having a structure of /SL are obtained.

このようにして形成した披検査接着シリコン半導体基板
4は、第2図に示した測定装置に配置する。測定装置は
、ハロゲン電球からなる光源5から放射する赤外線6を
2.0μm以上の波長にカット(Cut)するために、
設置したバンドパスフィルター7を通過させて波長2.
0μm以上の赤外線8・・・をカット後、被検査接着シ
リコン半導体基板4を照射して波長2.0μm未満の赤
外線9・・・透過強度を測定する。
The bonded silicon semiconductor substrate 4 thus formed is placed in the measuring apparatus shown in FIG. The measuring device cuts infrared rays 6 emitted from a light source 5 made of a halogen bulb to a wavelength of 2.0 μm or more.
Wavelength 2. is passed through the installed band pass filter 7.
After cutting off the infrared rays 8 with a wavelength of 0 μm or more, the bonded silicon semiconductor substrate 4 to be inspected is irradiated and the transmitted intensity of the infrared rays 9 with a wavelength of less than 2.0 μm is measured.

測定装置としては、第8図及び第9図に示したものが一
般的に使用されるが、第2図のシステム構成図により説
明する。即ち、この外に被検査接着シリコン半導体基板
4から50cm −100cm離れた位置に撮影用カメ
ラと映像を写すモニターを備えた映像装置10を設置し
、このモニターの映像から判断したボイドは、後のダイ
シング工程や研磨工程の情報として利用する。
As the measuring device, those shown in FIGS. 8 and 9 are generally used, but the system configuration diagram shown in FIG. 2 will be used for explanation. That is, an imaging device 10 equipped with a camera for photographing and a monitor for displaying images is installed at a distance of 50 cm to 100 cm from the bonded silicon semiconductor substrate 4 to be inspected, and the voids determined from the images on this monitor are determined as follows. It is used as information for the dicing process and polishing process.

即ち、ボイドが存在するダイシングラインに対してはダ
イシング工程を止めて不良の発生による歩留り低下を防
止する。
That is, the dicing process is stopped for dicing lines where voids exist to prevent a decrease in yield due to the occurrence of defects.

被検査接着シリコン半導体基板4にボイドが存在した場
合のモニターの映像を、第3図すに示した。即ち、前記
したようにボイドを照射した波長2.0μm未満の赤外
線9・・・透過率は、減衰せずにモニターに干渉縞11
として写しだされており、空隙ができている部分でも容
易にかつ確実に検出される。
FIG. 3 shows a monitor image when a void exists in the bonded silicon semiconductor substrate 4 to be inspected. That is, as described above, the infrared rays 9 with a wavelength of less than 2.0 μm that irradiated the void...the transmittance is not attenuated and the interference fringes 11 appear on the monitor.
, and even areas with gaps can be easily and reliably detected.

これに対して第3図aは、バンドパスフィルター7を設
置しない従来方法によって波長2.0μm以上の赤外線
9・・・が透過した第3図す用試料のモニター映像を示
したが、干渉縞は全く写っておらず、接合面全面が接着
されている状態のように判断される。
On the other hand, Fig. 3a shows a monitor image of the sample shown in Fig. 3, through which infrared rays 9 with a wavelength of 2.0 μm or more are transmitted by the conventional method without installing the bandpass filter 7. is not shown at all, and it is judged that the entire bonding surface is glued.

また、ボイド検査を終えた被検査接着シリコン半導体基
板50枚は、前記ダイシング工程を施してから0.5關
角にダイシングする破壊との対応性を調査し、その結果
を第5図に示した。この図は、破壊検査により確認され
たボイド検出率を従来例と本発明で比較したもので、本
発明方法の検出率約90%に対して従来例では僅か10
%に過ぎなく、本発明の有効性から明らかである。
In addition, the 50 bonded silicon semiconductor substrates to be inspected that had undergone the void inspection were subjected to the dicing process, and then their compatibility with the fracture caused by dicing into 0.5 squares was investigated, and the results are shown in Figure 5. . This figure compares the detection rate of voids confirmed by destructive inspection between the conventional method and the present invention.The detection rate of the method of the present invention is about 90%, while the detection rate of the conventional method is only 10%.
%, which is clear from the effectiveness of the present invention.

この検査装置には、第8図及び第9図のものを利用する
For this inspection device, those shown in FIGS. 8 and 9 are used.

(2)第2実施例としては、シリコン半導体基板表面に
形成した酸化物層に対して、他のシリコン半導体基板を
接着する例を示す。両シリコン半導体基板は、比抵抗9
〜12Ω・(2)、厚さ525μmのPまたはN導電型
を示すシリコン半導体基板表面を用意する。
(2) As a second embodiment, an example will be shown in which another silicon semiconductor substrate is bonded to an oxide layer formed on the surface of the silicon semiconductor substrate. Both silicon semiconductor substrates have a specific resistance of 9
A surface of a silicon semiconductor substrate exhibiting P or N conductivity type and having a thickness of 12Ω·(2) and a thickness of 525 μm is prepared.

その中の50枚は、1100℃に維持した清浄なH21
0□雰囲気内にioo分間保持して、70GOAの熱酸
化膜を形成する。夫々から取出した一対を前記の方法及
び条件で接着する。
50 of them were clean H21 sheets maintained at 1100℃.
A thermal oxide film of 70 GOA is formed by holding the film in an atmosphere of 0□ for ioo minutes. A pair taken out from each is adhered using the method and conditions described above.

即ち、酸化物層を介して半導体基板が接着した接着シリ
コン半導体基板には、ボイド検出工程を施してボイド有
無を調べたところ、第1実施例と同様な結果が得られた
ので詳細を割愛する。また、この接着シリコン半導体基
板の接着面のボイドの検査には、第8図乃至第9図に示
した装置を利用する。
That is, when a bonded silicon semiconductor substrate to which a semiconductor substrate was bonded via an oxide layer was subjected to a void detection process to check for the presence or absence of voids, the same results as in the first example were obtained, so the details will be omitted. . Further, the apparatus shown in FIGS. 8 and 9 is used to inspect the voids on the bonding surface of the bonded silicon semiconductor substrate.

(3)第3実施例は、シリコン半導体基板同士を接着後
、その接着面を調査する例である。即ち、両シリコン半
導体基板としては、第2実施例と同じく比抵抗9〜12
Ω・(至)、厚さ525μmのPまたはN導1!i型を
示すシリコン半導体基板表面を用意し、この表面に鏡面
を形成後、接着する。この接着シリコン半導体基板の接
着面のボイドの検査には、第8図及び第9図に示した装
置を利用する。
(3) The third embodiment is an example in which silicon semiconductor substrates are bonded together and then the bonded surface is investigated. That is, both silicon semiconductor substrates have a specific resistance of 9 to 12 as in the second embodiment.
Ω・(to), 525 μm thick P or N conductor 1! A silicon semiconductor substrate surface exhibiting an i-type is prepared, a mirror surface is formed on this surface, and then bonded. The apparatus shown in FIGS. 8 and 9 is used to inspect the bonding surface of this bonded silicon semiconductor substrate for voids.

なお、この接着シリコン半導体基板は、第1と第2実施
例と同様に2μm未満の波長に赤外線により測定できる
ので、従来のように夫々波長の異なる赤外線を使わなく
てすむために作業性が向上する利点がある。
Note that this bonded silicon semiconductor substrate can be measured with infrared rays at wavelengths of less than 2 μm, as in the first and second embodiments, so work efficiency is improved because there is no need to use infrared rays with different wavelengths as in the past. There are advantages.

〔発明の効果〕〔Effect of the invention〕

本発明では、酸化物層を介在した接着シリコン半導体基
板のボイド検出精度が従来方法に比べてかなり向上した
In the present invention, the accuracy of detecting voids in a bonded silicon semiconductor substrate with an oxide layer interposed therebetween is considerably improved compared to conventional methods.

ボイド検査後の研磨工程及び不純物を導入して能動また
は受動素子などを形成する半導体素子製造工程で発生す
る割れ及びカケ不良の発生率を第6図に示した。更に、
前記ボイド検査工程を終えた接着シリコン半導体基板を
用いて製造する半導体素子の製造9歩留りを第7図に明
らかにした。
FIG. 6 shows the incidence of cracking and chipping defects that occur in the polishing process after void inspection and in the semiconductor device manufacturing process in which active or passive devices are formed by introducing impurities. Furthermore,
FIG. 7 shows the manufacturing yield of semiconductor devices manufactured using the bonded silicon semiconductor substrate that has undergone the void inspection process.

即ち、割れなどの発生率は、従来の50%に対して僅か
10%以下、半導体素子の製造歩留りも、従来の20%
から80%といずれも大幅に向上している。
In other words, the occurrence rate of cracks is only 10% or less compared to 50% in the conventional case, and the manufacturing yield of semiconductor devices is also 20% of the conventional rate.
This is a significant improvement from 80% to 80%.

このように、本発明は、接着シリコン半導体素子の量産
上の効果が大きく、ひいては半導体素子の信頼性をも向
上することができる。
As described above, the present invention has a large effect on the mass production of bonded silicon semiconductor devices, and can also improve the reliability of the semiconductor devices.

接着半導体基板のボイドは、干渉縞として検出している
ために、分解能は赤外線の波長に依存するので、λ/2
で決定される。従って、従来試験方法2.0〜5.6μ
mの場合、ボイドの検出限界は1〜2.8μmであった
のに対して、本発明では、1μm未満のボイドが検出可
能になり、検出精度が向上する利点もある。
Since voids in the bonded semiconductor substrate are detected as interference fringes, the resolution depends on the wavelength of infrared rays, so λ/2
determined by Therefore, the conventional test method 2.0 to 5.6μ
In the case of m, the detection limit for voids was 1 to 2.8 μm, whereas in the present invention, voids smaller than 1 μm can be detected, which has the advantage of improving detection accuracy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、接着工程により一体となった半導体基板の断
面図、第2図は、本発明方法に利用するシステムの構成
図、第3図a、bは、ボンド検査後モニターに写った映
像図、第4図は、シリコン半導体基板を照射した赤外線
の透過率を示す図、第5図は、破埴検査で確認されたボ
イド検出率を明らかにした図、第6図はカケと割れの発
生率を、第7図は半導体素子の製造歩留りを示す図で、
第8図及び第9図は従来の検査装置の概略を示す断面図
である。 1.3;81     2:SiO 4:接着シリコン半導体基板 5:光源       6:赤外線 7:フィルタ     8:透過赤外線M1図 第  2  図 to: E央イ3≧aCt宣二 代理人 弁理士 大 胡 典 夫 第3図
Figure 1 is a cross-sectional view of the semiconductor substrate integrated through the bonding process, Figure 2 is a configuration diagram of the system used in the method of the present invention, and Figures 3a and b are images shown on the monitor after bond inspection. Figure 4 shows the transmittance of infrared rays irradiating a silicon semiconductor substrate, Figure 5 shows the detection rate of voids confirmed by demolition inspection, and Figure 6 shows chips and cracks. Figure 7 is a diagram showing the manufacturing yield of semiconductor devices.
FIGS. 8 and 9 are cross-sectional views showing the outline of a conventional inspection device. 1.3; 81 2: SiO 4: Adhesive silicon semiconductor substrate 5: Light source 6: Infrared rays 7: Filter 8: Transmitted infrared rays M1 Figure 2 Figure to: Eo I3≧aCt Noriji Senji Patent attorney Norio Ogo Figure 3

Claims (1)

【特許請求の範囲】[Claims] 半導体基板同士または酸化物層を介して接着した半導体
基板の接着面を、光源から発生する2.0μm未満赤外
線の透過強度を測定することを特徴とする半導体基板の
検査方法。
1. A method for inspecting semiconductor substrates, comprising measuring the transmitted intensity of infrared rays of less than 2.0 μm emitted from a light source through the adhesive surface of semiconductor substrates that are adhered to each other or through an oxide layer.
JP1010901A 1989-01-19 1989-01-19 Inspection of semiconductor substrate Pending JPH02191353A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1010901A JPH02191353A (en) 1989-01-19 1989-01-19 Inspection of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1010901A JPH02191353A (en) 1989-01-19 1989-01-19 Inspection of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH02191353A true JPH02191353A (en) 1990-07-27

Family

ID=11763204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1010901A Pending JPH02191353A (en) 1989-01-19 1989-01-19 Inspection of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH02191353A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199155A (en) * 2010-03-23 2011-10-06 Consortium For Advanced Semiconductor Materials & Related Technologies Device and method of determining delamination of the same
JP2018037667A (en) * 2017-10-12 2018-03-08 リンテック株式会社 Composite sheet for protection film formation and laser printing method
US10399306B2 (en) 2013-07-31 2019-09-03 Lintec Corporation Protective film forming film, sheet for forming protective film, and inspection method
CN110349877A (en) * 2019-07-12 2019-10-18 芯盟科技有限公司 Detect the method and wafer bonding board of wafer bonding intensity

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199155A (en) * 2010-03-23 2011-10-06 Consortium For Advanced Semiconductor Materials & Related Technologies Device and method of determining delamination of the same
US10399306B2 (en) 2013-07-31 2019-09-03 Lintec Corporation Protective film forming film, sheet for forming protective film, and inspection method
JP2018037667A (en) * 2017-10-12 2018-03-08 リンテック株式会社 Composite sheet for protection film formation and laser printing method
CN110349877A (en) * 2019-07-12 2019-10-18 芯盟科技有限公司 Detect the method and wafer bonding board of wafer bonding intensity

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