JPH02184770A - Measuring instrument - Google Patents

Measuring instrument

Info

Publication number
JPH02184770A
JPH02184770A JP430089A JP430089A JPH02184770A JP H02184770 A JPH02184770 A JP H02184770A JP 430089 A JP430089 A JP 430089A JP 430089 A JP430089 A JP 430089A JP H02184770 A JPH02184770 A JP H02184770A
Authority
JP
Japan
Prior art keywords
voltage
capacitor
output
circuit
circuit network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP430089A
Other languages
Japanese (ja)
Inventor
Hideaki Togawa
戸川 英明
Yuji Karasawa
唐沢 裕次
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pentax Corp
Original Assignee
Asahi Kogaku Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Kogaku Kogyo Co Ltd filed Critical Asahi Kogaku Kogyo Co Ltd
Priority to JP430089A priority Critical patent/JPH02184770A/en
Publication of JPH02184770A publication Critical patent/JPH02184770A/en
Pending legal-status Critical Current

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  • Measurement Of Resistance Or Impedance (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE:To measure easily and simultaneously the output voltage and output resistance of an optional circuit network including an electromotive force by providing a 1st, 2nd capacitors and a load resistor. CONSTITUTION:When a 1st switching contact 3a is put ON, an open voltage of the circuit network 1 is charged to the 1st capacitor 4 and this charged voltage is displayed 9 as the output voltage of the circuit network 1. When a 2nd switching contact 5a is put ON at the time the contact 3a is in the OFF state, the electromotive force of the circuit network 1 is supplied to the load resistor 6 and a voltage generated on both ends of this resistor 6 is fetched to arithmetic means together with the output voltage. The calculation is made therein for the output resistance corresponding to an inside resistance, and the output resulted from this calculation is charged to the 2nd capacitor 13 at the time the 3rd switching contact is in the ON state, then this voltage is displayed 15 as the inside resistance of the circuit network 1. The output voltage and the inside resistance for the circuit network 1 can be simultaneously measured accordingly.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、起電力を含む任意の回路網の出力電圧及び出
力抵抗(内部抵抗)を計測するための測定装置に関する
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a measuring device for measuring the output voltage and output resistance (internal resistance) of any circuit network including an electromotive force.

(従来の技術) 起電力を含む任意の回路網、例えば電池等からなる電源
回路において、その出力端子に電圧計を接続すれば、電
源回路の出力電圧を知ることができる。
(Prior Art) If a voltmeter is connected to the output terminal of any circuit network including an electromotive force, such as a power supply circuit consisting of a battery or the like, the output voltage of the power supply circuit can be determined.

とこ島で、電池等の電源回路には内部抵抗が存在するた
め、出力電圧は内部抵抗による電圧降下分だけ、電源回
路の実際の起電力より低くなる。
On the other hand, since internal resistance exists in power supply circuits such as batteries, the output voltage will be lower than the actual electromotive force of the power supply circuit by the voltage drop caused by the internal resistance.

従って、負荷が要求する出力電圧が安定して得られるよ
うに電源回路を構成するためには、電源回路の内部抵抗
(出力抵抗)を知る必要がある。
Therefore, in order to configure the power supply circuit so that the output voltage required by the load can be stably obtained, it is necessary to know the internal resistance (output resistance) of the power supply circuit.

従来、このような電源回路の内部抵抗を知る手段として
は、電源回路の開放電圧、及びその端子に既知の抵抗を
接続した時の端子間電圧等を計測器を用いて求め、その
後、これらの値からテブナンの定理を利用して計算によ
り内部抵抗(出力抵抗)を算出するようにしていた。
Conventionally, as a means of determining the internal resistance of such a power supply circuit, the open circuit voltage of the power supply circuit and the voltage between the terminals when a known resistance is connected to the terminals are determined using a measuring instrument, and then these are measured. The internal resistance (output resistance) was calculated from the value using Thevenin's theorem.

(発明が解決しようとする課題) 上述のような従来の計算により内部抵抗を求める方式で
は、電圧計などの計測器の他に電卓などの計算機が必要
となり、内部抵抗算出までの手順が複雑となって手数が
かかると共に、極めて非現実的なものとなってしまう、
従って、従来にあっては、はとんどの場合、出力電圧の
みを計測し、この出力電圧が希望する範囲にあるか否か
を判定するだけであり、内部抵抗に関してはほとんど無
視されているのが現状であった。
(Problem to be solved by the invention) The conventional method of calculating internal resistance as described above requires a calculator such as a calculator in addition to a measuring instrument such as a voltmeter, and the procedure for calculating internal resistance is complicated. This would be time-consuming and extremely unrealistic.
Therefore, in the past, in most cases, only the output voltage was measured and it was determined whether this output voltage was within the desired range, and the internal resistance was almost ignored. was the current situation.

本発明は、上記のような点に鑑みなされたもので、起電
力を含む任意の回路網の出力電圧及び出力抵抗(内部抵
抗)を同時にかつ容易に測定できる測定装置を得ること
を目的とする。
The present invention was made in view of the above points, and an object of the present invention is to obtain a measuring device that can simultaneously and easily measure the output voltage and output resistance (internal resistance) of any circuit network including electromotive force. .

(課題を解決するための手段) 上記目的を達成するため、本発明の測定装置は、起電力
を含む任意の回路網の開放電圧を所定の周期でオン−オ
フされる第1の開閉接点を介して充電する第1のコンデ
ンサと、前記第1のコンデンサに充電された電圧を前記
回路網の出力電圧として表示する表示器と、前記回路網
の出力端に前記第1の開閉接点と逆にオン−オフする第
2の開閉接点を介して接続される負荷抵抗と、前記第1
のコンデンサに充電された出力電圧及び前記負荷抵抗の
両端電圧に基づいて前記回路網の内部抵抗に相当する出
力を演算する演算手段と、前記演算手段からの出力を前
記第2の開閉接点と同期してオン−オフする第3の開閉
接点を介して充電する第2のコンデンサと、前記第2の
コンデンサに充電された電圧を前記回路網の内部抵抗と
して表示する表示器とを備えてなるものである。
(Means for Solving the Problems) In order to achieve the above object, the measuring device of the present invention has a first switching contact that is turned on and off at a predetermined cycle to measure the open circuit voltage of an arbitrary circuit including an electromotive force. a first capacitor to be charged via the first capacitor, an indicator for displaying the voltage charged in the first capacitor as the output voltage of the circuit network, and an output terminal of the circuit network opposite to the first switching contact; a load resistor connected via a second switching contact that turns on and off;
calculation means for calculating an output corresponding to the internal resistance of the circuit network based on the output voltage charged in the capacitor and the voltage across the load resistor, and synchronizing the output from the calculation means with the second switching contact. a second capacitor that is charged via a third switching contact that is turned on and off; and an indicator that displays the voltage charged in the second capacitor as an internal resistance of the circuit network. It is.

(作用) 第1の開閉接点がオンすると、回路網の開放電圧Eが第
1のコンデンサに充電され、この充電電圧は表示器によ
って回路網の出力電圧として表示される。
(Function) When the first switching contact is turned on, the first capacitor is charged with the open circuit voltage E of the circuit network, and this charging voltage is displayed as the output voltage of the circuit network by the display.

一方、第1の開閉接点のオフ時に第2の開閉接点がオン
されると1回路網の起電力が負荷抵抗に供給され、この
負荷抵抗の両端に発生する電圧Vは前記出力電圧と共に
演算手段に取り込まれ、ここでテブナンの定理に基づき
内部抵抗に相当する出力抵抗の演算を行い、その演算結
果である出力は第3開閉接点のオン時に第2のコンデン
サに充電され、この充電電圧は表示器によって回路網の
内部抵抗として表示される。
On the other hand, when the second switching contact is turned on while the first switching contact is off, the electromotive force of one circuit network is supplied to the load resistor, and the voltage V generated across the load resistor is calculated by the calculation means as well as the output voltage. Here, the output resistance corresponding to the internal resistance is calculated based on Thevenin's theorem, and the output that is the calculation result is charged to the second capacitor when the third switching contact is turned on, and this charging voltage is displayed. is displayed as the internal resistance of the network.

従って、本発明にあっては、回路網の出力電圧及び内部
抵抗を同時に測定することができる。
Therefore, with the present invention, the output voltage and internal resistance of the network can be measured simultaneously.

(実施例) 以下1本発明の実施例を図面に基づいて詳細に説明する
(Example) Hereinafter, an example of the present invention will be described in detail based on the drawings.

第1図は1本発明による測定装置の一実施例を示す全体
の構成図である。
FIG. 1 is an overall configuration diagram showing an embodiment of a measuring device according to the present invention.

図において、lは起電力を含む任意の回路網で、電池な
どの直流電源2から成り、内部抵抗rを備^ている。
In the figure, l is an arbitrary circuit network including an electromotive force, consisting of a DC power source 2 such as a battery, and equipped with an internal resistance r.

前記回路網lの出力端子T1.T、には、第1リレー3
の常開接点3aを介して回路網lの開放電圧Eを充電す
る第1のコンデンサ4が並列に接続され、さらに出力端
子T 1. T a間には、第2リレー5の常開接点5
aを介して負荷抵抗6(抵抗値R)が並列に接続されて
いる。
Output terminal T1 . of said network l. T, has the first relay 3
A first capacitor 4 is connected in parallel, which charges the open circuit voltage E of the network l via the normally open contact 3a of the output terminal T1. A normally open contact 5 of the second relay 5 is connected between T and a.
A load resistor 6 (resistance value R) is connected in parallel via a.

引き算回路7の人力には、常開接点3aとコンデンサ4
との接続点PI及び常開接点5aと負荷抵抗6との接続
点P2がそれぞれ接続され、これにより引き算回路7に
はコンデンサ4に充電された出力電圧E及び負荷抵抗6
の両端に発生する電圧■が供給されるようになっている
。また、第1コンデンサ4の両端にはバッファ8を介し
て出力電圧Eを表示する電圧計等の表示器9が接続され
ている。
The subtraction circuit 7 has a normally open contact 3a and a capacitor 4.
The connection point PI with the normally open contact 5a and the connection point P2 with the load resistor 6 are connected, respectively, so that the subtraction circuit 7 receives the output voltage E charged in the capacitor 4 and the load resistance 6.
The voltage ■ generated across the terminal is supplied. Further, a display 9 such as a voltmeter that displays the output voltage E is connected to both ends of the first capacitor 4 via a buffer 8.

割算回路10は、引き算回路7から出力される電圧E−
vと負荷抵抗6の両端に発生する電圧Vとの比を求める
もので、その出力側には、負荷抵抗Hに相当する利得G
を有する増幅器11が接続され、この増幅器11の出力
端と回路網lの(−)端子18間には、第3リレー12
の常開接点12aを介して増幅器11からの出力電圧R
(E−v)  を充電する第2のコンデンサ13が接続
され、さらに、第2コンデンサ13の両端にはバッファ
14を介して内部抵抗rに相当接続されている。
The division circuit 10 receives the voltage E- output from the subtraction circuit 7.
It calculates the ratio between V and the voltage V generated across the load resistor 6, and the output side has a gain G corresponding to the load resistor H.
A third relay 12 is connected between the output terminal of the amplifier 11 and the (-) terminal 18 of the circuit network l.
The output voltage R from the amplifier 11 via the normally open contact 12a of
A second capacitor 13 for charging (E-v) is connected, and both ends of the second capacitor 13 are connected via a buffer 14 to correspond to the internal resistor r.

前記第2リレー5及び第3リレー12には、所定周波数
fのクロック信号CLKが直接供給され、また、第2リ
レー3には、前記クロック信号CLKをインバータ16
により反転したクロック信号が供給されるようになって
いる。
The second relay 5 and the third relay 12 are directly supplied with a clock signal CLK of a predetermined frequency f, and the second relay 3 is supplied with the clock signal CLK by an inverter 16.
An inverted clock signal is supplied.

次に、上記のように構成された本実施例の測定装置によ
る回路網lの出力電圧及び内部抵抗を同時に測定する場
合の動作を第2図のタイムチャートを参照して説明する
Next, the operation of simultaneously measuring the output voltage and internal resistance of the circuit network I by the measuring device of this embodiment configured as described above will be explained with reference to the time chart of FIG.

クロック入力端子17に第2図(a)に示す波形のクロ
ック信号CLKが加えられると、まず、その“L”時に
インバータ16で反転された信号(第2図す参照)が第
1リレー3に供給されるため、該第1リレー3が付勢し
て、その常開接点3aが閉成する。これに伴い回路網l
の直流電源2から内部抵抗r及び接点3aを通して第1
のコンデンサ4に電流が流れ、該コンデンサ4は回路網
lの出力電圧Eまで第2図(C)のように充電される。
When the clock signal CLK having the waveform shown in FIG. 2(a) is applied to the clock input terminal 17, the signal (see FIG. 2) which is inverted by the inverter 16 when the signal is "L" is applied to the first relay 3. Therefore, the first relay 3 is energized and its normally open contact 3a is closed. Along with this, the circuit network l
from the DC power supply 2 through the internal resistance r and the contact 3a.
A current flows through the capacitor 4, and the capacitor 4 is charged to the output voltage E of the network I as shown in FIG. 2(C).

この充電電圧Eは引き算回路7に取り込まれると共に、
バッファ8を介して表示器9に印加され、これにより表
示器9に回路網lの出力電圧Eを表示する。
This charging voltage E is taken into the subtraction circuit 7, and
It is applied to a display 9 via a buffer 8, so that the display 9 displays the output voltage E of the network I.

一方、入力端子17に加えられるクロック信号CLKが
“H“に転すると、第1リレー3が消勢し、第2リレー
5及び第3リレー12が付勢されて、それぞれの常開接
点5a、12aが閉成する。常開接点5aが閉成するこ
とにより、回路網1の出力電圧Eが負荷抵抗6に印加さ
れ、接続点P2に発生する負荷抵抗6の両端電圧Vが引
き算回路7及び割算回路10に供給される。これに伴い
引き算回路7ではE−vの演算を行い、また、割算回路
lOでは、引き算回路7から出力される演算結果E−v
と負荷抵抗6により接続点P2に−v 現われる電圧Vとに基づいて一一一一の演算を実行る信
号は増幅器11により増幅され、その増幅出力R(E−
v)−は、閉成した常開接点12・を通■ して、第2のコンデンサ13に充電される。この時、コ
ンデンサ13の充電電圧はvrとなり(第2図d参照)
、この電圧vrがバッファ14を介して表示器15に印
加され、これにより表示器15に回路網1の内部抵抗r
を表示する。
On the other hand, when the clock signal CLK applied to the input terminal 17 changes to "H", the first relay 3 is deenergized, the second relay 5 and the third relay 12 are energized, and the normally open contacts 5a, 12a is closed. By closing the normally open contact 5a, the output voltage E of the circuit network 1 is applied to the load resistor 6, and the voltage V across the load resistor 6 generated at the connection point P2 is supplied to the subtraction circuit 7 and the division circuit 10. be done. Accordingly, the subtraction circuit 7 calculates E-v, and the division circuit IO calculates the calculation result E-v output from the subtraction circuit 7.
The signal that performs the 1-1-1 calculation based on the voltage V appearing at the connection point P2 by the load resistor 6 is amplified by the amplifier 11, and its amplified output R(E-
v)- is charged to the second capacitor 13 through the closed normally open contact 12. At this time, the charging voltage of the capacitor 13 becomes vr (see Figure 2 d).
, this voltage vr is applied to the display 15 via the buffer 14, thereby causing the display 15 to have an internal resistance r of the network 1.
Display.

即ち、接点3を閉成することにより得られる出力電圧E
と接点5aを閉成することにより得られる負荷抵抗6の
両端電圧Vを基にして引き算回路7、割算回路lO及び
増幅器llがテブナンの−v 定理から得られるr=R−の演算を実行した■ ことにより、その結果、第2コンデンサ13に充電した
電圧vrを表示器15に加えれば、表示器15は回路網
lの内部抵抗rを測定したことになる。
That is, the output voltage E obtained by closing contact 3
Based on the voltage V across the load resistor 6 obtained by closing the contact 5a, the subtraction circuit 7, the division circuit 1O, and the amplifier 11 perform the calculation of r=R- obtained from Thevenin's -v theorem. As a result, when the voltage vr charged in the second capacitor 13 is applied to the display 15, the display 15 measures the internal resistance r of the circuit network l.

このように本実施例にあっては1回路1ullの出力端
子T、、T2に第1図に示す回路構成の測定装置を接続
し、クロック入力端子17からクロック信号CLKを入
力するのみで、回路網lの出力電圧E及び内部抵抗rを
ほとんど同時に測定することができると共に、その測定
操作も簡便となり1個人差のない正確な測定が可能にな
る。
As described above, in this embodiment, the measurement device having the circuit configuration shown in FIG. 1 is connected to the output terminals T, T2 of one circuit 1ull, and the circuit The output voltage E and internal resistance r of the network I can be measured almost simultaneously, and the measurement operation is also simple, making it possible to perform accurate measurements without individual differences.

なお、上記実施例では、出力電圧表示用及び内部抵抗(
出力抵抗)表示用にメータ方式の表示器を用いた場合を
示したが、これに限らずデジタル表示方式としても良い
、この場合、各バッファからのアナログ出力をデジタル
量に変換してデジタル表示器に出力すれば良い。
In the above embodiment, the output voltage display and internal resistance (
Although we have shown the case where a meter-type display is used to display (output resistance), it is not limited to this, and a digital display method may also be used. In this case, the analog output from each buffer is converted to a digital quantity and a digital display is used. You can output it to .

また、本発明におけるテブナンの定理に基づく内部抵抗
演算のための回路手段は、引き算回路7、割算回路lO
及び増幅器11に限定されない。
Further, the circuit means for calculating internal resistance based on Thevenin's theorem in the present invention includes a subtraction circuit 7, a division circuit IO
and is not limited to the amplifier 11.

(発明の効果) 以上のように本発明によれば、起電力を含む任意の回路
網の出力電圧及び出力抵抗を同時にかつ煩雑な手数をか
けることなく容易に測定することができる。
(Effects of the Invention) As described above, according to the present invention, the output voltage and output resistance of any circuit network including electromotive force can be easily measured simultaneously and without any complicated steps.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による測定装置の一例を示す全体の構成
図、第2図はその動作説明用のタイムチャートである。 尚、図中1は回路網、3は第1リレー、3aは常開接点
、4は第1のコンデンサ、5は第2リレー、5aは常開
接点、6は負荷抵抗、7は引き算回路、9は出力電圧表
示器、lOは割算回路。 11は増幅器、12は第2リレー、13は第2のコンデ
ンサ、15は内部抵抗表示器である。
FIG. 1 is an overall configuration diagram showing an example of a measuring device according to the present invention, and FIG. 2 is a time chart for explaining its operation. In the figure, 1 is a circuit network, 3 is a first relay, 3a is a normally open contact, 4 is a first capacitor, 5 is a second relay, 5a is a normally open contact, 6 is a load resistance, 7 is a subtraction circuit, 9 is an output voltage display, and lO is a divider circuit. 11 is an amplifier, 12 is a second relay, 13 is a second capacitor, and 15 is an internal resistance indicator.

Claims (1)

【特許請求の範囲】 起電力を含む任意の回路網の開放電圧を所定の周期でオ
ン−オフされる第1の開閉接点を介して充電する第1の
コンデンサと、 前記第1のコンデンサに充電された電圧を前記回路網の
出力電圧として表示する表示器と、前記回路網の出力端
に前記第1の開閉接点と逆にオン−オフする第2の開閉
接点を介して接続される負荷抵抗と、 前記第1のコンデンサに充電された出力電圧及び前記負
荷抵抗の両端電圧に基づいて前記回路網の内部抵抗に相
当する出力を演算する演算手段と、 前記演算手段からの出力を前記第2の開閉接点と同期し
てオン−オフする第3の開閉接点を介して充電する第2
のコンデンサと、 前記第2のコンデンサに充電された電圧を前記回路網の
内部抵抗として表示する表示器と、を備えてなる測定装
置。
[Scope of Claims] A first capacitor that charges an open-circuit voltage of an arbitrary circuit including an electromotive force through a first switching contact that is turned on and off at a predetermined cycle; and a first capacitor that charges the first capacitor. a load resistor connected to the output end of the circuit network via a second switching contact that turns on and off in the opposite manner to the first switching contact; and a calculation means for calculating an output corresponding to the internal resistance of the circuit network based on the output voltage charged in the first capacitor and the voltage across the load resistor; A second battery that charges via a third switching contact that turns on and off in synchronization with the switching contact of the
A measuring device comprising: a capacitor; and an indicator that displays the voltage charged in the second capacitor as an internal resistance of the circuit network.
JP430089A 1989-01-10 1989-01-10 Measuring instrument Pending JPH02184770A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP430089A JPH02184770A (en) 1989-01-10 1989-01-10 Measuring instrument

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP430089A JPH02184770A (en) 1989-01-10 1989-01-10 Measuring instrument

Publications (1)

Publication Number Publication Date
JPH02184770A true JPH02184770A (en) 1990-07-19

Family

ID=11580664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP430089A Pending JPH02184770A (en) 1989-01-10 1989-01-10 Measuring instrument

Country Status (1)

Country Link
JP (1) JPH02184770A (en)

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