JPH02184117A - Analog voltage generating circuit - Google Patents

Abstract

PURPOSE:To prevent an overshoot when a difference from an object value is large by inputting one of negative and positive reference voltages of an input reference voltage section to an integration circuit so that the object value stored in an object value storage means and an output voltage of the integration circuit are coincident. CONSTITUTION:The circuit consists of a reference voltage generating section 3 outputting a negative or a positive reference voltage, an integration circuit 2 holding an output voltage when the output is interrupted, an A/D converter 1 converting its output voltage into a digital data, an object value storage means 51 storing an object value, and a correction means 50 inputting one of the reference voltages to the integration circuit 2 by a time operated based on a difference between the object value and the digital data. Then the circuit is controlled so that the voltage held in the integration circuit 2 is coincident with the object value. Thus, the set voltage is surely stabilized and the analog voltage generating circuit with simple constitution is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an analog voltage generation circuit that outputs a set analog voltage.

[Conventional technology]

Conventionally, analog 7tf has been used to control the environmental control circuits of 4-zone test machines such as constant temperature chambers and constant humidity chambers with analog voltage.
A pressure generating circuit is used. That is, for example, Japanese Patent Publication No. 46-31163, Japanese Patent Application Laid-Open No. 59-178019
As shown in the publication, the analog voltage generation circuit converts digital data from the central processing unit into an analog voltage and holds it, outputs this hold voltage, and also outputs the output voltage and the analog voltage. It is designed to check whether the correct voltage is being output by comparing the voltage.

[Problem to be solved by the invention]

However, the analog voltage generating circuit described above has a complicated circuit configuration because the means for converting digital data into an analog voltage and the means for holding the analog voltage are each constructed separately.

Furthermore, if the analog voltage fluctuates due to temperature changes or the like, there is no specific means for correcting this fluctuation.

Furthermore, if the digital data is changed relatively significantly during power input or by external operation, the above analog voltage will also change significantly, so there is a risk of overshooting of the output voltage from the analog voltage generation circuit. There is a problem that there is a problem.

The present invention has been made in view of the above problems, and aims to provide an analog voltage generating circuit that is reliably stable at a set voltage and has a simple configuration.

[Means to solve the problem]

In claim 1 of the present invention, there is provided a reference voltage generating section that outputs a negative or positive reference voltage, an integrating circuit that holds the output voltage when the input to the base NA voltage converting section is cut off, and A-D converts the output voltage of the integrating circuit into digital data
a converter, a target value storage means for storing one standard value, and a correction means for inputting one of the Jl voltages to the integrating circuit for a time calculated based on the difference between the target value and the digital data; The voltage held in the integrating circuit is made to match the target value.

Further, in claim 2, the reference voltage is generated based on a correction value obtained by multiplying the difference between the target value stored in the target value storage means and the digital data of the A-D converter by a correction coefficient of 1 or less. The time for inputting one of the reference voltages of the section to the integrating circuit is calculated.

[Effect]

According to the analog voltage generation circuit configured as claimed in claim 1, [1
In order to match the [1 standard value stored in the target value storage means and the output voltage of the integrating circuit], the input signal is input for the time calculated based on the difference between the target value and the digital data from the A-D converter. J! One of the negative and positive reference voltages of the quasi-voltage section is input to the integrating circuit.

Further, the output voltage of the integrating circuit is held when the above-mentioned time has elapsed.

According to the analog voltage generation circuit configured as claimed in claim 2, the correction value is determined by multiplying the difference between the target value stored in the target value storage means and the digital data from the A-D converter by a correction coefficient of 1 or less. Since the time required to input one of the reference voltages from the reference voltage generator to the integrating circuit is calculated based on the corrected value, the output of the integrating circuit is calculated even when the difference between the target value and the digital data is relatively large. It is possible to prevent the voltage from changing significantly.

〔Example〕

FIG. 1 shows a circuit diagram of an analog voltage generation circuit according to the present invention.

The analog voltage generation circuit includes an A-D converter 1, an integrating circuit 2,
It consists of a reference voltage generation section 3, a reset section 4, and a central processing section 5. The A-D converter 1 converts the analog voltage output from the integrating circuit 2 into digital data and outputs the digital data to the central processor 5.

The integrating circuit 2 includes an operational amplifier 20, a capacitor C1 connected between the input and output terminals of the operational amplifier 20, and a resistor R1 connected in series with the input terminal of the operational amplifier 20. When the voltage from the reference voltage generator 3 is input to the integrating circuit 2 for a predetermined period, the output voltage of the operational amplifier 20 is determined by the time constant determined by the capacitor C1, the resistor R1, and the resistors R2 and R3 of the reference voltage generator 3. changes, and when the voltage from the voltage generator 3 is turned off, the output voltage from the operational amplifier 20 is held.

The reference voltage generating section 3 consists of a switching block 30, a negative pressure power source 31, a positive voltage power source 32, and resistors R2 and R3.
The selector switch 30 outputs a negative voltage (lower than the negative voltage from the power supply 31, referred to as a negative voltage) to the integrating circuit W2 via the resistor R2, or outputs the negative voltage from the positive voltage power supply 2 to the integrating circuit W2. This is for switching whether or not to output a positive reference voltage (hereinafter simply referred to as positive voltage) to the integrating circuit 2 via the resistor R3. In addition, the negative voltage of the 1!1 voltage power supply 31 is described later [
1 than the target value stored in the target value storage means 51 (1'(
The positive voltage of the positive voltage power supply 32 is set to be higher than a target value described later.

The reset section 4 consists of a reset switch 40 and a resistor R4, and the reset switch 40 is turned on and off by a control signal from the central processing section 5. When the reset switch 40 is turned on, the capacitor C1 of the integrating circuit 2 is connected to the resistor. It is designed to be discharged via R4.

The central processing unit 5 has a correction means 50 and a 1" target value storage stage 51, and also has an analog voltage generation circuit 1. It is something that you control. The correction means 50 calculates the connection period of the changeover switch 30 based on the digital data from the A-D converter 1 and the [1 standard value stored in the [1 standard value storage means 51], and also calculates the connection period of the changeover switch 30 and generates a reference voltage. 9) of section 3 is used to connect (turn on) the changeover switch 30 to the negative voltage power source 31 side or the positive voltage power source 32 side. 1 piece target value storage means 51
is for storing the target value set as the output voltage from the integrating circuit 2 as digital data.

Next, the operation of the above configuration will be explained using the flowchart of FIG. 2.

First, when the operation is started, the reset switch 40 is turned on by a control signal from the central processing unit 5 in step S1, and the voltage 6:j of the capacitor C1 of the integrating circuit 2 is discharged and reset. Thereafter, the reset switch 40 is turned off.

In step S2, the target value stored in the target value storage means 51 is read out to the correction means 50, and in step S3, the digital data obtained by converting the output voltage from the integrating circuit 2 by the A-D converter 1 is read out to the correction means. 50 is input. In step S4, the correction means 50 calculates the difference between the digital data and the target value, and in step S5, a predetermined correction coefficient is multiplied by the difference to obtain a correction value. In addition, the above correction coefficient is a constant of 1 or less and is used to prevent the output voltage of the integrating circuit 2 from changing greatly and overshooting when the above difference is relatively large. For example, it corresponds to the magnitude of the above difference. It may be set as appropriate.

In step S6, the changeover switch 3 is set based on the above correction value.
The period during which 0 is connected to the negative voltage power source 31 side or the positive voltage power source 32 side is calculated. That is, for example, when the target value is positive voltage (1), the selector switch 30 is set to positive voltage (1). The period t from when it is connected to the B'i 32 side until the output voltage of the integrating circuit 2 reaches the above-mentioned positive voltage (2) is calculated by the time constant of the capacitor C1 and the resistors R, , R3.

In step S7, the selector switch 30 is connected to the negative voltage power source 31 side or the positive voltage 'rl source 3 source side 2 in accordance with the period t. That is, when the C+ target value or the positive voltage v1 is set as described above, the changeover switch 30 is connected to the positive voltage power supply 32 side, and the connected state is continued until the above-mentioned period t is reached.

When the above period [is reached], the changeover switch 30 is disconnected from both the negative voltage power supply 31 side and the positive voltage power supply 32 side by 1υ1.
The output voltage of the operational amplifier 20 is held at the positive voltage V1.

After that, the process returns to step S2 again, and the target value storage means 5
1 to 1'' target value is read out again. At this time, for example, [1
If the target value has been changed to negative voltage -V2, step s3
．． At s4, the digital data from the A-D converter 1 and the above [
The difference “V1+V2” between one standard value is calculated, and step s5
．． In s6, the difference is multiplied by a correction coefficient to obtain a correction value, and the correction value is combined with the capacitor C1 and resistors R1, 1 and 2.
The time constant until the negative voltage -V2 is reached is calculated based on the time constant.

Then, in step S7, the changeover switch 30 is connected to the negative voltage power supply 31 side, and the connected state is maintained for the period t, so that the output voltage of the operational amplifier 20 becomes the negative voltage -v2. l) After the J exchange switch 30 is cut off, the negative voltage -v
2 is held.

On the other hand, if the target value has not been changed when returning to step S2 and reading out the 1.1 target value, that is,
If the difference between the digital data from the A-Di converter 1 and the target value is "0" in step S4, the processes in steps S5 to S7 are not performed.

Furthermore, if the output voltage of the operational amplifier 20 fluctuates due to temperature changes and a difference occurs between the digital data and the 1'' standard value in step S4, a correction value corresponding to the difference is calculated in step S5, and in step S6, For example, when the value of the above difference is positive, the period during which the changeover switch 30 is connected to the negative voltage power supply 31 side is calculated; The period of connection to the lA32 side is calculated. Then, in step S7, the changeover switch 30 is operated, and the output voltage of the operational amplifier 20 is corrected to the target value.

Next, an embodiment in which a plurality of outputs are output from the analog voltage generation circuit and each output voltage can be set separately will be described with reference to FIG. In addition, in the figure, the same reference numerals as in FIG. 1 indicate the same parts.

In other words, this analog voltage generation circuit has multiple output terminals o.
1, o2, ..., 03 has an operational amplifier 201゜2
Integrating circuit 2 to which each output of 02, ..., 203 is connected
1,22. ..., 23, and integrating circuits 21, 22°...
, 23 capacitors C1, C12, . . . , Ctl are connected to reset switches 401, 402, . . . , 403 are connected in parallel to reset units 41, 42 . ..., 43,
Integrating circuits 21, 22. . . , changeover switches 301, 302 . . . connected to each input of 23. . . , 303 to integrate the voltage of the anti-voltage power supply 31 or the positive voltage power supply 32 to the integrating circuits 21, 22 . ..., the group to be input to 23? J+'
It consists of a t-d pressure generating section 33 and a multiplexer 6.

In addition, changeover switches 301, 302. ... 303 is the modification 1 of the central processing unit 5 [sequentially according to the signal from the means 52]
Being manipulated. The multiplexer 6 inputs Jj! to the signal from the central processing unit 5. Integrating circuit 21 according to i,
22. . . , 23 are input to the AD converter 1.

The operation of the above configuration will be explained. In the above configuration, each of the integrating circuits 21, 22 . . . , the same operation as in flowchart 1 in FIG. 2 is performed every 23. That is, first, the reset units 41, 42 . . . , 43 reset switches 401, 402 . ..., 403 allows the integration circuit 21,
22. . . , 23 are reset, the output of the integrating circuit 21 is inputted to the A-Di converter 1 by the multiplexer 6.

Next, similarly to steps S2 to S7 in the flowchart of FIG. A difference 5) of one standard value from the digital data is calculated, and the difference is multiplied by a correction coefficient to calculate a modified 1E value. The period until the output of the integrating circuit 21 reaches the target value is calculated based on the correction value and the time constant provided by the capacitor C11, the resistor R11, etc., and the changeover switch 301 is switched to the negative voltage power supply 31 side by a signal from the correction means 52. Alternatively, it is connected to the positive voltage power supply 32 side for the above period. After that, the changeover switch 301 is cut off and the output of the integrating circuit 21 is turned off!
” will be held at the target price.

Further, when the changeover switch 301 is connected to the negative voltage power supply '31 side or the positive voltage power supply '31 side, the output of the integrating circuit 22 is inputted to the A/D converter 1 by the multiplexer 6. Thereafter, the same processing as steps S2 to S7 in the flowchart of FIG. After being connected to the power supply 31 side or the piezoelectric lf power supply 32 side for the calculated period, the luJ conversion switch '302 is shut off and the output of the integrating circuit 22 is held at the target value.

When the changeover switch 1z02 is connected to the negative voltage source 31 side or the positive voltage source 32 side, the multiplexer 6 is switched and the same process as described above is performed in the next integrating circuit.

The above processing is performed sequentially for each integrating circuit, and when the processing up to the integrating circuit 23 is completed, the output of the integrating circuit 21 is inputted to the AD converter 1 again by the multiplexer 6. For example, if the digital data of the A-D converter 1 differs from the target value due to a change in the value or a change in temperature, the difference between them is calculated, and the difference is multiplied by a correction coefficient. A correction value is calculated, and a period until the output of the integrating circuit 21 reaches the target value is calculated using the correction value and a time constant formed by the capacitor C11, the resistor R11, etc., and a signal from the correction means 52 causes the changeover switch 301 to become negative. It is connected to the voltage power source 31 side or the positive voltage power source 32 side for the above period. Thereafter, the changeover switch 301 is set to Mlli, and the output of the integrating circuit 21 is held at the target value. after that,
Processing is performed sequentially to the next integrating circuit.

Note that the reset units 41, 42 . . . , 43 integral circuits 21, 22 . . . , 23 may be reset immediately before the processing of each integrating circuit is performed.

The environmental testing machine can be controlled by incorporating the analog voltage generation circuit into an environmental testing machine such as a constant temperature oven, or by connecting it externally to an environmental control circuit of the environmental testing machine.

That is, for example, in the case of a thermostatic oven whose temperature is controlled by an analog voltage, the set temperature of the thermostatic oven is converted into digital data, and the digital data is stored as a target value in the target value storage means of the analog voltage generation circuit. By inputting an analog voltage that matches the target value from the analog voltage generation circuit to the temperature control circuit of the thermostatic chamber, it is possible to prevent overshoot due to changes in the set iR degree, etc., and to prevent overshoots caused by changes in the ambient temperature, etc. Disturbances such as temperature can be reduced.

〔Effect of the invention〕

Since the present invention outputs and holds a voltage that matches the target value by the integrating circuit, the conventional analog voltage converting means for converting the target value into an analog voltage and the means for holding the analog voltage are configured separately. The configuration can be simpler than that of a generator circuit, and costs can be reduced. In addition, even if the target value is changed or the output voltage of the integrating circuit fluctuates due to temperature changes, the output voltage of the integrating circuit will match the target value, so the analog voltage generation circuit can easily follow the target value. can be obtained.

Furthermore, the time required to input one of the reference voltages from the reference voltage generator to the integrating circuit is calculated based on a correction value obtained by multiplying the difference between the target value and the digital data of the A-D converter by a correction coefficient of 1 or less. Even when the target value is changed and the difference between the target value and the digital data becomes relatively large, overshoot due to a large change in the output voltage of the integrating circuit can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an analog voltage generation circuit according to the present invention,
FIG. 2 is a flowchart showing the operation of FIG. 1, and FIG. 3 is a block diagram showing another embodiment of the analog voltage generation circuit according to the present invention. DESCRIPTION OF SYMBOLS 1... A-D conversion part, 2, 21, 22. 23... Integrating circuit, 3, 33... Reference voltage generation part, 5... Central processing part, 30... Changeover switch, 31 ...Negative voltage power supply, 32...Positive' small voltage 71X source, 50.52...Modifying means, 51...) 14, 1 value storage means. Figure 2

Claims (1)

[Claims] 1. A reference voltage generating section that outputs a negative or positive reference voltage, an integrating circuit that holds the output voltage when the input from the reference voltage generating section is cut off, and the integrating circuit. an A-D converter for converting the output voltage into digital data; a target value storage means for storing the target value; and an A-D converter for converting the output voltage into digital data; and a correction means for inputting the input into the integrating circuit,
An analog voltage generating circuit characterized in that the voltage held in the integrating circuit matches the target value. 2. The reference voltage of the reference voltage generator is adjusted based on the correction value obtained by multiplying the difference between the target value stored in the target value storage means and the digital data of the A-D converter by a correction coefficient of 1 or less. 2. The analog voltage generating circuit according to claim 1, wherein the time for inputting one of the voltages to the integrating circuit is calculated.