JPH02183593A - Manufacture of printed circuit board - Google Patents
Manufacture of printed circuit boardInfo
- Publication number
- JPH02183593A JPH02183593A JP302489A JP302489A JPH02183593A JP H02183593 A JPH02183593 A JP H02183593A JP 302489 A JP302489 A JP 302489A JP 302489 A JP302489 A JP 302489A JP H02183593 A JPH02183593 A JP H02183593A
- Authority
- JP
- Japan
- Prior art keywords
- thermosetting type
- circuit
- photo
- solder resist
- conductor pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 239000004020 conductor Substances 0.000 claims abstract description 22
- 229910000679 solder Inorganic materials 0.000 claims abstract description 20
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 16
- 239000007788 liquid Substances 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 7
- 239000011248 coating agent Substances 0.000 claims abstract description 3
- 238000000576 coating method Methods 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 2
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はプリント配線板の製造方法に関し、特にソルダ
レジスト工程を含むプリント配線板の製造方法に関する
。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a printed wiring board, and particularly to a method for manufacturing a printed wiring board including a solder resist process.
従来、プリント配線板（以下ＰＷＢと記す）のソルダレ
ジスト（以下ＳＲと記す）形成に関しては、液状のホト
ＳＲを等を用い所定のパターンを露光し、現像すること
でＳＲ層を形成していた。Conventionally, when forming a solder resist (hereinafter referred to as SR) for a printed wiring board (hereinafter referred to as PWB), an SR layer was formed by exposing a predetermined pattern using liquid photo-SR, etc., and developing it. .
上述した従来のホトＳＲを用いたＳＲ形成法では、導体
パッド間にＳＲを形成するために、ホトＳＲ幅が細線化
させなくてはならず、細線化することで密着面積が狭く
なり、０．１順以下のホトＳＲ細線では、ホトＳＲ密着
不良を生ずるという欠点があった。In the above-mentioned conventional SR forming method using photo-SR, in order to form SR between conductor pads, the photo-SR width must be made thinner, and by making the wire thinner, the adhesion area becomes narrower. Photo-SR thin wires with an order of .1 or lower had the disadvantage of causing poor photo-SR adhesion.
また、ホトＳＲでは、ＳＲ層の厚みが導体パッドの厚み
と同じか、又は、それ以下であり、近年のＰＷＢ高密度
化によるフラットＩＣパッドの間隙が狭くなる傾向の中
でホトＳＲ層を超えてはんだブリッジになるケースが生
ずるという欠点もあった。In addition, in photo-SR, the thickness of the SR layer is the same as or less than the thickness of the conductor pad, and as the gap between flat IC pads has narrowed due to the recent increase in PWB density, it has exceeded the thickness of the photo-SR layer. Another drawback is that solder bridges may occur.
本発明の目的は、ホトＳＲの密着不良がなく、はんだブ
リッジを生ずることのないプリント配線板の製造方法を
提供することにある。An object of the present invention is to provide a method for manufacturing a printed wiring board that does not cause poor adhesion of photo-SR and does not cause solder bridges.
本発明は、ソルダレジストの形成工程を含むプリント配
線板の製造方法において、次の工程を有すしている。The present invention provides a method for manufacturing a printed wiring board including a step of forming a solder resist, which includes the following steps.
（１）基材の表面に回路と導体パッド及びスルーホール
を形成した後、エツチングレジストを塗布する工程
（２）熱硬化タイプのソルダレジストを塗布し、回路と
導体パッドの間隙を充填し、熱硬化する工程
（３）硬化した前記熱硬化タイプのソルダレジストを機
械研摩にて除去し、残渣を化学的に剥離する工程
（４）液体ホトソルダレジストを塗布し、選択的に露光
、現像して液体ホトレジストを追加して被覆する工程
〔実施例〕
次に、本発明の実施例について図面を参照して説明する
。(1) After forming the circuit, conductor pads, and through holes on the surface of the base material, apply an etching resist. (2) Apply a thermosetting type solder resist, fill the gap between the circuit and the conductor pad, and heat it. Curing step (3) Removing the cured thermosetting type solder resist by mechanical polishing and chemically peeling off the residue (4) Applying liquid photo solder resist, selectively exposing and developing it. Step of additionally coating with liquid photoresist [Example] Next, an example of the present invention will be described with reference to the drawings.
第１図（ａ）〜（ｄ）は本発明の一実施例の製造方法を
説明する工程順に示した断面図である。FIGS. 1(a) to 1(d) are cross-sectional views showing the steps of a manufacturing method according to an embodiment of the present invention.
まず、第１図（ａ）に示すように、基材１の表面に回路
４と導体パッド２及びスルーホール５を形成した後、回
路４．導体パッド２の表面とスルーホール５の穴をふさ
ぐように、エツチングレジスト３を塗布する。First, as shown in FIG. 1(a), after forming the circuit 4, the conductor pads 2, and the through holes 5 on the surface of the base material 1, the circuit 4. Etching resist 3 is applied so as to cover the surface of conductor pad 2 and the through hole 5.
次に、第１図（ｂ）に示すように、エツチングレジスト
３を塗布した基板１の全面に、更に、熱硬化タイプのＳ
Ｒ６を塗布し、回路４と導体パッド２の間隙を熱硬化タ
イプのＳＲ６にて充填し、充填した熱硬化タイプのＳＲ
６を１３０°Ｃ２０分間ベーキングして硬化する。Next, as shown in FIG. 1(b), a thermosetting type S is further applied to the entire surface of the substrate 1 coated with the etching resist 3.
R6 is applied, and the gap between the circuit 4 and the conductor pad 2 is filled with thermosetting type SR6.
6 is baked at 130°C for 20 minutes to harden.
次に、第１図（ｃ ）に示すように、バフ硬摩により、
エツチングレジスト３及びエツチングレジスト３上の熱
硬化タイプのＳＲ６を除去する。パフ研摩にて残った熱
硬化タイプのＳＲ６の残香は、更に、塩化メチレン等で
剥離する。Next, as shown in Figure 1(c), by buffing,
The etching resist 3 and the thermosetting type SR6 on the etching resist 3 are removed. The residual aroma of the thermosetting type SR6 left after the puff polishing is further removed with methylene chloride or the like.
次に、第１図（ｄ）に示すように、液体ホトＳＲ７を塗
布し、回路４上や導体パッド２の間隙の熱硬化タイプの
ＳＲ６上を被覆し、スルーホール５の導体パッド上には
液体ホトＳＲ７がつかないように選択的に露光し、現像
して液体ホトＳＲ７を追加して被覆し、本実施例のＰＷ
Ｂを得た。Next, as shown in FIG. 1(d), liquid photo SR7 is applied to cover the circuit 4 and the thermosetting type SR6 in the gap between the conductor pads 2, and the conductor pads in the through holes 5 are coated with liquid photo SR7. The PW of this example was selectively exposed to light so that no liquid photo SR7 was attached, developed, and additionally coated with liquid photo SR7.
I got a B.
以上説明したように本発明は、回路と導体バッド力間隙
を熱硬化タイプのＳＲにて充填し、更に、液体ホトＳＲ
を選択的に被覆することにより、容易に導体パッド間に
ＳＲ層を形成することができ、ホトＳＲのみでＳＲＪ’
ｉｌを形成していた時に生じていたＳＲ密着不良を解消
することができる効果がある。As explained above, the present invention fills the gap between the circuit and the conductor pad with thermosetting SR, and further fills the gap between the circuit and the conductor pad with liquid photo SR.
By selectively covering the conductor pads, an SR layer can be easily formed between the conductor pads, and SRJ' can be easily formed using only photo-SR.
This has the effect of eliminating poor SR adhesion that occurred when forming the il.
又、導体パッド間に導体パッドの厚みより厚いＳＲ層が
形成されたなめはんだブリッジをなくすことができ、更
に、ＰＷＢはんだコート品にも展開したところはんだコ
ート厚が導体パッド上に厚く均一につくことが可能にな
りはんだコート仕上り不良も解決できる効果もある。In addition, it is possible to eliminate the diagonal solder bridge where the SR layer is thicker than the thickness of the conductor pads between the conductor pads, and when applied to PWB solder coated products, the solder coat thickness is thick and uniform on the conductor pads. This also has the effect of resolving poor solder coat finish.
第１図（ａ）〜（ｄ）は本発明の一実施例の製造方法を
説明する工程順に示した断面図である。FIGS. 1(a) to 1(d) are cross-sectional views showing the steps of a manufacturing method according to an embodiment of the present invention.
Claims (1)
方法において、次の工程を有することを特徴とするプリ
ント配線板の製造方法。 （１）基材の表面に回路と導体パッド及びスルーホール
を形成した後、エッチングレジストを塗布する工程 （２）熱硬化タイプのソルダレジストを塗布し、回路と
導体パッドの間隙を充填し、熱硬化する工程 （３）硬化した前記熱硬化タイプのソルダレジストを機
械研摩にて除去し、残渣を化学的に剥離する工程 （４）液体ホトソルダレジストを塗布し、選択的に露光
，現像して液体ホトレジストを追加して被覆する工程[Scope of Claim] A method for manufacturing a printed wiring board, which includes the step of forming a solder resist, the method comprising the following steps. (1) After forming the circuit, conductor pads, and through holes on the surface of the base material, apply an etching resist. (2) Apply a thermosetting type solder resist, fill the gap between the circuit and the conductor pad, and heat it. Curing step (3) Removing the cured thermosetting type solder resist by mechanical polishing and chemically peeling off the residue (4) Applying liquid photo solder resist, selectively exposing and developing it. Adding and coating liquid photoresist
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP302489A JP2661231B2 (en) | 1989-01-09 | 1989-01-09 | Manufacturing method of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP302489A JP2661231B2 (en) | 1989-01-09 | 1989-01-09 | Manufacturing method of printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02183593A true JPH02183593A (en) | 1990-07-18 |
| JP2661231B2 JP2661231B2 (en) | 1997-10-08 |
Family
ID=11545757
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP302489A Expired - Lifetime JP2661231B2 (en) | 1989-01-09 | 1989-01-09 | Manufacturing method of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2661231B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06338677A (en) * | 1993-05-31 | 1994-12-06 | Nec Corp | Manufacture of printed wiring board |
-
1989
- 1989-01-09 JP JP302489A patent/JP2661231B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06338677A (en) * | 1993-05-31 | 1994-12-06 | Nec Corp | Manufacture of printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2661231B2 (en) | 1997-10-08 |
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