JPH02183292A - Device for crt display - Google Patents

Abstract

PURPOSE:To minimize an increase in the capacity of a RAM as much as possible by storing a 1st memory with a carriage return code and a rewriting request code in addition to character codes. CONSTITUTION:The device is provided with the 1st memory 7 stored with image plane control data, the code which requesting the rewriting of the 1st memory 7 externally, the 1st memory 7, and the carriage return code, a 2nd memory 8 stored with the shapes of characters, and a control circuit part 2 which controls those memories. Then a small-capacity memory having addresses for two display lines on a screen is used as the 1st memory 7 and display data and screen control data are stored and used repeatedly for display in one filed of the screen to display many characters on the screen. Consequently, the capacity of a RAM used generally for rewriting is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a CRT display circuit for displaying characters such as numbers and letters on a CRT screen.

2. Description of the Related Art Conventionally, a CRT display circuit for displaying characters on a CRT screen, as shown in the block diagram of FIG. a second memory for storing the shape of a character, which is addressed by the first memory output; a shift register and display output for converting the output data of the second memory into CRT display data; From the circuit, horizontal synchronization signal, vertical synchronization signal and dot clock, the first. It is comprised of a second memory, a shift register, and a control circuit section that generates a timing signal to be applied to a CRT display output circuit.

Problems to be Solved by the Invention However, according to this configuration, as shown in FIG. 4, the first memory for storing the type of character is in one-to-one correspondence with the display position of the character on the display screen, so that it is difficult to use for display purposes. memory·
The number of addresses required is the same as the number of characters that can be displayed on the field screen, and when a large number of characters are to be displayed on the field screen, an extremely large capacity memory is required as the first memory. In particular, random access memory (hereinafter referred to as RAM) is often used as the first memory because it is necessary to rewrite display contents, but due to its structure, RAM has a 1-bit memory capacity compared to read-only memory (hereinafter referred to as ROM). Since the area per unit area is extremely large by several times, there is a problem that the chip size increases when the CRT display circuit is integrated as the number of characters that can be displayed on the display screen increases.

Means for Solving the Problems The CRT display device of the present invention solves the above-mentioned problems, and it uses screen control data such as the type and position of characters to be displayed, the size of the characters to be displayed, and the like. A code for requesting rewriting of memory No. 1 to the outside of this display circuit, a first memory that stores a line feed code indicating the end of a display line on the screen, a second memory that stores the shape of a character, and these. By accessing the address in which the rewrite request code of the first memory is stored in the control circuit section for controlling the memory of The control circuit unit includes a line feed control circuit unit that completes the display of a line on the screen including the address by accessing the address storing the line feed code in the first memory, and at the same time determines the display start position of the next line to be displayed. ,
A shift register for converting the output data of the second memory into CRT display data, a display output circuit, a horizontal synchronizing signal, a vertical synchronizing signal and a dot clock, and a second memory, a shift register, and a CRT display. The device is equipped with a 1til control circuit section that generates a timing signal to be applied to the output circuit.

According to the present invention, the first memory is not a conventional memory that has addresses for the number of characters that can be displayed on one screen, but a small-capacity memory that has addresses for about two lines on the screen for display purposes. Data and screen 1! Since a large number of characters are displayed on the screen by storing J control data and repeatedly displaying it within one field on the screen, it is generally necessary to rewrite it, so it is necessary to reduce the capacity of the RAM used as the first memory. This makes it possible to reduce the area occupied by RAM, which has a large area per bit, on a large-scale integrated circuit, thereby making it possible to reduce the chip area of the large-scale integrated circuit.

In addition, the line feed control circuit allows you to arbitrarily set the number of characters included in a display line on the screen, making it possible to display more lines using the same capacity of the first memory. Greater freedom.

Embodiment An embodiment of the CRT display device of the present invention will be described with reference to the functional block diagram shown in FIG.

This circuit includes a first memory 7, a second memory 8, a line feed code detection circuit 4, a line feed control circuit 11, a rewrite request code detection circuit 5, a rewrite request signal output circuit 6,
It is composed of a timing generation circuit 3, a memory control circuit 2, an interface circuit 1, a shift register 9, and a CRT display output circuit 10.

The first memory 7 receives a dot clock signal, a horizontal synchronization signal,
This is a memory that is accessed by the read address output by the memory control circuit that receives the timing signal generated by the timing generation circuit 3 from the vertical synchronization signal, such as "A", "B", etc.
A device that stores a code indicating the type of character, a line feed code that indicates the end of a line and includes display start position data for the next line to be displayed, and a rewriting request code for requesting the controller to rewrite the first memory data. This is made up of RAM.

Among these data, the character code accesses the second memory 8. The second memory 8 is a memory that stores the shape of the character.

The output of the second memory is inputted to a shift register 9 for converting it into time-series CRT display data, and then passed through a CRT display output circuit 10 that converts the data from the shift register 16 into a display signal, and then displayed on the screen. will be displayed.

Among the data in the first memory 7, the line feed code is detected by the line feed code detection circuit 4, and the line feed control circuit 11 is operated.

The line feed control circuit 11 completes the display of the line currently displayed on the screen by the code detection output, and displays the start position data of the next display line included in the line feed code data contained in the line feed control circuit 11. Write to start position data register.

The rewrite request code among the data in the first memory 7 is detected by the rewrite request code detection circuit 5, and the rewrite request signal generation circuit 6 is made operational. At the time of code detection, the rewrite request signal generation circuit 6 enters an operation waiting state and waits for the display of the currently displayed line to be completed, and then outputs the first memory data rewrite request signal to the controller of the CRT display circuit and starts the operation. finish.

Furthermore, with reference to FIG. 2, the principle of display on a CRT screen will be specifically explained.

Note that FIG. 2 is an example of the CRT display of FIG. 1, and the first memory is assumed to be a 16-word RAM at addresses 0 to 2.

Character codes are stored at addresses 0 to 2, addresses 3 to 7, and addresses A to E of the first memory, and characters corresponding to the respective codes are displayed on the screen. Also, line feed codes are stored at addresses 4, 9, and F in the first memory. A first memory data rewrite request code is stored at address 8. Addresses 0 to 3 of the first memory data accessed by the read address generated by the memory control circuit 2 that receives the timing signal output from the timing control circuit 3 from the vertical synchronization signal, horizontal synchronization signal, and dot clock signal. The character code accesses the second memory, and the output of the second memory is converted into time-series data by the shift register 9, and then converted into data to be displayed on the screen by the CRT display output circuit 10. When the data at address 4 (line feed code) of the first memory is accessed, the display of this line ends, and the display start position of the next display line is determined based on the display position data included in the line feed code. Through the above operations, the three characters in the first line of display are displayed on the screen.

The second display line starts displaying from the display position determined by the line feed code of the first line, and the characters specified by the character codes at addresses 4 to 7 are displayed in the same manner as in the first line. When address 8 is accessed, the rewrite request code detection circuit detects this and puts the rewrite request signal generation circuit into a state of waiting for operation. Next, address 9 is accessed, a line feed code is detected, and the same line feed operation as in the first line is executed. After the rewrite operation is completed, the rewrite request signal generation circuit that has been in an operation standby state outputs a rewrite request signal to an external controller.

While the display on the third line is being executed based on the same principle as above, the external controller uses the interface 1 to display the addresses 0 to 10 of the first memory where the display has been completed.
The data at address 9 is rewritten to prepare for display on the fourth line on the screen.

When the display of the 3rd line is completed and the read address increments from address F to address 0, it will be used for display in the same screen field sequentially from address 0 of the first memory that was rewritten during the display of the 3rd line. The fourth line and subsequent lines can be displayed.

Effects of the Invention As described above, according to the present invention, in addition to character codes, the first memory stores a line feed code and a rewrite request code, thereby solving the problem of RAM usage when displaying a large number of characters on the screen. Capacity increase can be controlled to the necessary minimum. As a result, when integrated, the chip area can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a CRT display device according to the present invention, FIG. 2 is a diagram showing an example of a display on a screen according to the present invention and its display principle, and FIG. 3 is a block diagram showing a conventional CRT display circuit. FIG. 4 is a diagram showing the correspondence between the display on the screen and the memory address for storing display data for one screen according to the conventional example. 1...Interface circuit with control microcomputer, 2...Memory control circuit, 3
...timing generation circuit, 4 ... line feed code detection circuit, 5 ... rewrite request code detection circuit, 6 ... first memory rewrite request signal generation Circuit, 7...First memory, 8...
・Second memory, 9...Shift register, 1
0... Output circuit for CRT display, 11...
・Line feed control circuit. Name of agent: Patent attorney Shigetaka Awano and 1 other person No. Zuhei CRT screen I2--Issui fλ4] 11 Igshirat 14--Dots Crow 14

Claims (1)

[Claims] The first one stores on-screen display data and screen control data.
The characters and data in the first memory are the same as the first memory.
Shape (font) of character addressed in code
The first memory comprises a data memory section that is composed of a second memory that stores the data and a control circuit that controls these, and an output circuit section that outputs the data output from the data memory section as CRT display data. A line feed control circuit section includes a built-in register that identifies a line feed code among the data, terminates a display line on the screen, and stores start position data of the next display line included in the line feed code,
Furthermore, the first memory data is rewritten among the data in the first memory, and a request code is identified, and a signal is generated to request the rewriting of the first memory data to an external controller. 1. A CRT display device, comprising a signal generation circuit section, the timing generation circuit section generating timing signals to be applied to the data memory section, the output circuit section, and each control circuit section.