JPH02177391A - Thick film printed multilayered circuit board - Google Patents
Thick film printed multilayered circuit boardInfo
- Publication number
- JPH02177391A JPH02177391A JP33481388A JP33481388A JPH02177391A JP H02177391 A JPH02177391 A JP H02177391A JP 33481388 A JP33481388 A JP 33481388A JP 33481388 A JP33481388 A JP 33481388A JP H02177391 A JPH02177391 A JP H02177391A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- thermal expansion
- ceramic substrate
- coefficient
- thick film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims abstract description 39
- 239000004020 conductor Substances 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims description 34
- 239000012212 insulator Substances 0.000 claims description 2
- 230000001681 protective effect Effects 0.000 abstract description 7
- 238000010030 laminating Methods 0.000 abstract description 5
- 238000010276 construction Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は厚膜印刷多層配線基板に関し、特に混成集積回
路等に使用される厚膜印刷多層配線基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thick film printed multilayer wiring board, and particularly to a thick film printed multilayer wiring board used for hybrid integrated circuits and the like.
従来、この種の厚膜印刷多層配線基は、セラミック等の
基板に対し、熱膨張係数が大きいか、もしくは小さい一
種類の絶縁体材料を印刷し積層することにより絶縁層を
形成している。Conventionally, in this type of thick-film printed multilayer wiring board, an insulating layer is formed by printing and laminating one type of insulating material having a large or small coefficient of thermal expansion on a substrate such as a ceramic substrate.
第５図はかかる従来の一例を示す厚膜印刷多層配線基板
の縦断面図である。FIG. 5 is a longitudinal cross-sectional view of a thick film printed multilayer wiring board showing an example of such a conventional wiring board.
第５図に示すように、この配線基板はセラミック基板１
上に、配線導体５を形成し且つセラミック基板１よりも
熱膨張係数の小さい絶縁ＷＩ３を四Ｍ積層し、その上に
保護ｐＡ４を被覆して形成される。As shown in FIG. 5, this wiring board has a ceramic board 1.
The wiring conductor 5 is formed thereon, and 4M of insulation WI3 having a smaller thermal expansion coefficient than the ceramic substrate 1 is laminated, and a protective pA4 is coated thereon.
この場合、積層にあたっては温度を加えているので、セ
ラミック基板１と絶縁層３は平行状態を保っているが、
常温に戻したときに、絶縁ｆｌ、ｉ ３は熱膨張係数が
小さいので縮み量が少なく、セラミック基板１を凸方向
に腕曲させる。In this case, since temperature is applied during lamination, the ceramic substrate 1 and the insulating layer 3 maintain a parallel state.
When the temperature is returned to room temperature, the insulation fl, i 3 has a small coefficient of thermal expansion, so the amount of shrinkage is small, and the ceramic substrate 1 is bent in a convex direction.
第６図は従来の他の例を示す厚膜印刷多層配線基板の縦
断面図である。FIG. 6 is a longitudinal sectional view of another conventional thick film printed multilayer wiring board.
第６図に示すように、かかる配線基板はセラミツク基板
１上に、このセラミックの基板１よりも熱膨張係数が大
きく且つ導体配線５を形成した絶縁層２を四層積層し、
その上に保護膜４を被覆して形成される。As shown in FIG. 6, this wiring board is made by laminating four insulating layers 2 on a ceramic substrate 1, which have a larger coefficient of thermal expansion than the ceramic substrate 1 and have conductor wiring 5 formed thereon.
A protective film 4 is formed thereon.
この場合は、前述した従来例と逆に熱Ｗ３張係数の大き
い絶縁層２を用いているので、絶縁層２の縮み量が多く
、セラミック基板１を凹方向に腕曲させる。In this case, contrary to the conventional example described above, since the insulating layer 2 having a large thermal W3 tensile coefficient is used, the amount of shrinkage of the insulating layer 2 is large, causing the ceramic substrate 1 to bend in the concave direction.
〔発明が解決しようとする３ｆｆｉ題〕上述した従来の
厚膜印刷多層配線基板は、セラミック基板１上に、この
セラミック基板１よりも熱膨張係数の小さい絶縁層３、
もしくは熱膨張係数の大きい絶縁層２の一種類の絶縁層
を積層する構成になっているので、セラミック基板１と
絶縁１２もしくは絶縁層３との熱膨張係数との差により
凹状又は凸状に反り分生じる。従って、かかる絶縁層の
積層数が増えると５膜厚の不均一が生じたり、または部
品実装ができなくなる等の欠点がある。[3ffi problem to be solved by the invention] The above-described conventional thick-film printed multilayer wiring board has an insulating layer 3 on a ceramic substrate 1 having a coefficient of thermal expansion smaller than that of the ceramic substrate 1;
Alternatively, since the structure is such that one type of insulating layer 2 with a large thermal expansion coefficient is laminated, the difference in thermal expansion coefficient between the ceramic substrate 1 and the insulating layer 12 or the insulating layer 3 may warp in a concave or convex shape. minute amount occurs. Therefore, when the number of laminated insulating layers increases, there are drawbacks such as non-uniform film thickness or failure to mount components.
本発明の目的は、かかるセラミック基板と絶縁層との反
りを小さくし、膜厚の均一化および部品実装の安定性を
実現する厚膜印刷多層配線基板を提供することにある。An object of the present invention is to provide a thick-film printed multilayer wiring board that reduces warpage between the ceramic substrate and the insulating layer, and achieves uniform film thickness and stable component mounting.
〔課題を解決するための手段〕
本発明の厚膜印刷多層配線基板は、セラミック基板上に
厚膜回路導体、厚＠抵抗体および厚膜絶縁体等を印刷し
て積層する厚膜印刷多層配線基板において、前記セラミ
ック基板上に、熱膨張係数が前記セラミック基板の熱膨
張係数よりも大きい第一の絶縁層と、熱膨張係数が前記
セラミック基板の熱膨張係数よりも小さい第二の絶縁層
とを積層して構成される。[Means for Solving the Problems] The thick film printed multilayer wiring board of the present invention is a thick film printed multilayer wiring board in which thick film circuit conductors, thick resistors, thick film insulators, etc. are printed and laminated on a ceramic substrate. In the substrate, on the ceramic substrate, a first insulating layer having a coefficient of thermal expansion larger than that of the ceramic substrate, and a second insulating layer having a coefficient of thermal expansion smaller than the coefficient of thermal expansion of the ceramic substrate. It is made up of layers.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の第一の実施例を示す厚膜印刷多層配線
基板の縦断面図である。FIG. 1 is a longitudinal sectional view of a thick film printed multilayer wiring board showing a first embodiment of the present invention.
第１図に示すように、本実施例の配線基板はセラミック
基板１上に、導体配線５を形成し且つセラミック基板１
よりも熱膨張係数の大きい第一の絶縁Ｎ２を二層積層し
、その上に導体配線５を有し且つセラミック基板１より
も熱膨張係数の小さい第二の絶縁層３を一層績層する。As shown in FIG. 1, the wiring board of this embodiment has conductor wiring 5 formed on a ceramic substrate 1 and
Two layers of a first insulating layer N2 having a larger coefficient of thermal expansion than that of the ceramic substrate 1 are laminated, and a second insulating layer 3 having a conductive wiring 5 and a coefficient of thermal expansion smaller than that of the ceramic substrate 1 is laminated thereon.
さらに、この第二の絶縁層３の上に一層の第一の絶８層
２および保護膜４を形成する。Furthermore, a first insulating layer 2 and a protective film 4 are formed on this second insulating layer 3.
第２図は第１図におけるセラミック基板と各絶縁層の熱
膨張係数の差により生じる力の方向を示す模式図である
。FIG. 2 is a schematic diagram showing the direction of force caused by the difference in thermal expansion coefficient between the ceramic substrate and each insulating layer in FIG. 1.
第１図および第２図に示すように、セラミック基板１上
にセラミック基板１と比べて熱膨張係数の大きい第一の
絶縁層２と、セラミック基板１と比べ熱膨張係数の小さ
い第二の絶縁層３と、導体配線５および保護膜５とを印
刷して積層することにより、凹方向に反りを生じる力と
凸方向に反りを生じる力が釣り合い、厚膜基板全体の反
りを防止することができる。As shown in FIGS. 1 and 2, a first insulating layer 2 having a larger coefficient of thermal expansion than the ceramic substrate 1 and a second insulating layer 2 having a smaller coefficient of thermal expansion than the ceramic substrate 1 are formed on the ceramic substrate 1. By printing and laminating the layer 3, the conductor wiring 5, and the protective film 5, the force that causes the warp in the concave direction and the force that causes the warp in the convex direction are balanced, and warping of the entire thick film board can be prevented. can.
第３図は本発明の第二の実施例を示す厚膜印刷多層配線
基板の縦断面図、第４図は第３図におけるセラミック基
板と各絶縁層の熱膨張係数の差により生じる力の方向を
示す模式図である。FIG. 3 is a vertical cross-sectional view of a thick film printed multilayer wiring board showing a second embodiment of the present invention, and FIG. 4 is a direction of force caused by the difference in thermal expansion coefficient between the ceramic substrate and each insulating layer in FIG. FIG.
第３図および第４図に示すように、記号１〜５は前述し
た第一の実施例と同じであるため説明は省略する。かか
るセラミック基板１上にセラミック基板１よりも熱膨張
係数の大きい第一の絶縁層２と、熱膨張係数の小さい第
二の絶縁層３とを交互に積層し、その上に保護膜４を積
層しているため、凹方向に反りを生じる力と凸方向に反
りを生じる力が釣り合い、第一の実施例と同様に基板全
体の反りを防止することができる。As shown in FIGS. 3 and 4, symbols 1 to 5 are the same as in the first embodiment described above, and therefore their explanation will be omitted. A first insulating layer 2 having a larger coefficient of thermal expansion than the ceramic substrate 1 and a second insulating layer 3 having a smaller coefficient of thermal expansion are alternately laminated on the ceramic substrate 1, and a protective film 4 is laminated thereon. Therefore, the force that causes the warp in the concave direction and the force that causes the warp in the convex direction are balanced, and it is possible to prevent the entire substrate from warping as in the first embodiment.
以上説明したように、本発明の厚膜印刷多層配線基板は
、セラミック基板上に、このセラミック基板と比べて熱
膨張係数の大きい第一の絶縁層と熱膨張係数が小さい第
二の絶縁層とを印刷して積層することにより、反りを小
さくするとともに、印刷膜厚の均一化および部品実装の
安定性を向上させることができるという効果がある。As explained above, the thick film printed multilayer wiring board of the present invention has a first insulating layer having a larger coefficient of thermal expansion and a second insulating layer having a smaller coefficient of thermal expansion on a ceramic substrate. By printing and laminating the layers, it is possible to reduce warpage, make the printed film thickness uniform, and improve the stability of component mounting.
第１図は本発明の第一の実施例を示す厚膜印刷多層配線
基板の縦断面図、第２図は第１図におけるセラミック基
板と各地ｔ（！層の熱膨張係数の差により生じる力の方
向を示す模式図、第３図は本発明の第二の実施例を示す
厚膜印刷多層配線基板のＩａ！断面図、第４・４図は第
３図におけるセラミック基板と各絶縁層の熱膨張係数の
差により生じる力の方向を示す模式図、第５図は従来の
一例を示す厚膜印刷多層配線基板の縦断面図、第６図は
従来の他の例を示す厚膜印刷多層配線基板の縦断面図で
ある。
１・・・セラミック基板、２・・・セラミック基板より
も熱膨張係数の大きい第一の絶縁層、３・・・セラミン
ク基板よりも熱膨張係数の小さい第二の絶縁層、４・・
・保護膜、５・・・導体配線。FIG. 1 is a vertical cross-sectional view of a thick-film printed multilayer wiring board showing the first embodiment of the present invention, and FIG. FIG. 3 is a cross-sectional view of a thick film printed multilayer wiring board showing the second embodiment of the present invention, and FIGS. A schematic diagram showing the direction of force caused by the difference in coefficient of thermal expansion. Fig. 5 is a longitudinal cross-sectional view of a thick film printed multilayer wiring board showing one conventional example. Fig. 6 is a longitudinal cross-sectional view of a thick film printed multilayer wiring board showing another conventional example. 1 is a vertical cross-sectional view of a wiring board. 1... Ceramic substrate; 2... First insulating layer having a larger coefficient of thermal expansion than the ceramic substrate; 3... Second insulating layer having a smaller coefficient of thermal expansion than the ceramic board. Insulating layer, 4...
- Protective film, 5... conductor wiring.
Claims (1)
膜絶縁体等を印刷して積層する厚膜印刷多層配線基板に
おいて、前記セラミック基板上に、熱膨張係数が前記セ
ラミック基板の熱膨張係数よりも大きい第一の絶縁層と
、熱膨張係数が前記セラミック基板の熱膨張係数よりも
小さい第二の絶縁層とを積層することを特徴とする厚膜
印刷多層配線基板。In a thick-film printed multilayer wiring board in which thick-film circuit conductors, thick-film resistors, thick-film insulators, etc. are printed and laminated on a ceramic substrate, the coefficient of thermal expansion is the same as that of the ceramic substrate. 1. A thick-film printed multilayer wiring board comprising: a first insulating layer having a larger coefficient of thermal expansion; and a second insulating layer having a coefficient of thermal expansion smaller than that of the ceramic substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33481388A JPH02177391A (en) | 1988-12-27 | 1988-12-27 | Thick film printed multilayered circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33481388A JPH02177391A (en) | 1988-12-27 | 1988-12-27 | Thick film printed multilayered circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02177391A true JPH02177391A (en) | 1990-07-10 |
Family
ID=18281505
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33481388A Pending JPH02177391A (en) | 1988-12-27 | 1988-12-27 | Thick film printed multilayered circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02177391A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05175659A (en) * | 1991-12-24 | 1993-07-13 | Hitachi Ltd | Multilayer thin film wiring board and module using said board |
| US6492008B1 (en) * | 1999-10-13 | 2002-12-10 | Hitachi, Ltd. | Multilayer printed wiring board and electronic equipment |
| US7144618B2 (en) | 2002-10-09 | 2006-12-05 | Murata Manufacturing Co., Ltd. | Multilayer composite and method for preparing the same |
| CN1331375C (en) * | 2002-10-09 | 2007-08-08 | 株式会社村田制作所 | Multi-layer structure unit and its manufacturing method |
| JPWO2012157373A1 (en) * | 2011-05-16 | 2014-07-31 | 日本碍子株式会社 | Circuit board for peripheral circuit of large capacity module, and large capacity module including peripheral circuit using the circuit board |
| JP2020193896A (en) * | 2019-05-29 | 2020-12-03 | 日本特殊陶業株式会社 | Substrate for electrical inspection |
-
1988
- 1988-12-27 JP JP33481388A patent/JPH02177391A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05175659A (en) * | 1991-12-24 | 1993-07-13 | Hitachi Ltd | Multilayer thin film wiring board and module using said board |
| US6492008B1 (en) * | 1999-10-13 | 2002-12-10 | Hitachi, Ltd. | Multilayer printed wiring board and electronic equipment |
| US7144618B2 (en) | 2002-10-09 | 2006-12-05 | Murata Manufacturing Co., Ltd. | Multilayer composite and method for preparing the same |
| CN1331375C (en) * | 2002-10-09 | 2007-08-08 | 株式会社村田制作所 | Multi-layer structure unit and its manufacturing method |
| JPWO2012157373A1 (en) * | 2011-05-16 | 2014-07-31 | 日本碍子株式会社 | Circuit board for peripheral circuit of large capacity module, and large capacity module including peripheral circuit using the circuit board |
| JP6114691B2 (en) * | 2011-05-16 | 2017-04-12 | 日本碍子株式会社 | Circuit board for peripheral circuit of large capacity module, and large capacity module including peripheral circuit using the circuit board |
| JP2020193896A (en) * | 2019-05-29 | 2020-12-03 | 日本特殊陶業株式会社 | Substrate for electrical inspection |
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