JPH02164061A - Semiconductor device - Google Patents

Abstract

PURPOSE:To allow an electric charge which is electrified by ion implantation to escape after being introduced by an active region and prevent a gate oxide film or the insulating film of a capacitor from being destroyed by forming a pattern at a resist so that its pattern may adhere to the active region. CONSTITUTION:When ion implantation is performed, an active region 1 adheres directly to a resist 6 or through a spontaneous oxide film 7 to the resist 6 and an electric charge on the resist 6 which is electrified by ion implantation escapes in the substrate 9 of a semiconductor device. As the spontaneous oxide film 7, in such a case, is far weaker than insulating films of other transistors or capacitors, first it is destroyed and a leak path from the resist 6 to the substrate is formed. As a result, the electric charge on the resist 6 is introduced into the substrate 9 to prevent insulating films of the transistors or capacitors playing an important role in the semiconductor device from being destroyed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to semiconductor devices, and in particular, to an ion implantation step of a wafer process, which is a manufacturing process of a CMO5 semiconductor device.
This is used to prevent insulation film breakdown due to charge-up.

[Conventional technology]

Figure 4 is an explanatory diagram of the semiconductor device manufacturing process during conventional ion implantation.
The wiring is made of layered polysilicon.

FIG. 5 is a cross-sectional view taken along the v-v line in FIG. 4, in which %(8) is a field oxide film, (9) is a semiconductor substrate,
OQ is the gate oxide film of the transistor.

Figure 6 is a circuit diagram of Figure 5 converted into an electric circuit.
C1 is a capacitor composed of a transistor gate (3) and a substrate (9) with a gate oxide film as an insulating film, and C4 is a capacitor composed of a field oxide film (8) as an insulating film, a polysilicon wiring (4) and a semiconductor substrate ( 9).

Next, the operation will be explained.

In the step of forming the source/drain of a MOS transistor in the wafer process, impurity ions are implanted. In this case, polysilicon wiring (4) formed on the wafer is used to implant charged ions.
Also, since the transistor gate (3) is formed on an oxide film, charges cannot escape and are charged up to a positive potential.

In FIG. 6, when the insulating film thicknesses of capacitors C, C, and C are respectively d7 and d4, dx<ci4.

That is, the thickness d2 of the gate oxide film GO is much smaller than the thickness of the field oxide film (8) (usually 20 times to
).

Assuming that capacitors C0 and C4 have a positive potential V due to charge-up, the electric field E applied to the gate oxide film is: In this case, the electric field E4 applied to the field oxide film (8) is:
Since d,<d4, E, )>E.

Therefore, a much stronger electric field is applied to the gate oxide film αQ than to the field oxide film. When this electric field exceeds the dielectric breakdown voltage, the gate oxide film side is destroyed and the semiconductor device becomes defective.

[Problem to be solved by the invention]

As described above, this invention prevents breakdown of the gate oxide film of a transistor or breakdown of the insulation film of a capacitor due to charge-up in the step of implanting impurities into the source/drain of a transistor by ion implantation, which is a semiconductor device manufacturing process. This was done to prevent this.

[Means to solve the problem]

An active region used only to release charges is provided in a semiconductor device, and a pattern is formed to adhere a resist to this active region during ion implantation.

As the ion implantation progresses, the resist becomes carbonized and becomes conductive. At this time, the charge that has been charged on the resist until now is guided to this active region and escapes, preventing the gate oxide film breakdown of the transistor or the breakdown of the capacitor insulation film from occurring as in the conventional case. do.

[For production]

During ion implantation, the active region formed in the semiconductor device of this invention is bonded directly to the resist or through a thin natural oxide film, and the charge on the resist charged by the ion implantation is transferred into the semiconductor device substrate. ° Escape.

In this case, even if a natural oxide film is used, this oxide film is much weaker than the insulating films of other transistors and capacitors, so it is destroyed first. Therefore, a leak path is formed from the resist to the substrate, and the charges on the resist are guided into the substrate and destroy the insulating films of transistors and capacitors, which play an important role in semiconductor devices. Things will go away.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In FIG. 1, (1) is an active region, which does not have contact with aluminum wiring or the like or the gate of a MOS transistor when the semiconductor device becomes a product.

(2), (3), and (4) are the same as those of the prior art. (5) is a resist which is patterned so that a part of it contacts the active region (1).

2 is a sectional view taken along line 1-1 in FIG. 1.

In the figure, (6) shows a state where a part of the resist (5) is inside the active region, and (7) is a natural oxide film.
The thickness is very thin or non-existent. (8) is a field oxide film, and (9) is a semiconductor substrate.

FIG. 3 is a circuit diagram when FIG. 1 is replaced with an electric circuit when ion implantation has progressed.

In FIG. 3, C1 uses the resist (5) and the semiconductor substrate (9), whose resistance value has decreased as ion implantation progresses, as electrodes;
Field oxide film (8) and second layer polysilicon wiring (
4) between the electrodes.

C1 is the transistor gate (
3) and a semiconductor substrate (9) as electrodes and a gate oxide film.

C3 is a capacitor that uses a natural oxide film (about 20 refs (7)) as an insulating film, and a part of the resist (6) with low resistance and a semiconductor substrate (9) as electrodes.

Note that the capacitor C8 simply becomes a resistance when there is no natural oxide film (7).

In addition to the natural oxide film (7), even if there is an oxide film remaining due to etching residue of the oxide film and the film thickness is slightly thicker, it is sufficient as long as it is thinner than the gate oxide film αQ.

Next, the operation will be explained.

In FIG. 1, during ion implantation, the resist (5), the gate (3) of the transistor, and a portion of the resist (6) in the active region (1) are charged up and have a positive potential.

As the ion implantation progresses, the resist becomes conductive, and the resist (5) and transistor gate (3) become conductive.
) and a portion (6) of the resist in the active region (1) are electrically connected and can be shown in an electrical circuit as shown in FIG.

Here, when the surface of the resist is charged to a positive potential V, the electric fields applied to the insulating films of the capacitors C1, C, and C3 are respectively expressed as follows. However, d, , d21 d, is the thickness of the insulating film of each of the capacitors C1, C2, and C3.

Here, dl can be considered as the field oxide film thickness, and d2
is the gate oxide film thickness, and d3 is the natural oxide film twist.

Therefore, since d, > d, and d3, the electric field satisfies El < E2 < Es.

Therefore, when the charge-up progresses and the level of the potential V rises due to ion implantation, the first thing that exceeds the dielectric breakdown voltage (10 MeV/an) of the oxide film is E.
It is a capacitor C, which is subjected to an electric field of 3.

- If the oxide film of capacitor C8 is destroyed, the charge on the resist surface will be transmitted through capacitor C3,
Since it flows to the semiconductor substrate (9), the potential V decreases.

Therefore, the insulating film of the capacitor C2, ie, the gate oxide film αQ, is not destroyed.

Furthermore, if there is no natural oxide film (7) at all, the capacitor C2 turns into a resistor, and the charge on the resist escapes to the semiconductor substrate (9) through this resistor. No destruction will occur.

Furthermore, if the insulating film thickness of capacitor C8 is thinner than the film thickness of gate oxide film αQ, capacitor C3 will be destroyed first, so even if a thin oxide film remains in addition to the natural oxide film (7), this The prevention method works.

Next, charge-up destroys not only the gate oxide film αQ of the transistor but also the oxide film between the electrodes of the capacitor element on the semiconductor device, but in this case too, the capacitor element is completely covered with resist. By bringing a part of the resist into contact with the active region (1) as shown in FIG. 1, destruction can be prevented.

〔Effect of the invention〕

As described above, according to the present invention, in the ion implantation process that is a semiconductor device manufacturing process, M
(OS) It is possible to prevent breakdown of the gate oxide film of the transistor and breakdown of the insulating film of the capacitor.

[Brief explanation of the drawing]

Fig. 1 is a plan view of a semiconductor device according to an embodiment of the present invention, the second cause is a cross-sectional view taken along the line -1 in Fig. 1, and Fig. 3 shows that ion implantation progresses and the resist becomes conductive. Fig. 1 is an equivalent circuit diagram when the situation becomes like this, Fig. 4 is a plan view of a conventional semiconductor device, and Fig. 5 is an equivalent circuit diagram taken along the v-V line in Fig. 4.
FIG. 6 is an equivalent electrical circuit diagram during the ion implantation process of FIG. 4. In the figure, (1) is an active region that does not have wiring or contacts on elements or gates of transistors, (2) is an active region, (
3) is the gate of the MOS transistor, (4) is the polysilicon wiring, (5) is the resist, and (6) is the active region (1).
Part of the resist (5) provided therein, (7) is a natural oxide film, (8) is a field oxide film, (9) is a semiconductor substrate, and αQ is a gate oxide film. Also, C,,C,,C
8 indicates a capacitor. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] It has an N-type or P-type active region that does not have contact with wiring such as Al wiring or contact with elements inside the semiconductor device, and in the ion implantation process that is the semiconductor device manufacturing process, the charge on the resist or the semiconductor device The charge on the element is
A semiconductor device characterized in that the increased charge is released to the active region by the means for guiding it to the active region.