JPH02163953A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a package, for high power consumption use, where a heat sink for heat-dissipation use can be assembled at its inside by a method wherein a frame where a semiconductor integrated circuit chip has been mounted and a frame for heat-sink use are resin-sealed and molded in a state that they are overlapped partially. CONSTITUTION:The following are provided: a frame 3 where a semiconductor integrated circuit chip 2 has been mounted, a frame 17, for heat-sink use, playing a role to dissipate heat of the integrated circuit chip 2. The frame 3 and the frame 17 for heat-sink use are resin-sealed and molded 15 in a state that they are overlapped partially. For example, a frame part of a lead frame where a semiconductor integrated circuit chip 2 has been mounted and a frame part 18 of a lead frame 16 for heat-sink use are formed to be of an identical size. Then, a positioning pin installed at a lower metal mold of a molding metal mold is inserted into a hole 19 for positioning use of the lead frame ]6 for heat-sink use and into a hole for positioning use of the lead frame; a positioning operation is executed. After that, a sealing resin 15 is injected into a cavity of the molding lower metal mold; a semiconductor device whose outer package has been treated is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a resin-sealed package for semiconductor integrated circuits.

[Conventional technology]

A conventional semiconductor device will be explained with reference to the drawings. FIG. 2 is a perspective view showing a semiconductor integrated circuit chip mounted on a lead frame before resin sealing. In FIG. 1, 1 is the lead frame, 2 is the semiconductor integrated circuit chip, and 3 is this semiconductor integrated circuit. die pad for placing chip 2;
4 is a lead frame frame, 5 is an external lead, 6 is an internal lead, 7 is a tie bar, 8 is a positioning hole for positioning a mold, etc., 9 is a semiconductor integrated circuit chip 2
This is a thin metal wire that connects the electrode 2a provided above and the internal lead 6.

FIG. 3 is a perspective view showing the lower mold of the mold, and 10
11 is a positioning pin for positioning by inserting the positioning hole 8 of the lead frame, and 11 is a runner 12 through which the sealing resin flows, the viscosity of the sealing resin when it enters the cavity 13 from the runner 10. A gate for control, 13 a cavity for injecting sealing resin and molding into a predetermined shape, and 14 a lower mold of the mold.

FIG. 8 is a perspective view showing the semiconductor integrated circuit package after being sealed with resin, and 15 is the sealing resin.

FIG. 9 is a perspective view of the semiconductor integrated circuit package after it has been processed into a final shape from the state shown in FIG. 8.

FIG. 10 is a sectional view taken along the line X--X in FIG. 9.

Next, the manufacturing process of the semiconductor integrated circuit package will be explained. First, as shown in FIG. 2, after placing and fixing the semiconductor integrated circuit chip 2 on the Guibad 3 of the lead frame 1, the electrodes 2a provided on the chip 2 and the internal leads 6 are connected using thin metal wires 9. . Thereafter, the runner 11 is placed on the lower die 14 of the mold shown in FIG. 3 and clamped with the upper die (not shown). Gate 12. A sealing resin 15 is injected into the cavities 13 in order to seal them with the resin. As a result, a semiconductor integrated circuit package shown in FIG. 8 is produced.

FIG. 9 is shown after further necessary exterior treatment.

Processing is completed as shown in Figure 1O.

[Problem to be solved by the invention]

Conventional semiconductor integrated circuit packages are refined by resin-sealing one type of lead frame as described above, so it is extremely difficult to incorporate a heat sink for heat dissipation inside, and high power consumption is required. It was unsuitable for use as a semiconductor package.

This invention was made to solve the above-mentioned problems, and aims to provide a package for high power consumption that can incorporate a heat sink for heat radiation inside.

[Means to solve the problem]

A semiconductor device according to the present invention includes a frame on which a semiconductor integrated circuit chip is mounted, and a heat sink frame that plays a role of dissipating heat from the integrated circuit chip, and the frame and the heat sink frame are partially overlapped. It is molded with resin sealing.

[Effect]

The semiconductor device according to the present invention includes a heat sink by sealing and molding a plurality of lead frames at the same time, thereby increasing the heat dissipation effect.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
1 is a perspective view of a lead frame for a heat sink used in the semiconductor device of this embodiment.
6 is a lead frame for a heat sink, 17 is a frame for a heat sink, 18 is a frame portion, and 19 is a hole for a positioning bin for positioning in a mold. Figure 2 is the first
FIG. 3 is a perspective view showing a lead frame equipped with a semiconductor S integrated circuit chip that is resin-sealed and molded overlapping the lead frame for the heat sink shown in the figure, and FIG. 3 is a perspective view showing the lower die of the molding die. In one figure, 1 to 14 are the same as those explained in the conventional example, and the explanation thereof will be omitted.

In this embodiment, the frame portion 4 of the lead frame 1 on which the semiconductor integrated circuit chip 2 is mounted and the frame portion 18 of the heat sink lead frame 16 are formed to have the same size. Then, positioning is performed by inserting the positioning pin hole 19 of the heat sink frame 1 and the positioning pin hole 8 of the lead frame 1 into the positioning pin IO provided on the lower die 14 of the mold die shown in FIG. 3. Thereafter, a sealing resin 15 is inserted into the cavity 13 of the lower mold 14 and an exterior treatment is performed to obtain the semiconductor device shown in FIG. 4. FIG. 5 shows a sectional view taken along the line V-V in FIG. 4, and the heat sink frame 17 can be incorporated into the semiconductor device by a simple method.

Furthermore, a heat sink frame of any shape, size, and material can be included in the package, and can be widely used for semiconductor packages for high power consumption.

That is, as shown in FIG. 6, the heat sink frame 20
A part of the semiconductor package may be exposed outside the semiconductor package.
Furthermore, as shown in FIG. 7, a heat sink frame 21 may be installed on the semiconductor integrated circuit chip 1 side.Furthermore, the effect will be enhanced if the heat sink frame is shaped to increase the heat dissipation area and is made of a material with high thermal conductivity. .

〔Effect of the invention〕

As described above, according to the present invention, a plurality of lead frames are encapsulated with a heat sink by resin sealing molding at the same time, so that a package with high heat dissipation effect can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a perspective view of a lead frame for a sink used in a semiconductor device according to an embodiment of the present invention, FIG. 2 is a perspective view of a lead frame on which a semiconductor integrated circuit chip is mounted, and FIG. 3 is a resin sealing lead frame. FIG. 4 is a perspective view showing the lower die of the molding die, FIG. 4 is a perspective view of the semiconductor device according to the above embodiment, and FIG.
The figures are a cross-sectional view taken along line 4--v, FIG. 6 is a cross-sectional view of a semiconductor device showing another embodiment of the present invention, FIG. 7 is a cross-sectional view showing a semiconductor device of another embodiment, and FIG. 9 is a perspective view showing the state of a lead frame of a conventional semiconductor device, FIG. 9 is a perspective view of the conventional semiconductor device, and FIG. 1θ is a sectional view taken along the line X--X in FIG. In the figure, 1 is a lead frame, 2 is a semiconductor integrated circuit chip, 3 is a guide pad, 4 is a lead frame frame, 5 is an external lead, 6 is an internal lead, 7 is a tie bar, 8.19
is a hole for a positioning bottle, 9 is a thin metal wire, IO is a positioning bottle, 11 is a runner, 12 is a gate, 13 is a cavity, 14 is a lower mold of a mold, 15 is a sealing resin, 16 is a lead frame for a heat sink, 17, 20, and 21 are heat sink frames, and 18 is a frame portion. Note that the same reference numerals in the figures indicate the same or equivalent parts. Fig. 2 1 Reet Tsushima 2 also eye 4 field contribution total - 〇1 1μb 39゛irPJ'' -b j9: 4 fraud 19° Igo!, J5,; Hata bi > E016 Figure 3 Figure 4 Figure 6 Eggplant heat 7 Shi -mu Figure 5 1'''? Figure 7 Heat Σ'71! One Figure 8 Figure 9

Claims (1)

[Claims] A semiconductor device comprising a frame on which a semiconductor integrated circuit chip is mounted, and a heat sink frame that plays a role of heat dissipation for the integrated circuit chip, the frame and the heat sink frame being partially overlapped and molded with resin sealing. .