JPH02162776A - Photosensor - Google Patents

Photosensor

Info

Publication number
JPH02162776A
JPH02162776A JP63317673A JP31767388A JPH02162776A JP H02162776 A JPH02162776 A JP H02162776A JP 63317673 A JP63317673 A JP 63317673A JP 31767388 A JP31767388 A JP 31767388A JP H02162776 A JPH02162776 A JP H02162776A
Authority
JP
Japan
Prior art keywords
depletion layer
silicon substrate
bias
measuring light
zonal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63317673A
Other languages
Japanese (ja)
Inventor
Toshio Saito
俊夫 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP63317673A priority Critical patent/JPH02162776A/en
Publication of JPH02162776A publication Critical patent/JPH02162776A/en
Pending legal-status Critical Current

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  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To improve a photosensor of this design in sensitivity to measuring light rays of short wavelength and to easily modify it in a spectrum sensitive property by a method wherein the measuring light rays are converted through a spectrum sensitive property set by a control means and a photocurrent flowing through a bias electrode is outputted. CONSTITUTION:As the width of P-type layers 21 and 22 is set small enough, depletion layers occurred between the layers 21 and 22 and a silicon substrate 20 are brought into contact with each other to form a zonal depletion layer 35 when a bias voltage EB is made large. In this case, when a channel 36 is formed above the zonal depletion layer 35 by regulating a control voltage EC further, the zonal depletion layer 35 is made to move equivalently downward, so that measuring light ML of short wavelength is made to attenuate before it reaches to the zonal depletion layer 35 and only the optical energy of the measuring light ML of comparatively long wavelength is trapped in the zonal depletion layer 35 and detected as a photocurrent ic.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は、測定光を受光して電気信号に変換す企ホトセ
ンサに係り、特にこの変換特性を変更することができる
ようにすると共に短波長側の感度を向上させるように改
良されたホトセンサに関する。
[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a photo sensor that receives measurement light and converts it into an electrical signal, and in particular, it is designed to be able to change the conversion characteristics and to convert it into an electric signal. The present invention relates to a photosensor improved to improve side sensitivity.

〈従来の技術〉 第5図は従来のホトセンサの構成の概要を示す縦断面図
である。
<Prior Art> FIG. 5 is a vertical cross-sectional view showing an outline of the configuration of a conventional photosensor.

10は低濃度にドープされたN形のシリコン基板であり
、この中の測定光M Lを受光する受光面11を含んで
高濃度にドープされたP形層12が形成されている。
Reference numeral 10 denotes a lightly doped N-type silicon substrate, on which a heavily doped P-type layer 12 is formed, including a light-receiving surface 11 that receives measurement light M L.

シリコン基板10とP形[12の上には透明な層間膜と
して酸化膜(S10z)13が形成されている。
An oxide film (S10z) 13 is formed as a transparent interlayer film on the silicon substrate 10 and the P type [12].

更に、この酸化膜13の上は受光面11の部分を除いて
PSG(リンガラス層)などのパシベーションwA14
で覆われている。P形層12は電極15と接合され、こ
の電極15とシリコン基板10との間には負荷抵抗RL
を介して電源Eから逆バイアスされている。この状態で
はPm層12とシリコン基板10との間には空乏層16
が形成されている。
Furthermore, on this oxide film 13, a passivation wA14 such as PSG (phosphor glass layer) is applied except for the light receiving surface 11.
covered with. The P-type layer 12 is connected to an electrode 15, and a load resistance RL is connected between the electrode 15 and the silicon substrate 10.
It is reverse biased from power supply E via. In this state, there is a depletion layer 16 between the Pm layer 12 and the silicon substrate 10.
is formed.

以上の構成により、受光面11を介してシリコン基板1
0に形成された空乏層16に測定光MLが人身(される
とこの空乏層の中の電子はエネルギを得て負荷抵抗RI
に測定光MLに対応する光電流1を流す。
With the above configuration, the silicon substrate 1
When the measurement light ML is applied to the depletion layer 16 formed in the
A photocurrent 1 corresponding to the measurement light ML is caused to flow.

〈発明が解決しようとする課題〉 しかしながら、このような従来のホトセンサは光の吸収
係数との関係から接合厚!の小さい浅い接合はど短波長
側の感度が向上することが知られているので、浅い接合
で短波長側の感度を向上させる試みがなされ来たが、こ
れも浅い接合を作るときに生じる格子欠陥などによる限
界がある。
<Problem to be solved by the invention> However, such conventional photosensors have problems with the bonding thickness due to the relationship with the light absorption coefficient! It is known that a shallow junction with a small value improves the sensitivity on the short wavelength side, so attempts have been made to improve the sensitivity on the short wavelength side with a shallow junction. There are limitations due to defects, etc.

また、短波゛長側では測定光MLがシリコン基板10に
入射されて直ぐ吸収されるので、感度のある空乏層16
まで測定光M L、が侵入できず、jit4造的に短波
長側の感度を向上させるには不利なS遺となっている。
Furthermore, on the short wavelength side, the measurement light ML enters the silicon substrate 10 and is absorbed immediately, so the sensitive depletion layer 16
The measurement light ML cannot penetrate up to this point, which is disadvantageous for improving the sensitivity on the short wavelength side from a structural point of view.

く課題を解決するための手段〉 本発明は、以上の課題を解決するために、低濃度の不純
物を含むシリコン基板と、このシリコン基板の上に測定
光を受光する受光面を挟んで不純物の注入により形成さ
れた高濃度の一対のバイアス電極と、シリコン基板の受
光面の上に形成された透明電極と、シリコン基板に対し
てバイアス電極を逆バイアスに保持するバイアス手段と
、シリコン基板に対して透明電極の電位を制御する制御
手段とを具備し、測定光を制御手段により設定された分
光感度特性で変換してバイアス電極に流れる光電流を出
力するようにしたものである。
Means for Solving the Problems> In order to solve the above problems, the present invention provides a silicon substrate containing a low concentration of impurities, and a light-receiving surface for receiving measurement light placed on the silicon substrate. A pair of high-concentration bias electrodes formed by implantation, a transparent electrode formed on the light-receiving surface of the silicon substrate, a bias means for holding the bias electrodes at a reverse bias with respect to the silicon substrate, and and a control means for controlling the potential of the transparent electrode, and converts the measurement light according to the spectral sensitivity characteristics set by the control means, and outputs a photocurrent flowing through the bias electrode.

く作 用〉 シリコン基板の受光面に光が入射されてもその表面に空
乏層が形成されているので、短波長の測定光に対する感
度が向上し、更に透明電極の電位を制御することにより
分光感度特性を容易に変更することができる。
Even when light is incident on the light-receiving surface of the silicon substrate, a depletion layer is formed on the surface, which improves the sensitivity to short-wavelength measurement light, and furthermore, by controlling the potential of the transparent electrode, spectroscopic Sensitivity characteristics can be easily changed.

〈実施例〉 以下0本発明の実施例について図面を用いて説明する。<Example> Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の1実施例の構成を示す縦断面図である
FIG. 1 is a longitudinal sectional view showing the configuration of one embodiment of the present invention.

不純物で低濃度にドープされたN形のシリコン基板20
の上に高濃度にドープされたP形層21.22が形成さ
れている。これ等のP形Jii21と22の間は幅がW
の受光面23となっている。更に、シリコン基板20の
上面には高濃度にドープされたN形層24が形成されて
いる。
N-type silicon substrate 20 lightly doped with impurities
A heavily doped P-type layer 21,22 is formed over the . The width between these P-type Jii21 and 22 is W
This serves as a light receiving surface 23. Further, a heavily doped N-type layer 24 is formed on the upper surface of the silicon substrate 20.

これ等の表面は熱酸化IB!25で覆われ、受光面23
に対応する熱酸化WA25の上部には透明電極26が形
成されている。これ等の熱酸化膜25、透明型&26は
干渉及び吸収などの光学的影響が小さくなるような配慮
がなされている。
These surfaces are thermally oxidized IB! 25, the light receiving surface 23
A transparent electrode 26 is formed on the top of the thermally oxidized WA 25 corresponding to . These thermal oxide films 25 and transparent type &26 are designed to reduce optical effects such as interference and absorption.

透明″j:b41i26と熱酸化膜25の上には層間膜
として酸化tl! (S t 02 ) 27が形成さ
れ、更にこの上にはPSGなどのパシベーション膜28
が形成されている。
An oxide tl! (S t 02 ) 27 is formed as an interlayer film on the transparent "j:b41i 26 and the thermal oxide film 25, and a passivation film 28 such as PSG is further formed on this.
is formed.

これ等の酸化WA27とパシベーションWA28は透明
Th極26にまで開[1する直径dの開口部29が形成
され、更にP形層21と22、N形層24とそれぞれ接
合されるアルミニウムの電極30.31.32が熱酸化
膜25、酸化fi!27、パシベーション膜28を介し
て接合されている。
These oxidized WA 27 and passivation WA 28 are opened to the transparent Th electrode 26, and an opening 29 with a diameter d is formed, and an aluminum electrode 30 is further bonded to the P-type layers 21 and 22 and the N-type layer 24, respectively. .31.32 is the thermal oxide film 25, oxidized fi! 27, and are bonded via a passivation film 28.

また、透明電極26と接合されるアルミニウムのt極3
3が酸化膜27、パシベーション膜28を介して接合さ
れている。
Also, the aluminum t-pole 3 connected to the transparent electrode 26
3 are bonded via an oxide film 27 and a passivation film 28.

シリコン基板20に対してP形層21.22は、バイア
ス電圧EBが負荷抵抗RLと電極30.31を介して弱
く逆バイアスに印加されている。更に、透明電極26に
は制限抵抗RCと電極33を介して制御電圧ECが印加
されている。
A bias voltage EB is applied to the P-type layer 21.22 with a weak reverse bias through the load resistor RL and the electrode 30.31 with respect to the silicon substrate 20. Further, a control voltage EC is applied to the transparent electrode 26 via a limiting resistor RC and an electrode 33.

以上の構成により、第2図に示すように受光面23には
制御電圧ECによる逆バイアスで空乏層34が形成され
る。
With the above configuration, as shown in FIG. 2, a depletion layer 34 is formed on the light receiving surface 23 by reverse bias using the control voltage EC.

従って2測定光MLが開口部29を介して受光面23に
入射されると、ただちに受光面23のごく表面に形成さ
れた空乏層34で短波長が吸収されて光電流tcとして
効率良く検出される。
Therefore, when the second measurement light ML enters the light-receiving surface 23 through the aperture 29, short wavelengths are immediately absorbed by the depletion layer 34 formed on the very surface of the light-receiving surface 23 and efficiently detected as photocurrent tc. Ru.

第3図は第1図に示す実施例の他の動作を示す説明図で
ある。
FIG. 3 is an explanatory diagram showing another operation of the embodiment shown in FIG. 1.

P形層21と22の幅Wは充分小さく選定されているの
で、バイアス電圧E、を大きくすると各P形層21.2
2とシリコン基板20との間にできる空乏層が第3図に
示すように接触したゾーン空乏層35を形成する。この
場合に、さらに制御電圧ECを調節することによりこの
ゾーン空乏層35の上部にチャネル36を形成させると
、ゾーン空乏層35が等価的に下方に移動することにな
り、測定光MLのうち短波長のものはこのゾーン空乏j
ii35に達する前に減衰し、比較的長波長の測定光M
Lの光エネルギのみがゾーン空乏層35に捕らえられ光
電流i(Hとして検出される。
Since the width W of the P-type layers 21 and 22 is selected to be sufficiently small, when the bias voltage E is increased, each P-type layer 21.2
The depletion layer formed between 2 and the silicon substrate 20 forms a contact zone depletion layer 35 as shown in FIG. In this case, if a channel 36 is formed above the zone depletion layer 35 by further adjusting the control voltage EC, the zone depletion layer 35 will equivalently move downward, and the The wavelength is this zone depletion j
The measurement light M is attenuated before reaching ii35 and has a relatively long wavelength.
Only the light energy of L is captured by the zone depletion layer 35 and detected as a photocurrent i (H).

第4図は本発明による測定光の波長と相対感度Sとの関
係を示す特性図である。
FIG. 4 is a characteristic diagram showing the relationship between the wavelength of measurement light and the relative sensitivity S according to the present invention.

横軸は測定光M t、の波長λ(nm)を示し、縦軸は
相対感度Sを示している0曲線C1は第1図に示す特性
、曲線C2は第5図に示す特性、曲線C3は第3図に示
すようにゾーン空乏層を移動させたときの特性をそれぞ
れ示している。
The horizontal axis shows the wavelength λ (nm) of the measurement light Mt, and the vertical axis shows the relative sensitivity S. Curve C1 has the characteristics shown in FIG. 1, curve C2 has the characteristics shown in FIG. 5, and curve C3 3 shows the characteristics when the zone depletion layer is moved, respectively.

以J−の特性かられかるように、本発明によれば短波長
側の相対感度Sを制御電圧Ecを調節することによりΔ
Sの範囲に変更することができるので、測定光MLに対
する分光特性を変更することができる。
As can be seen from the characteristics below, according to the present invention, the relative sensitivity S on the short wavelength side can be adjusted by adjusting the control voltage Ec.
Since it is possible to change the range of S, the spectral characteristics for the measurement light ML can be changed.

〈発明の効果〉 以上、実施例と共に具体的に説明したように本発明によ
れば、短波長側の相対感度を向上させることができると
共に受光面に設けられた透明電極の電位を調節すること
により、測定光に対する分光感度特性を変更することが
できる。更に、受光面に不純物などの拡散を行わないの
で、製造プロセス中に生じる結晶欠陥などが少なく、暗
電流を極めて少なくすることができる。
<Effects of the Invention> As specifically explained above in conjunction with the examples, according to the present invention, the relative sensitivity on the short wavelength side can be improved and the potential of the transparent electrode provided on the light receiving surface can be adjusted. Accordingly, the spectral sensitivity characteristics with respect to the measurement light can be changed. Furthermore, since impurities and the like are not diffused into the light-receiving surface, there are few crystal defects that occur during the manufacturing process, and dark current can be extremely reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の1実施例の構成を示す縦断面図、第2
図は第1図に示す実施例の動作を説明する説明図、第3
図は第1図に示す実施例の他の動作を示す説明図、第4
図は本発明による測定光の波長と相対感度Sとの関係を
示す特性図、第5図は従来のホトセンサの構成を示す縦
断面図である。 10・・・シリコン基板、11・・・受光面、12・・
・P形層、14・・・パシベーション膜、16・・・空
乏層、20・・・シリコン基板、21.22・・・P形
層、23・・・受光面、24・・・N形層、26・・・
透明電極、28・・・パシベーション膜、29・・・開
[1部、34・・・空乏層、35・・・ゾーン空乏層、
36・・・チャネル、ML・・・測定光、EC・・・制
御電圧。 真1図 第2図 34会乏層
FIG. 1 is a vertical sectional view showing the configuration of one embodiment of the present invention, and FIG.
The figures are explanatory diagrams explaining the operation of the embodiment shown in Fig. 1, and Fig. 3.
The figures are explanatory diagrams showing other operations of the embodiment shown in Fig. 1;
The figure is a characteristic diagram showing the relationship between the wavelength of measurement light and the relative sensitivity S according to the present invention, and FIG. 5 is a longitudinal cross-sectional view showing the configuration of a conventional photosensor. 10... Silicon substrate, 11... Light receiving surface, 12...
・P-type layer, 14... Passivation film, 16... Depletion layer, 20... Silicon substrate, 21.22... P-type layer, 23... Light-receiving surface, 24... N-type layer , 26...
Transparent electrode, 28... Passivation film, 29... Open [1 part, 34... Depletion layer, 35... Zone depletion layer,
36... Channel, ML... Measurement light, EC... Control voltage. True 1 figure 2 figure 34 poor class

Claims (1)

【特許請求の範囲】[Claims] 低濃度の不純物を含むシリコン基板と、このシリコン基
板の上に測定光を受光する受光面を挟んで不純物の注入
により形成された高濃度の一対のバイアス電極と、前記
シリコン基板の受光面の上に形成された透明電極と、前
記シリコン基板に対して前記バイアス電極を逆バイアス
に保持するバイアス手段と、前記シリコン基板に対して
前記透明電極の電位を制御する制御手段とを具備し、前
記測定光を前記制御手段により設定された分光感度特性
で変換して前記バイアス電極に流れる光電流を出力する
ことを特徴とするホトセンサ。
A silicon substrate containing a low concentration of impurities, a pair of high concentration bias electrodes formed by implanting impurities on this silicon substrate with a light receiving surface for receiving measurement light sandwiched therebetween, and a transparent electrode formed on the silicon substrate; bias means for maintaining the bias electrode at a reverse bias with respect to the silicon substrate; and control means for controlling the potential of the transparent electrode with respect to the silicon substrate; A photosensor characterized in that it converts light according to spectral sensitivity characteristics set by the control means and outputs a photocurrent flowing through the bias electrode.
JP63317673A 1988-12-16 1988-12-16 Photosensor Pending JPH02162776A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63317673A JPH02162776A (en) 1988-12-16 1988-12-16 Photosensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63317673A JPH02162776A (en) 1988-12-16 1988-12-16 Photosensor

Publications (1)

Publication Number Publication Date
JPH02162776A true JPH02162776A (en) 1990-06-22

Family

ID=18090750

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63317673A Pending JPH02162776A (en) 1988-12-16 1988-12-16 Photosensor

Country Status (1)

Country Link
JP (1) JPH02162776A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007103591A (en) * 2005-10-03 2007-04-19 Seiko Instruments Inc Cmos image sensor
JP2012037526A (en) * 2003-06-17 2012-02-23 Microsoft Corp Methods and devices for improved charge management for three-dimensional and color sensing

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012037526A (en) * 2003-06-17 2012-02-23 Microsoft Corp Methods and devices for improved charge management for three-dimensional and color sensing
JP2012049547A (en) * 2003-06-17 2012-03-08 Microsoft Corp Method and device for charge management for three-dimensional and color sensing
JP2007103591A (en) * 2005-10-03 2007-04-19 Seiko Instruments Inc Cmos image sensor

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