JPH02162758A - Lsi provided with measuring circuit and measurement of toggle frequency thereof - Google Patents

Abstract

PURPOSE:To enable the toggle frequency of basic elements to be outputted as being reduced and to dispense with a high frequency device by a method wherein a ring oscillator is composed of the basic elements connected in multiple stages and the output pulses of the ring oscillator are counted only proportional to the duty ratio of a clock signal outputted from the outside. CONSTITUTION:A ring oscillator is composed of basic elements connected in five stages and starts oscillating through self-excitation. The output pulse of the ring oscillator is inputted into a reset signal generating circuit 4, and the circuit 4 outputs a shot of the reset signal synchronizing with the output pulse of the ring oscillator 1 just after a voltage applied to a clock terminal CLK changes from a logic level 'H' to a logic level 'L' to a reset end R of an n-stage counter 2. The n-stage counter 2 clears the data of output terminals Qn, Qn-1, -Q1 when the reset end R receives the reset signal and counts the output pulse of the ring oscillator 1 while the voltage of the clock terminal CLK is kept at a level of 'H' when the reset signal is applied to an enable end EN and outputs to the output terminal on, Qn-1, -Q1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an LSI and its toggle frequency measurement method.

[Conventional technology]

Conventionally, an LSI has been provided with a ring oscillator for measurement, and the oscillation frequency of the ring oscillator has been manually measured using a measuring instrument such as a high-frequency frequency counter or a spectrum analyzer.

[Problem to be solved by the invention]

The conventional LSI and its toggle frequency measurement method described above cannot use a commonly used general-purpose LSI tester because the toggle frequency handled is high, and requires expensive measuring equipment or requires a general-purpose LSI tester. When used, a high frequency compatible probe and probe card are required.
It has the drawbacks of being uneconomical and not easy to use.

(Means for solving problems) The LSI with measurement circuit of the present invention is A ring oscillator with basic elements connected in multiple stages.

A reset signal generation circuit that outputs a reset pulse in synchronization with an output pulse of a ring oscillator immediately after an externally supplied clock signal changes from a first logic level to a second logic level, and a reset pulse is output. a counter that resets the count result when the clock signal is at a first logic level; and a counter that resets the count result when the clock signal goes from the first logic level to a second logic level; It has a latch circuit that latches.

The toggle frequency measurement method using this LSI with measurement circuit is as follows:
A clock signal with a predetermined duty ratio is supplied to the LSI with measurement circuit according to claim 1, and the LSI with measurement circuit according to claim 1
The toggle frequency related to the basic element of the ring oscillator is calculated from the output of the latch circuit.

[Effect]

The output pulses of the ring oscillator are counted inside the LSI with a measurement circuit, the count results are output in accordance with the frequency of the clock signal, and the toggle frequency of the basic elements of the ring oscillator is calculated outside the LSI with the measurement circuit. .

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an LSI with a measurement circuit according to the present invention.

In addition to the normal circuit, this embodiment has a ring oscillator, 1.0 stage counter, 2, 0 stage latch, 3. It has a measurement circuit consisting of a reset signal generation circuit 4.

The measurement circuit is formed so as to be able to simulate the characteristics of a normal circuit formed on the same substrate. The ring oscillator l is formed of five stages of basic elements and automatically oscillates. The reset signal generation circuit 4 inputs the output pulse of the ring oscillator 1, and changes the voltage applied to the clock terminal CLK from a logic level high (hereinafter referred to as "H") to a logic level low (hereinafter referred to as "L"). A one-shot reset signal is output to the reset terminal R of the 0-stage counter 2 in synchronization with the output pulse of the ring oscillator 1 immediately after that.

When the reset $R inputs a reset signal, the 0-stage counter 2 clears the data at the output terminals Qn+, Qn-1+~, and Ql, and the clock terminal CL applied to the enable terminal.
While the voltage at is "H", the output pulses of the ring oscillator 1 are counted and output to the output terminals Qn, Q, . . . , q1. 0 stage latch 3 has input terminal 04, I Dy1-1
r~*D+ is the output end Q. +Qn-1n~+Ql
are connected to the output terminals DDn, DD, 1-, respectively.

~, DO, are the external terminals T, , Tn-, , respectively.
It is connected to ~, T, and latches the potential of the input terminal On, D,,, ~, DI at the falling edge of the voltage of the clock @C, and outputs the output terminal DD,, DD,, -,, ~, [l
Output to o.

Therefore, the toggle frequency of one basic element of the ring oscillator 1 is reduced by the ring oscillator 1 to the frequency divided by the number of basic elements making up the ring oscillator 1 x 2, and the duty cycle of the pulse applied to the clock terminal is The outer end 'fTo, To-
, , ~+TI.

Next, measurement of the toggle frequency in the embodiment shown in FIG. 1 will be explained.

FIG. 2 is a block diagram showing the measurement method, and FIG. 3 is a timing chart showing the operation in the measurement of FIG.

When clock signal S (1 rises at time 1.
starts counting from time t2. When the clock signal SCK falls at time t3, the 0 stage latch 3 starts the 0 stage counter 2.
Turn on the output. Ring oscillator 1 at time L4
In synchronization with the rising edge of the output S1, the reset signal generator 4
resets the reset signal S2 to reset the 0-stage counter 2 +4%
Output to R. Therefore, the output of 0 stage counter 2 @Qn
, Qn-, . . . The outputs of Ql are cleared. When clock signal SC+C rises again at time L5, time t1
Repeat the same action as from.

(Effects of the Invention) As explained above, the measurement circuit LSI of the present invention is formed of a basic element in which ring oscillators are connected in multiple stages, and the output pulse of the ring oscillator is converted into an external clock signal in proportion to the duty ratio. By counting by the number of minutes, the toggle frequency of the basic element can be reduced and output, and the original toggle frequency can be calculated from this reduced frequency, which is economical and easy to use without requiring a high frequency device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the measurement circuit bone LSI of the present invention, FIG. 2 is a block diagram showing the measurement method of the embodiment of FIG. 1, and FIG. 3 is the operation in the measurement of FIG. 2. It is a time chart showing. 1--ring oscillator, 2--n stage counter, 3... n-stage latch, 4... reset signal generation circuit, 5... general-purpose LSI tester.

Claims (1)

[Claims] 1. A ring oscillator in which basic elements are connected in multiple stages, and synchronized with the output pulse of the ring oscillator immediately after the clock signal supplied from the outside changes from the first logic level to the second logic level. a reset signal generation circuit that outputs a reset pulse when the reset pulse is output; a counter that resets the count result when the reset pulse is output and counts the output pulses of the ring oscillator when the clock signal is at a first logic level; An LSI with a measurement circuit including a latch circuit that latches the count result of a counter when the logic level changes from the first logic level to the second logic level. 2. Supplying a clock signal with a predetermined duty ratio to the LSI with a measurement circuit according to claim 1;
A toggle frequency measurement method that calculates the toggle frequency related to the basic elements of a ring oscillator from the output of the SI latch circuit.