JPH02161793A - Multi-layer wiring substrate - Google Patents

Abstract

PURPOSE:To improve adhesion properties of a conductor pattern and ease manufacturing by forming an upper-part conductor pattern consisting of Cu or Au on the uppermost insulation layer with W as a main constituent through an adhesion layer and by making connection to a copper lower-part conductor pattern through a via hole of the insulation layer. CONSTITUTION:In a multi-layer wiring substrate 21, a conductor pattern 3 is formed of Cu on an alumina substrate 2 and a glass insulation layer 4 is formed on it. After forming a conductor pattern 5 on the layer 4, an insulation layer 6 is formed and a conductor pattern 23 is formed on the insulation layer 6. The pattern 23 is composed of a resistance pattern 8, an adhesion layer 22 consisting mainly of W, and a conductor layer 10 consisting of Cu or Au. Thus, W of the layer 22 improves adhesion properties with Cu or Au of the pattern 23, is provided with resistance against etchant of strong alkali, and eases manufacture.

Description

[Detailed Description of the Invention] [Summary] In order to facilitate the manufacture of multilayer wiring boards used in highly integrated hybrid integrated circuits, high-speed hybrid integrated circuits, etc., via holes in the uppermost insulating layer have been developed. An upper conductor pattern made of copper or gold is connected to the lower copper conductor pattern formed under the insulating layer through the insulating layer, and an adhesion layer mainly composed of tungsten is formed on the medium. Further, the adhesive layer contains 1 to 5% titanium in tungsten.

[Industrial Field of Application] The present invention relates to a multilayer wiring board used in highly integrated hybrid integrated circuits used to miniaturize devices and high-speed hybrid integrated circuits that require low resistance conductors and high precision resistance elements.

C. Conventional technology] As a method for reducing the resistance of a conductor pattern and forming a high-precision thin film resistor element on the same substrate, a thick film pattern of Cu and A
There is a method of multi-layering U or Cu thin film patterns in a hybrid manner, and in conventional multilayer wiring boards, the thin film conductor pattern formed on the top layer is NiCr/Au, Cr/Au, with NiCr or Cr as an adhesion layer. The structure was Cr/Cu.

Generally, the thin film conductor pattern is connected to the Cu lower conductor through a via hole formed in a glassy insulating layer.
After depositing a NiCr thin film or Cr thin film as an adhesion layer and laminating an Au thin film or Cu thin film as a conductive layer, they are etched into a desired pattern. The exposed portion of the lower conductor pattern needs to ensure selective etching properties with respect to the adhesive film.

Therefore, conventionally, Ni plating was applied to the exposed portion, or the NiCr thin film or Cr thin film was etched using a strong alkaline etchant that was selective to Cu.

FIG. 4 is a sectional view showing the main parts of a conventional multilayer wiring board, and the multilayer wiring board 1 is formed using the aforementioned Ni plating.
Forms a first conductor pattern 3 made of Cu on an alumina substrate 2, and forms a first insulating layer 4 made of crystalline glass on top of the first conductor pattern 3 made of Cu.
to form. After forming a second conductive pattern 5 of Cu on the insulating layer 4 having via holes at required parts, a second insulating layer 6 of crystalline glass is formed and exposed inside the via pole of the insulating layer 6. The exposed part of the conductor pattern 5 has N
i-plating layer 7 is formed. Next, the uniform resistor thin film, NiCr thin film, and Au thin film sequentially deposited thereon are selectively etched to form a resistor pattern 8. A conductor pattern 11 consisting of the adhesive layer 9 and the conductor layer 10 is formed.

However, the conductor pattern 3.5 and the insulating layer 4 are formed by thick film means, and the insulating layer 6 is formed on the crystalline glass layer 6a formed by the thick film means. Crystalline glass layers 6b are laminated by CVD.

[Problem to be solved by the invention]

As explained above, conventional multilayer wiring boards have N
A strong alkaline etchant was used to form i-plating.

However, the conventional method using Ni plating requires an electrical connection to connect the lower conductor to the plating electrode, which impairs the degree of freedom in pattern design.
The thickness of the Ni plating, which is ineffective as a mask when it is less than 5 μm and easily peels off due to film stress when it exceeds 10 μm, is 5 μm.
There was a problem in that it was difficult to control μff to 1 to 10 μm.

On the other hand, the conventional method using a strong alkali etchant requires the use of a negative resist with strong alkali resistance, and since a strong alkali resistant negative resist requires more organic solvent than a positive resist, explosion protection against organic solvents is required. Due to considerations such as performance, the construction of automated manufacturing equipment becomes more difficult and larger, and the insulating layer, which is generally glassy, is easily deteriorated by strong alkaline etchants.

An object of the present invention, which was made in view of the above problems, is to facilitate the manufacture of a multilayer wiring board.

[Means to solve the problem]

According to FIG. 1 showing an embodiment of the present invention, a copper conductor pattern 5 is connected to a lower copper conductor pattern 5 formed under an insulating layer 6 through a via hole in an uppermost insulating layer 6.
Alternatively, the upper conductor pattern 23 formed of Au may be
It is characterized by forming an adhesion layer 22 mainly composed of W and Ti in an amount of 1 to 5%.
This is a multilayer wiring board 21 characterized by including.

[Function] According to the above means, W itself has the same adhesion as NiCr or Cr to the conductor pattern made of Cu or Au, and the W itself has adhesion to the conductor pattern made of Cu or Au, and it also has the same adhesion as NiCr or Cr using a positive resist.
Provides resistance to etchant that etches r,
Furthermore, by incorporating 1 to 5% Ti into W, its water resistance and residue generation rate can be improved, making it easier to manufacture a multilayer wiring board.

[Example] A multilayer wiring board according to an example of the present invention will be described below with reference to the drawings.

FIG. 1 is a cross-sectional view showing the main parts of a multilayer wiring board according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view for explaining the main manufacturing steps of the multilayer wiring board.

In FIG. 1, in which the same reference numerals are used for parts common to those in FIG.
A first layer conductor pattern 3 is formed at u, and a glass insulating layer 4 is formed thereon. A second conductor pattern 5 is formed on the insulating layer 4 having via holes in required parts, and then a second insulating layer 6 is formed, and the insulating layer 6 with via holes is formed.
Resistor pattern 8. Adhesion layer 22 mainly composed of W
．． A conductor pattern 23 made of a conductor layer 10 made of copper or gold is formed.

However, conductor patterns 3 and 5. The insulating layer 4 and the glass layer 6a are formed by thick film means, and the glass layer 6b and the conductor pattern 23 are formed by thin film means.

In FIG. 2(a), a conductor pattern 3. Insulating layer 4. After forming the conductor pattern 5 and the insulating layer 6, Ta-N is formed using a DC magnetron spunter.
(Tantalum nitride) resistor thin film 24 (for example, 100 mm thick)
A thin W film 25 (for example, I7, 500 mm), and an Au thin film 26 (for example, 1 μl thick) are successively deposited, and a desired positive resist 27 is formed thereon.

Next, unnecessary parts of the Au thin film 26 exposed from the resist 27 are dissolved away using an iodine-potassium iodide-based etchant, and the Au
Thin II! W thin film 2 exposed by dissolving the unnecessary parts of 26
The unnecessary portions of the resistive thin film 24 exposed by the elution of the unnecessary portions of the W thin film 25 are removed using a CF-based etchant. After removal, the second
A positive resist 28 is formed.

After that, unnecessary parts of the Au thin film 26 exposed from the resist 28 are dissolved away using an iodine-potassium iodide-based etchant.
Au! The W thin film 2 exposed by dissolving the unnecessary part of the film 26
Erachan 1, a red blood salt system with the unnecessary parts of 5 adjusted to pH 9
After the resist 28 is removed and cleaned, the multilayer wiring board 21 is completed as shown in FIG. 2(C).

Figure 3 is a diagram showing the relationship between the Ti content in the W thin film and the peeling rate and residue generation rate of the conductive thin film deposited thereon, after 1000 hours in an atmosphere of 85°C and 395% RH. Regarding the samples subjected to the pressure-cutting car test, the solid line shows the peeling characteristics of the conductor thin film, where the measured values are plotted with black circles, and the broken line shows the residue generation durability, where the measured values are plotted with white circles.

As is clear from Figure 3, the peeling rate of the conductor thin film is W
When the Ti content in the thin film is 1% or more, it is approximately 2% or less, and the residue generation rate in the conductive thin film is 5% when the Ti content in the W thin film is 5%.
It will be about 2.5% or less in the following cases. Therefore, when the Ti content in the W thin film is 1 to 5%, the conductive thin film has excellent characteristics in both the peeling rate and the residue rate.

[Effects of the Invention] As described above, according to the present invention, W itself has adhesion to a conductor pattern made of Cu or Au equivalent to that of NiCr or Cr, and can also be bonded to a conductor pattern made of Cu or Au using a positive resist. Furthermore, by incorporating 1 to 5% Ti into W, the adhesion of the thin film and the rate of residue generation are improved, making it easier to manufacture multilayer wiring boards.

[Brief explanation of the drawing]

Fig. 1 is a multilayer wiring board according to an embodiment of the present invention, Fig. 2 is an explanatory diagram of the main manufacturing process of the multilayer wiring board shown in Fig. 1, and Fig. 3 is a diagram showing the content of Ti in W in the adhesive layer. The relationship between the rate of film peeling and the rate of residue generation is shown in Figure 4 for a conventional multilayer wiring board. In the figure, 5 indicates a lower conductor pattern of the uppermost insulating layer, 6 indicates the uppermost insulating layer, 21 indicates a multilayer wiring board, 22 indicates an adhesion layer, and 23 indicates an upper conductor pattern of the uppermost binary insulating layer.

Claims (2)

[Claims] (1) A lower copper conductor pattern (5) formed under the uppermost insulating layer (6) through a via hole in the uppermost insulating layer (6).
An upper conductor pattern (23) formed of copper or gold on the insulating layer (6) and connected to the insulating layer (6) is formed by forming an adhesion layer (22) mainly composed of tungsten as a medium. wiring board. (2) The adhesion layer (22) is made of tungsten and titanium.
The multilayer wiring board according to claim 1, characterized in that the multilayer wiring board contains ~5%.