JPH02161737A - Wire bonding method - Google Patents

Wire bonding method

Info

Publication number
JPH02161737A
JPH02161737A JP63316973A JP31697388A JPH02161737A JP H02161737 A JPH02161737 A JP H02161737A JP 63316973 A JP63316973 A JP 63316973A JP 31697388 A JP31697388 A JP 31697388A JP H02161737 A JPH02161737 A JP H02161737A
Authority
JP
Japan
Prior art keywords
wire
tool
lead
chip
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63316973A
Other languages
Japanese (ja)
Inventor
Katsuo Takei
武井 勝男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63316973A priority Critical patent/JPH02161737A/en
Publication of JPH02161737A publication Critical patent/JPH02161737A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/8212Aligning
    • H01L2224/82148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/82169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, e.g. nozzle
    • H01L2224/8218Translational movements
    • H01L2224/82181Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009Pre-treatment of the connector or the bonding area
    • H01L2224/8503Reshaping, e.g. forming the ball or the wedge of the wire connector
    • H01L2224/85035Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball"
    • H01L2224/85045Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball" using a corona discharge, e.g. electronic flame off [EFO]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85181Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85203Thermocompression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To eliminate causes of failures such as short-circuiting by arranging a chip and the surface to be bonded of an outer lead on the vertical upper part of a tool so as to face vertically downward. CONSTITUTION:A tool 1 moves at the lower position of a pad 4, and, at the position, moves vertically upward; a ball 6, of a wire 7 chip, which is previously formed by electric discharge fusion is made to abut against a pad 4 and subjected to thermocompression bonding by heating. After the tool 1 has descended to a specified position, a clamper 5 is closed; the tool 1 descends lower and cuts a wire 7 at the part where the strength is decreased by the thermocompression bonding on the lead 3. After the above bonding process is ended, discharge is carried out between a discharge electrode 8 and a wire 7, thereby, fusing the wire 7 tip and forming the ball 6.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置のワイヤボンディング方法の改良
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvements in wire bonding methods for semiconductor devices.

〔従来の技術〕[Conventional technology]

従来、半導体装置、例えばICのチップのパッドと外部
リード(以下ではリードという)を接続するワイヤボン
ディングは第3図に示す熱圧着方式でなされている。
2. Description of the Related Art Conventionally, wire bonding for connecting pads of a chip of a semiconductor device, such as an IC, and external leads (hereinafter referred to as leads) has been performed by a thermocompression bonding method shown in FIG.

第3図はワイヤボンディングの工程を順に(a)から(
g)まで示したものであるが、この工程中結線工具であ
るツールlは、鉛直上方に配置され、ICチップ2と外
部リード3とは鉛直下方に配置されている。
Figure 3 shows the wire bonding process in order from (a) to (
As shown up to g), the tool 1, which is a connection tool during this process, is placed vertically above, and the IC chip 2 and external leads 3 are placed vertically below.

図において、5はクランパ、7はワイヤで、6はワイヤ
7先端のポールである。
In the figure, 5 is a clamper, 7 is a wire, and 6 is a pole at the tip of the wire 7.

先ず、ツールlがパッド4の位置上方に移動しく同図(
a))、その位置で鉛直下方に下降して、放電融解によ
って予め形成されているワイヤ7の先端のポール6をパ
ッド4に押し付けて、加熱し、熱圧着する(同図(b)
)。
First, the tool l is moved above the position of the pad 4 as shown in the same figure (
a)) At that position, descend vertically and press the pole 6 at the tip of the wire 7, which has been formed in advance by electric discharge melting, against the pad 4, heat it, and bond it by thermocompression (FIG. 2(b)).
).

そして、ツールlが鉛直上方に上昇する(同図(C))
、次に、ツール1が、横方向にり−ド3の位置上方に移
動した後で(同図(d))、ツール1を下降しワイヤ7
の先端をリード3に押し付けて、加熱し、熱圧着する(
同図(e))。
Then, the tool l rises vertically upward ((C) in the same figure)
, Next, after the tool 1 has moved laterally above the position of the wire 3 (FIG. 3(d)), the tool 1 is lowered and the wire 7 is moved upward.
Press the tip of the lead 3 against the lead 3, heat it, and bond it by thermocompression (
Figure (e)).

そして、ツールlが一定位置へ上昇してから、クランパ
5が閉じ、さらに、ツール1がそれより高く上昇するこ
とで、リード3上の熱圧着によって強度の低下したワイ
ヤ部分でワイヤ7を切断する(同図(f))。
Then, after the tool l rises to a certain position, the clamper 5 closes, and the tool 1 rises higher than that, thereby cutting the wire 7 at the part of the wire whose strength has decreased due to thermocompression bonding on the lead 3. (Figure (f)).

以1−で、ボンディング作業は終り、次のボンディング
作業のために、放電電極8とワイヤ7の間で放電を発生
させ、ワイヤ7の先端を溶融させて、ポール6を形成す
る(同図(g))。
With step 1- above, the bonding work is completed, and for the next bonding work, a discharge is generated between the discharge electrode 8 and the wire 7, and the tip of the wire 7 is melted to form the pole 6 (as shown in the same figure). g)).

−L′y!iシた従来のワイヤボンディング方法で結線
されるワイヤ7の形状である、いわゆるループ形状は、
第4図に示すように、バッド4の直に部のワイヤ7のボ
ール6形成時に、再結晶し硬化したA部分と、リード3
Lで熱圧着により硬化1.た0部分と、A部分とD部と
の間で支持されているB部分とにわけられる。
-L'y! The so-called loop shape, which is the shape of the wire 7 that is connected using the conventional wire bonding method, is
As shown in FIG. 4, when forming the ball 6 of the wire 7 directly in the pad 4, the recrystallized and hardened portion A and the lead 3
Cured by thermocompression with L 1. It is divided into a part 0, which is supported by a part 0, and a part B, which is supported between a part A and a part D.

このループ形状におい−[、ICチップ2からワイヤ7
に到る高さHは、一定高さ以下になるとショートの原因
となるため、品質に影響して、特に問題とされている。
In this loop shape - [, from the IC chip 2 to the wire 7
The height H below a certain level causes a short circuit, which affects the quality and is considered to be a particular problem.

高さHは、直り部のA部分が、そのまま垂直に維持され
ていれば、最小許容高さが設計−Lきまり、ショートの
原因をのぞくことができる。
As for height H, if part A of the straight part is maintained vertically, the minimum allowable height is determined by design-L, and the cause of the short circuit can be eliminated.

しかし実際には、ツール1がバッド4からり−ド3へ移
動する間において、A部分にリード3方向へ引張るよう
な負荷がかかる場合には、第5図に示すようにA部分が
リード3側に倒れ。
However, in reality, when the tool 1 is moving from the pad 4 to the lead 3, if a load is applied to the part A that pulls it in the direction of the lead 3, then the part A will move to the lead 3 as shown in FIG. Fall to the side.

高さHが十分に得られなくなる。A sufficient height H cannot be obtained.

ところで、ワイヤボンディング作業におけるツール1の
運動はカムの回転によるいわゆる、ならい動作により行
ない、第6図の矢印で示す軌跡で行なわれる。ここで、
ツールlをバッド4の直上の高い位置aへ移動させた後
に、り一層3の直4−の位置すへ移動する過程において
Incidentally, the movement of the tool 1 in the wire bonding work is carried out by a so-called tracing movement by the rotation of a cam, and is carried out along a trajectory shown by an arrow in FIG. here,
After moving the tool l to a high position a directly above the pad 4, in the process of moving it to a position directly above the pad 4.

前述したA部分にリード3方向へ中張る負荷を弱くする
ために、繰り出されるワイヤ7のB部分とツール1内の
ワイヤ7のなす角θを大きくとる。これによりツール1
とワイヤ7間に働く摩擦力が少なくなりA部分に強い負
荷がかからない。
In order to weaken the load applied to the above-mentioned portion A in the direction of the lead 3, the angle θ between the portion B of the wire 7 to be paid out and the wire 7 inside the tool 1 is set to be large. This will cause tool 1
The frictional force acting between the wire 7 and the wire 7 is reduced, and no strong load is applied to the portion A.

このような、遠回りのツール1の軌跡によりワイヤ7は
必要以−Lに繰り出され、その自重により第7図のよう
に下方に垂れ下がった形状になっている。ツール1の下
降に伴い、ツール!の先端とバンド40間に存在するワ
イヤ7は繰りこまれ減少するが、 リード3側のボンデ
ィング位置に至っても過分に繰り出されたワイヤ7を十
分に吸収1.きれない。そのため、バッド4とリ一13
の間のボンディング番ご使用される総ワイヤ長は、必要
最短の総ワイヤ反よりも若干過分となる。この過分なワ
イヤ7により、実際のループ形状は、第8図のようにリ
ードににおいて、過分のワイヤ7のための支持領域C部
分が必要になるととも(こ5図示するようにワイヤ7は
下方にたるんだ形状となっていた。
Due to such a circuitous path of the tool 1, the wire 7 is unwound to a length greater than necessary, and its own weight causes it to hang downward as shown in FIG. As Tool 1 descends, Tool! The wire 7 existing between the tip of the lead 3 and the band 40 is reduced by being retracted, but even when it reaches the bonding position on the lead 3 side, the wire 7 that is excessively drawn out is sufficiently absorbed. I can't do it. Therefore, Bad 4 and Riichi 13
The total wire length used during the bonding period will be slightly in excess of the required minimum total wire length. Due to this excess wire 7, the actual loop shape is changed in the lead as shown in FIG. It had a sagging shape.

〔発+1が解決しようとする課題〕 従来のワイヤボンディング方法では、J二連したように
バ・ンド4からリー ド3へ至る全ワイヤ長が必要最短
の長さJ、り茗T長くなっている。
[Problems that Hatsu+1 is trying to solve] In the conventional wire bonding method, the total wire length from band 4 to lead 3 is the shortest length J, and the length T is longer than the required minimum length, as if J were connected in two series. There is.

そのため、第8図のようにり−1” 31で、過分とな
ったワイヤ7を支持°オる所定の領域C部分を必要と1
.ていた、 しかし、ICの多ピン化に伴い、リード3の幅がより一
層狭くなると、問題が生じてくる。
Therefore, as shown in FIG.
.. However, as the number of pins in IC increases, problems arise as the width of the lead 3 becomes narrower.

第9図は、ICチップ2にワイヤボンディングした状態
を示す平面図であって、この例では、ICチップ2とり
一層3とは止しい位置に配置されているので、ワイヤ7
の支持領域C部分を得るこ゛どができる。ところが、第
1θ図の甲面図に示すように、ICチップ2がダイボン
ディングのときΔyのズレが生じたときには、ワイヤは
、リード3の艮手方向からずれて斜め方向になる。この
ときり一層3の幅が狭いために、ワイヤ7が1ルート3
よりはみでないように支持領域、を正常なときのC部分
よりも短い01部分としなければならない。これにより
、支持領域の無くなった過分のワイヤ7によって形成す
れるループ形状は、第1O図の平面図に示すように湾曲
したカール形状になるか、あるI#)は湾曲はしないが
第11図に示すように、す〜 ド3の下方に垂れ下がっ
たタレ形状となる。そのため、ショート等の不良原因と
なるとtlzう欠点力(あった。
FIG. 9 is a plan view showing a state where the IC chip 2 is wire-bonded. In this example, since the IC chip 2 is placed at a position that is different from the layer 3,
It is possible to obtain the support area C portion of the area. However, as shown in the back view of FIG. 1θ, when a deviation of Δy occurs when the IC chip 2 is die-bonded, the wire is deviated from the direction of the lead 3 and becomes oblique. At this time, since the width of the layer 3 is narrower, the wire 7 is connected to one route 3.
The support area must be the 01 part, which is shorter than the normal C part, to prevent it from twisting. As a result, the loop shape formed by the excess wire 7 with no support area becomes a curved curl shape as shown in the plan view of FIG. As shown in the figure, it becomes a sagging shape that hangs down from the bottom of the dome 3. Therefore, there was a drawback that it would cause defects such as short circuits.

本発明の目的は、上記の事情に鑑み、ワイヤ7がカール
またはタレ形状とならず、ショート等の不良原因を除去
するワイヤボンディング方法を提供することにある。
In view of the above circumstances, an object of the present invention is to provide a wire bonding method that prevents the wire 7 from curling or sagging and eliminates causes of defects such as short circuits.

〔課題を解決するための手段〕[Means to solve the problem]

本発明では、結線工具であるツールの先端部を鉛直上方
に向かうように配置するとともに、ICチップと外部リ
ードの被ボンデイング面が鉛直下方に向かうように前記
ツールの鉛直上方に配置して、ワイヤボンディングをす
るようにしている。
In the present invention, the tip of the tool, which is a wiring tool, is arranged vertically upward, and the tool is arranged vertically upward so that the surfaces to be bonded of the IC chip and the external leads face vertically downward. I try to do bonding.

〔作用〕[Effect]

ワイヤボンディング方法は、ツールに対するICチップ
、リードの上下関係を逆にして、ワイヤがカールまたは
タレ形状とならず、ショート等の不良原因を除去する。
In the wire bonding method, the vertical relationship between the IC chip and the leads relative to the tool is reversed to prevent the wire from curling or sagging, thereby eliminating causes of defects such as short circuits.

〔実施例〕〔Example〕

以下、本発明の実施例を図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の第1実施例のワイヤボンディング方法
の動作説明図である。
FIG. 1 is an explanatory diagram of the operation of the wire bonding method according to the first embodiment of the present invention.

図からも明らかなように、結線工具であるツールlは、
その先端部が鉛直上方に向かうように配置され、また、
ICチップ2と外部リード3は被ボンディング面が鉛直
下方に向かうようにツール1の鉛直上方に配設されてい
る。
As is clear from the figure, tool l, which is a wiring tool, is
The tip is arranged so as to face vertically upward, and
The IC chip 2 and the external leads 3 are arranged vertically above the tool 1 so that the surfaces to be bonded face vertically downward.

次に動作について説明するが、ボンディングシーケンス
については、従来のボンディング方法に準じ、以下の通
りになる。
Next, the operation will be explained, and the bonding sequence is as follows according to the conventional bonding method.

先ず、ツールlがパッド4の位置下方に移動しく同図(
a))、その位置で鉛直上方に上昇して、放電融解によ
って予め形成されているワイヤ7の先端のポール6をパ
ッド4に押し付けて、加熱し、熱圧着する(同図(b)
)。
First, the tool l moves below the position of the pad 4 as shown in the same figure (
a)) At that position, the pole 6 at the tip of the wire 7, which has been formed in advance by electric discharge melting, is raised vertically upward and pressed against the pad 4, heated, and bonded by thermocompression (FIG. 2(b)).
).

そして、ツール1が鉛直下方に下降する(同図(C))
、次に、ツールlが、横方向にり−ド3の位置下方に移
動した後で(同図(d))、ツール1を上昇しワイヤ7
の先端をリード3に押し付けて、加熱し、熱圧着する(
同図(e))。
Then, tool 1 descends vertically ((C) in the same figure)
, Next, after the tool 1 moves laterally below the position of the wire 3 (FIG. 1(d)), the tool 1 is raised and the wire 7
Press the tip of the lead 3 against the lead 3, heat it, and bond it by thermocompression (
Figure (e)).

そして、ツール1が一定位4へ下降してから、クランパ
5が閉じ、さらに、ツールlがそれより低く下降するこ
とで、リード3上の熱圧着によって強度の低下したワイ
ヤ部分でワイヤ7を切断する(同図(f))。
Then, after the tool 1 is lowered to a certain position 4, the clamper 5 is closed, and the tool 1 is further lowered to a lower level, thereby cutting the wire 7 at the part of the wire whose strength has decreased due to thermocompression bonding on the lead 3. ((f) in the same figure).

以上で、ボンディング作業は終り1次のボンディング作
業のために、放電電極8とワイヤ7の間で放電を発生さ
せ、ワイヤ7の先端を溶融させて、ポール6を形成する
(同図(g))。
With this, the bonding work is completed. For the first bonding work, a discharge is generated between the discharge electrode 8 and the wire 7, and the tip of the wire 7 is melted to form the pole 6 (see (g) in the same figure). ).

しかし、従来のワイヤボンディング方法と異なり、IC
チップ2と外部リード3が鉛直上方に、そして、ツール
1が鉛直下方の位置に配置されているので、パッド4か
らリード3へ至る゛結線過程において、ワイヤ7が過分
に繰り出され、しかも、リード3上にこの過分なワイヤ
7を支持する領域がない場合でも、過分なワイヤ7は、
ワイヤ7自身の自重により、第1図中に示した矢印のよ
うに下方に引張られているので、ワイヤの再結晶硬化部
分に働く張力が弱くなり、第6図のaの位置のように、
<ラド4と大きな1llf隔をおく必要がない、したが
って、過分なワイヤ7がリード3の面より垂れたり、パ
ッド4とリード3の間において、カールすることがなく
なる。
However, unlike traditional wire bonding methods,
Since the chip 2 and the external leads 3 are placed vertically above and the tool 1 is placed vertically below, the wire 7 is unwound excessively during the connection process from the pad 4 to the lead 3. Even if there is no area on 3 to support this excess wire 7, the excess wire 7
Since the wire 7 is pulled downward as shown by the arrow in FIG. 1 due to its own weight, the tension acting on the recrystallized hardened portion of the wire becomes weaker, as shown in position a in FIG. 6.
<There is no need to provide a large 1llf distance from the pad 4. Therefore, excessive wire 7 does not hang down from the surface of the lead 3 or curl between the pad 4 and the lead 3.

第2図は1本発明の第2実施例のワイヤボンディング方
法の動作説明図である。この実施例はパッド4の位置が
チップ端縁でないためり一層3との距離が長い場合であ
る。
FIG. 2 is an explanatory diagram of the operation of the wire bonding method according to the second embodiment of the present invention. In this embodiment, since the pad 4 is not located at the edge of the chip, the distance from the pad 4 to the layer 3 is long.

この第2実施例では、ツールlがリード3へ上昇する途
中において、ツール1とともに上下するクランパ5を閉
じる動作を第1実施例に付加する。
In this second embodiment, an operation of closing the clamper 5 that moves up and down with the tool 1 while the tool 1 is rising to the lead 3 is added to the first embodiment.

そして、第2図(C)に示すように、リード3側での熱
圧着が完了するまで、クランパ5を閉じた状態にしてお
けば、結線される総ワイヤ長は、クランパ5を閉じる高
さに従い所定量の過分とすることができる。所定量の過
分となったワイヤ7は、下方に引張られるので、同図(
d)に示すようにICチップ2のエツジからパッド4ま
での距離りが長くなっても、適切に所定量をきめればI
Cチップ2とワイヤ7との距離Hを十分に得ることがで
きる。
Then, as shown in FIG. 2(C), if the clamper 5 is kept closed until the thermocompression bonding on the lead 3 side is completed, the total wire length to be wired will be the height at which the clamper 5 is closed. A predetermined excess can be made according to the following. The wire 7, which has exceeded the predetermined amount, is pulled downward, as shown in the figure (
Even if the distance from the edge of the IC chip 2 to the pad 4 becomes long as shown in d), if the distance is determined appropriately, the I
A sufficient distance H between the C chip 2 and the wire 7 can be obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように1本発明のワイヤボンディング方法
は、ツールの先端部を鉛直上方に向かうように配置する
とともに、ICチップと外部リードの被ボンディング面
が鉛直下方に向かうようにツールの鉛直上方に配置して
、ボンディングを行うボンディング作業中、常にワイヤ
の自重により、ワイヤは下方に引張られ、ワイヤ先端の
再結晶硬化部分に働く張力が減殺されるので、ワイヤの
過分量を従来例より少なくてすませることができる。そ
のため、ワイヤがカールまたはタレ形状とならず、ショ
ート等の不良原因を除去できるという優れた効果がある
As explained above, in the wire bonding method of the present invention, the tip of the tool is arranged vertically upward, and the tool is arranged vertically upward so that the bonding surfaces of the IC chip and external leads face vertically downward. During the bonding process in which the wire is placed and bonded, the wire is constantly pulled downward by its own weight, and the tension acting on the recrystallized hardened portion at the tip of the wire is reduced. I can finish it. Therefore, there is an excellent effect that the wire does not become curled or sagging, and causes of defects such as short circuits can be eliminated.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1実施例のワイヤボンディング方法
の動作説明図、第2図は本発明の第2実施例のワイヤボ
ンディング方法の動作説明図、第3図は従来のワイヤボ
ンディング方法の動作説明図、第4図はボンディング後
のループ形状を示す平面図、第5図はボンディング後の
不良ループ形状を示す平面図、第6図及び第7図は従来
のワイヤボンディング方法によるツールの軌跡の説明図
、第8図は従来のワイヤボンディング方法によるループ
形状の正面図、第9図はループ形状の平面図、第1θ図
はループのカール状態を示す平面図、第11図はタレ状
態を示す正面図である。 l・・・ツール、 2・・・ICチップ。 3・・・リード。 4・・・パッド。 5・・・クランパ。 6・・・ポール。 7・・・ワイヤ、 8・・・放電電極。 特許出願人  日本電気株式会社 代理人 弁理士   内   原    晋(dl 第2図 (b)
FIG. 1 is an explanatory diagram of the operation of the wire bonding method according to the first embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation of the wire bonding method according to the second embodiment of the present invention, and FIG. Diagram for explaining operation, Figure 4 is a plan view showing the loop shape after bonding, Figure 5 is a plan view showing the defective loop shape after bonding, and Figures 6 and 7 are tool trajectories according to the conventional wire bonding method. Fig. 8 is a front view of the loop shape obtained by the conventional wire bonding method, Fig. 9 is a plan view of the loop shape, Fig. 1θ is a plan view showing the curled state of the loop, and Fig. 11 shows the sagging state. FIG. l...Tool, 2...IC chip. 3...Lead. 4...Pad. 5... Clamper. 6...Paul. 7...Wire, 8...Discharge electrode. Patent applicant Susumu Uchihara (dl Figure 2 (b)) Patent attorney representing NEC Corporation

Claims (1)

【特許請求の範囲】[Claims] 結線工具であるツールの先端部を鉛直上方に向かうよう
に配置するとともに、ICチップと外部リードの被ボン
ディング面が鉛直下方に向かうように前記ツールの鉛直
上方に配置して、ボンディングを行うことを特徴とする
ワイヤボンディング方法。
Bonding is performed by arranging the tip of a tool that is a wiring tool so as to face vertically upward, and arranging the tool vertically above so that the surfaces to be bonded between the IC chip and the external leads face vertically downward. Characteristic wire bonding method.
JP63316973A 1988-12-14 1988-12-14 Wire bonding method Pending JPH02161737A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63316973A JPH02161737A (en) 1988-12-14 1988-12-14 Wire bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63316973A JPH02161737A (en) 1988-12-14 1988-12-14 Wire bonding method

Publications (1)

Publication Number Publication Date
JPH02161737A true JPH02161737A (en) 1990-06-21

Family

ID=18082997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63316973A Pending JPH02161737A (en) 1988-12-14 1988-12-14 Wire bonding method

Country Status (1)

Country Link
JP (1) JPH02161737A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04333247A (en) * 1991-05-08 1992-11-20 Nec Yamagata Ltd Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04333247A (en) * 1991-05-08 1992-11-20 Nec Yamagata Ltd Manufacture of semiconductor device

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