JPH02150783A - Method for inspecting hybrid ic for reproducing melody - Google Patents

Abstract

PURPOSE:To inexpensively and surely inspect hybrid ICs for reproducing melody by giving sound reproduction controlling signals and clock signals from a clock circuit to an melody IC and detecting musical note high and musical note long signals outputted from the melody IC. CONSTITUTION:Frequencies of musical note high signals of each musical note detected from a test point TR3 in Step m13 are measured and whether or not the musical note high signals measured in Step m12 are equal to previously prepared expected values is discriminated. When the musical note signals in Step m12 are not equal to the expected values, the process proceeds to Step m8 and it is discriminated as unacceptable. When the performance of the 1st piece of music is completed, the process proceeds from Step m13 to Step m14 in which a melody IC 2 is stopped by disconnecting a hold switch 27 after the switch 27 is once conducted and hook switch 28 is disconnected. In Step m15, whether or not the 2nd piece of music is also inspected is discriminated. When inspections of the two pieces of music are completed, the process proceeds to Step m17 and it is discriminated as acceptable.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for testing a hybrid IC for melody playback.

[Prior Art] A hybrid IC for memory playback includes a one-chip melody IC, a clock circuit that outputs a clock signal given to the melody IC, and a note high signal and a note length signal that are synthesized to output an audio signal. and a synthesis circuit. Here, the one-chip melody IC includes a ROM that stores data representing each note of the melody and data such as instructions for operating the CPU, and responds to a clock signal and an audio playback control signal. , a note height signal representing the height of each note in terms of frequency, and a note length signal representing the length of each note in terms of time are sequentially output.

In testing such a hybrid IC for melody playback, the first conventional testing method involves testing the melody IC alone using a digital tester before mounting the melody IC on the hybrid IC for melody playback.

That is, in this first inspection method, as shown in FIG.
The melody IC receives the clock signal from the digital tester and the data to operate the CPU in synchronization with the clock signal.
51 and stored in the ROM.
As shown in the figure, the logic level of the output data is checked in synchronization with the clock signal, and all are sequentially read and detected.
The detected data and the expected value of previously prepared data are sequentially compared every clock.

In this inspection, as shown in the flowchart in Figure 7,
In step n1, a clock signal is externally input to the CPU of the melody IC 51, the CPU is set to test mode, and in step n2, input data is input in synchronization with the clock signal.

In step n3, the data in the ROM is read.

The data read out in step n4 is compared with the expected value, and if it is the same as the expected value, the process proceeds to step n5 and the product is determined to be non-defective. If it's different, Ste.

Proceeds to step n6 and is determined to be defective.

In the second conventional testing method, an amplifier and a speaker are connected to a hybrid IC for melody playback, and an audio playback control signal and a clock signal from a clock circuit are transferred to a memory I.
C, the tester listens to the playback sound, and performs the actual operation.
It is being inspected.

[Problem to be solved by the invention] However, in the first testing method using a logic tester,
Logic testers are expensive and not suitable for practical use.

In addition, listening by ear (the second test method cannot be automated),
Moreover, there is a risk of testing incorrectly.

The present invention solves the above-mentioned technical problems and provides a method for testing hybrid ICs for melody playback that can be automated, reliably tested, and in conditions close to actual use using inexpensive measuring equipment. purpose.

[Means for Solving the Problems] A method for testing a hybrid IC for melody playback according to the present invention includes a ROM that stores data representing each note of a melody and data such as instructions for operating a CPU, and a clock signal. and a one-chip melody IC that sequentially outputs a note height signal representing the height of each note in terms of frequency and a note length signal representing the length of each note in terms of time in response to the audio reproduction control signal; A clock circuit that outputs a clock signal to be applied to a melody IC; and a synthesis circuit that synthesizes a note height signal and a note length signal and outputs an audio signal. The playback control signal and the clock signal from the clock circuit are given to the melody IC, the note height signal and note length signal outputted from the melody IC are detected, and the detected note height signal and note length signal are combined with the previously prepared note height signal and note length signal. The expected values of the note height signal and note length signal are sequentially compared for each note.

[Operation] When the audio reproduction control signal and the clock signal from the clock circuit are applied to the melody IC, the melody IC outputs a note height signal and a note length signal.

From this melody IC, a note high signal, a note length signal, a note length signal, and the expected values of the note high signal and note length signal prepared in advance are sequentially compared for each note.

Thereby, the hybrid IC for melody playback can be tested reliably using an inexpensive measuring device and in conditions close to actual use.

[Example] Hereinafter, the present invention will be explained in detail based on the drawings.

FIG. 1 is a circuit diagram of a hybrid IC and its vicinity according to an embodiment of the present invention.

Hybrid IC for melody playback that is subject to this inspection
For example, I is used in a telephone, and when a hook key switch is operated, one of two pieces of music can be selected and the selected music can be played.

The hybrid ICI includes a melody IC 2, a clock circuit 3, and a synthesis circuit 4. Also, a power terminal 5 for supplying power, a ground terminal 6, an on-hook terminal 7, a hold terminal 8, a hook terminal 9, and a select terminal 1.
0.11, control output terminals 12 to 14, and an audio signal output terminal 15.

The clock circuit 3 includes a resistor 16 and a capacitor 17. This allows the clock circuit 3 to output the melody IC.
2 is given a clock signal.

The melody IC2 consists of a one-chip microcomputer including a CPU (not shown) and a ROM. This R
OM contains data representing each note of the melody and the CPU
Data such as instructions for operating the computer are stored.

The melody IC 2 responds to the clock signal output from the clock circuit 3 and the audio playback control signal applied via the hold terminal 8, hook terminal 9, select terminal 1O, and select terminal 11, from the envelope terminal. As shown in Fig. 2 (1), a note length signal representing the length of each note in terms of pulse width time, and a note length signal from the sound terminal 1.2 as shown in Fig. 2 (2) and (3). A note height signal representing the pitch of a note in terms of frequency is sequentially output. Note that the frequency of the note high signal output from the sound terminal 1 is twice the frequency of the note high signal of FIG. 2 (2) output from the sound terminal 2, as shown in FIG. 2 (3). selected.

In the music shown in FIG. 3, the first note a has a note high signal frequency of 560 Hz and a note length signal pulse width of 480 m se
It is played at c. The second note is the frequency 5 of the note high signal.
At 60H2, the note length signal is reproduced with a pulse width of 480 msec. The third note C has the frequency of the note high signal 718H2
The pulse width of the note length signal is 480 msec.

The fourth note d is reproduced at a frequency of 803H2 of the note high signal and a pulse width of 480 msec of the note length signal.

The fifth note e is reproduced at the frequency of the note high signal of 770H2 and the pulse width of the note length signal of 960 msec. The sixth note f is reproduced at the frequency of the note high signal of 718 Hz and the pulse width of the note length signal of 240 msec. In this way,
A note height signal and a note length signal representing each note are sequentially output.

The synthesis circuit 4 includes a transistor 18, a capacitor 19,
20 and resistors 21 to 24. As a result, the note length signal from the envelope terminal of the melody IC 2 representing the length of each note in terms of pulse width time, and the note height signal representing the height of each note in terms of frequency from the sound terminal 1.2 are synthesized. An audio signal is output from the audio signal output terminal 15.

Note that the capacitor 25 connected between the power supply terminal 5 and the reset terminal of the melody IC 2 is for resetting the melody IC 2 when the power is turned on.

In such a melody IC 2, the ground terminal 6 is normally grounded by the user.

An on-hook switch 26 is connected between the on-hook terminal 7 and ground. A hold switch 27 is connected between hold terminal 8 and ground.

A hook switch 28 is connected between the hook terminal 9 and ground. A select switch 29 is connected between the select terminals 10 and 11. By operating the hold switch 27, hook switch 28, and select switch 29, an audio reproduction signal is given to the melody IC 2.

When testing such a melody IC2, the hold switch 27, hook switch 28, and select switch 29 are replaced with relay switches, and an audio playback control signal is automatically given to the melody IC2. Also, test point TPI is connected to the envelope terminal of Melody IC2.
is set up, test point TP2 is set up at sound terminal 2, and test point TP3 is set up at sound terminal 1. As a result, a note length signal and a note height signal are detected. This detection is performed, for example, by a measuring device such as a frequency counter. The detected note length signal and note height signal are compared with expected values of the note length signal and note height signal prepared in advance for each note in sequence.

This test will be explained in detail according to the flowchart in FIG.

In step m1, power is supplied to the hybrid ICI. In step m2, select switch 29
, and select the first music. Next, in step m3, the hook switch 28 is turned on, in step m4, the hold switch 27 is turned on to start playing music, and in step m5, the hold switch 27 is turned off.

In step m6, measure the pulse width time of the note length signal of each note detected from the test point TPI,
In step m7, it is determined whether the measured note length signal is equal to a previously prepared expected value. If not equal,
Proceeding to step m8, the product is determined to be defective.

In step m9, the frequency of the note high signal of each note detected from test point TP2 is measured, and in step mlO it is determined whether the measured note high signal is equal to a previously prepared expected value.

If they are not equal, the process proceeds to step m8 and the product is determined to be defective.

In step mll, the frequency of the note high signal of each note detected from the test point TP3 is measured, and in step m12 it is determined whether the measured note high signal is equal to a previously prepared expected value.

If they are not equal, the process proceeds to step m8 and the product is determined to be defective.

Note that step m6.7, step m9.10, and step mll, 12 are performed simultaneously.

In step m7.10.12, if the measured value and the expected value are equal, the process proceeds to step m13, where it is determined whether the first music has ended or not. If the music has not ended, the process returns to step m6, 9.11, and is repeated until the music of the first song ends. When the music of the first song ends, the process proceeds from step m13 to step m14, where the hold switch 27 is once turned on and then shut off, the melody IC 2 is stopped, and the hook switch 28 is turned off. step m15
In this step, it is determined whether or not the music of the second song has also been tested. If the second song has not been inspected, proceed to step m16, shut off the select switch 29, select the second song,
Returning to step m3, the music of the second song is inspected. 2
When the inspection of both songs is completed, the process proceeds to step m17, and the product is determined to be non-defective.

Hybrid ICI can be automatically tested through such testing. Furthermore, if it is determined to be a good product, it can also be verified that all data such as commands in the ROM of the melody IC 2 are correctly stored.

Furthermore, a melody IC 2, a clock circuit 3, a power supply terminal 5
, ground terminal 6, on-hook terminal 7, hold terminal 8, hook terminal 9, select terminal IO and select terminal 11
It can also be inspected to see if they are properly attached.

[Effects of the Invention] As described above, according to the present invention, the audio reproduction control signal and the clock signal from the clock circuit are applied to the melody IC,
The note high signal and note length signal output from the melody IC are detected, and the detected note high signal and note length signal and the expected values of the note high signal and note length signal prepared in advance are sequentially calculated for each note. Since we are making comparisons, we are using inexpensive measuring instruments such as frequency counters to automate and reliably test hybrid ICs for melody playback in conditions close to actual use.
can be inspected.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a hybrid IC according to an embodiment of the present invention and its vicinity, Fig. 2 is a diagram showing the relationship between a note length signal and a note high signal, and Fig. 3 is a diagram showing each musical note and a note high signal. FIG. 4 is a flowchart for explaining the present invention in detail, and FIG. 5 is a diagram showing a conventional testing method for testing melody ICs using a digital tester. , FIG. 6 is a diagram for explaining the timing of conventional data reading, and FIG. 7 is a flowchart for explaining the conventional inspection. 1...Hybrid IC 2...Melody IC 3...Clock circuit 4...Synthesis circuit 27...Hold switch 28...Hook switch 29...Select switch Diagram Diagram Condolence Diagram Diagram

Claims (1)

[Scope of Claims] A ROM is provided that stores data representing each note of a melody and data such as instructions for operating a CPU. a one-chip melody IC that sequentially outputs a note high signal representing the length of each note in frequency and a note length signal representing the length of each note in terms of pulse width time; a clock circuit that outputs a clock signal to be applied to the melody IC; and a synthesis circuit that synthesizes a note height signal and a note length signal to output an audio signal; The note height signal and note length signal outputted from the memory IC are detected, and the detected note height signal and note length signal are combined with the expected values of the note height signal and note length signal prepared in advance. An inspection method for a hybrid IC for melody playback, characterized by sequentially comparing each note.