JPH0214826B2 - - Google Patents

Info

Publication number
JPH0214826B2
JPH0214826B2 JP56139452A JP13945281A JPH0214826B2 JP H0214826 B2 JPH0214826 B2 JP H0214826B2 JP 56139452 A JP56139452 A JP 56139452A JP 13945281 A JP13945281 A JP 13945281A JP H0214826 B2 JPH0214826 B2 JP H0214826B2
Authority
JP
Japan
Prior art keywords
line
electronic switch
pcm
test
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56139452A
Other languages
Japanese (ja)
Other versions
JPS5840960A (en
Inventor
Keiichi Myahara
Masao Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP13945281A priority Critical patent/JPS5840960A/en
Publication of JPS5840960A publication Critical patent/JPS5840960A/en
Publication of JPH0214826B2 publication Critical patent/JPH0214826B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • H04M3/24Arrangements for supervision, monitoring or testing with provision for checking the normal operation
    • H04M3/244Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Structure Of Telephone Exchanges (AREA)

Description

【発明の詳細な説明】 本発明はデジタル交換機におけるデジタル回線
(以下PCM回線という)の試験アクセス機能及び
回線切り替え機能を有するデジタル回線収容方式
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital line accommodating system having a test access function and a line switching function for a digital line (hereinafter referred to as a PCM line) in a digital exchange.

従来PCM回線終端装置と外線側はU−LINK
にて接続され、このU−LINKを引き抜く事によ
り終端装置と外線とを切り離すことができ同時に
外線側又は終端装置側へのアクセスも可能であ
る。又、上記U−LINKを接続した状態において
回線のモニタも可能である。PCM回線の収容変
更は人手による接続変更工事が必要である。
Conventional PCM line termination equipment and outside line side are U-LINK
By pulling out this U-LINK, the terminating device and the outside line can be separated, and at the same time, access to the outside line side or the terminating device side is also possible. It is also possible to monitor the line while the U-LINK is connected. Changing the accommodation of PCM lines requires manual connection change work.

しかしながらPCM回線は多重化されたパル
ス・ストリームとしか得られず対向試験切り分け
試験等の場合、各々個別の測定装置、テスト装置
を使用し音声レベルに復調して試験する事にな
る。又、PCM回線の接続替に関しても回線束が
大きく工事性が悪くなり、人手介入が多いなどの
欠点があつた。
However, PCM lines can only be obtained as multiplexed pulse streams, and in the case of two-way tests and separation tests, separate measurement equipment and test equipment must be used for demodulating to audio level and testing. In addition, when changing connections of PCM lines, there were disadvantages such as large line bundles, poor workability, and a lot of manual intervention.

本発明の目的は、デジタル回線配線盤(以下
DDFという)を電子スイツチとスイツチ制御回
路により構成し、DDFを従来の外線とPCM終端
装置との間に設置するのではなく、PCM終端装
置と交換機との間に設置する事により上記欠点を
解決し、工事性が良く、人手介入が少ないデジタ
ル回線収容方式を提供するものである。
The object of the present invention is to provide a digital circuit distribution board (hereinafter referred to as
The above-mentioned drawbacks are solved by configuring a DDF (called a DDF) with an electronic switch and a switch control circuit, and installing the DDF between the PCM termination device and the exchange, instead of installing it between the conventional outside line and the PCM termination device. This provides a digital line accommodation system that is easy to construct and requires little manual intervention.

本発明のデジタル回線収容方式は、電子スイツ
チと電子スイツチ制御回路を備えたデジタル回線
主配線盤をPCM回線終端装置と本体交換機の時
分割通話路との間に設置し、前記電子スイツチお
よびスイツチ制御回路によりデジタル回線対応の
接続替えならびにチヤネル対応の接続替えを試験
台および交換機制御装置から遠隔制御するととも
に前記電子スイツチと試験装置との間に時分割通
話路により構成される被試験回線接続リンクを有
する事を特徴とする。
In the digital line accommodation system of the present invention, a digital line main distribution board equipped with an electronic switch and an electronic switch control circuit is installed between a PCM line termination device and a time division communication path of the main exchange, and the electronic switch and switch control circuit are The circuit remotely controls the connection change for digital lines and the connection change for channels from the test stand and switch control equipment, and also provides a connection link for the line under test consisting of a time-sharing communication path between the electronic switch and the test equipment. It is characterized by having.

次に図面を参照して本発明について説明する。 Next, the present invention will be explained with reference to the drawings.

図は回線試験装置を含めた本発明の一実施例を
示す方式図である。他局からのPCM回線はまず、
PCM回線終端装置(以下DTという)1に接続さ
れる。DT1は公知のフレーム同期回路、単極性
−双極性(Unipolar−Bipolar)変換回路、フレ
ームアライナ信号検出回路、フレームアライナ信
号挿入回路から成り、PCM信号は本体交換機2
のクロツクに同期した30チヤネル多重化ビツトス
トリームとしてDDF3の電子スイツチ(以下
DSW)31へ入力される。このDSW31の出力
信号は電子スイツチによりチヤネル対応又は
PCM回線対応に接続替えされた30チヤネル多重
化ビツトストリームとして本体交換機2の時分割
通話路へ接続される。DDF3のDSW31の接続
制御はDDF3の電子スイツチ制御装置(以下
DSW CTLという)32により行う。
The figure is a system diagram showing an embodiment of the present invention including a line testing device. First, the PCM line from another station is
It is connected to a PCM line termination device (hereinafter referred to as DT) 1. The DT1 consists of a known frame synchronization circuit, a unipolar-bipolar conversion circuit, a frame aligner signal detection circuit, and a frame aligner signal insertion circuit, and the PCM signal is transmitted to the main exchange 2.
A DDF3 electronic switch (hereinafter referred to as
DSW) 31. The output signal of this DSW31 can be channel-compatible or
It is connected to the time-division communication path of the main exchange 2 as a 30-channel multiplexed bit stream that has been changed to support a PCM line. DDF3's DSW31 connection control is DDF3's electronic switch control device (hereinafter referred to as
DSW CTL) 32 is used.

このDDF3はさらにPCM回線保守試験装置と
のインタフエイスとして通話路及び制御信号接続
インタフエイスを有する。回線試験を行う為には
通話音声の送受、及び回線制御信号の送受が必要
となる。被試験チヤネル又はPCM回線は電子ス
イツチDDF3により被試験回線リンクへ接続さ
れる。電子スイツチDDF3は受信した音声及び
制御信号を抽出すると共に送信する音声及び制御
信号を挿入し、30チヤネル多重化ビツトストリー
ムとして試験機内の時分割通話路(以下M−
LINKという)4へ導く。被試験チヤネル又は
PCM回線の接続替え制御を行うための制御リン
クがDSW−CTL32及び試験制御用プロセツサ
(以下TST・Pという)5間に設けられている。
This DDF 3 further has a communication path and a control signal connection interface as an interface with the PCM line maintenance test equipment. In order to perform a line test, it is necessary to send and receive voice calls and send and receive line control signals. The channel under test or PCM line is connected to the line under test link by an electronic switch DDF3. The electronic switch DDF3 extracts the received voice and control signals, inserts the voice and control signals to be transmitted, and creates a 30-channel multiplexed bit stream on the time-division communication path (hereinafter referred to as M-) within the test equipment.
LINK) leads to 4. Channel under test or
A control link for controlling connection switching of the PCM line is provided between the DSW-CTL 32 and the test control processor (hereinafter referred to as TST/P) 5.

PCM回線試験時保守者は試験台(以下CSLと
いう)6より試験内容及び被試験チヤネル又は
PCM回線を指定する事によりTST・P5より
DDF3のDSW CTL32へ引き込み指示を行う。
保守者は試験機内の各種サービストランク
(SVT)7を使用する事により外線側及び本体交
換機側の回線特性試験及び回線機能試験が可能で
ある。
During the PCM line test, the maintenance personnel will use the test stand (hereinafter referred to as CSL) 6 to confirm the test contents and the channel under test.
From TST/P5 by specifying the PCM line.
Instructs DDF3's DSW CTL32 to pull in.
By using the various service trunks (SVT) 7 in the test equipment, maintenance personnel can perform line characteristic tests and line function tests on the outside line side and the main exchange side.

回線試験後のPCM回線接続替え及び回線障害
時にはCSL6からの接続替えが可能であるととも
に本体交換機2の制御装置(CP)8とTST・P
5との間に制御リンクをもうける事により交換機
本体からの自動回線試験及び回線接続替えの遠隔
制御が可能である。
It is possible to change the PCM line connection after a line test or to change the connection from CSL 6 in the event of a line failure, and also connects the controller (CP) 8 of the main exchange 2 to the TST/P.
By creating a control link between the switch and the switch, automatic line tests and line connection changes can be remotely controlled from the main body of the exchange.

このように、DDF3をDSW31とDSW−
CTL32により構成し、DSW31とCSL6との
間にM−LINK4を設けて被試験回線接続リンク
を持たせる事により接続替え操作がPCM回線対
応のみならずチヤネル対応で可能となる。又、
CSL6あるいはCP8から接続替えの遠隔制御が
可能となり、回線障害時の回線切り替え操作を自
動的に行いうるとともに接続組合せの自由度が向
上する。なお本発明ではDDFを従来の外線と
PCM回線終端装置との間に設置するのではなく
PCM終端装置と交換機との間に設置する。本設
置位置においてPCM回線のタイミングは本体交
換機のクロツクにより一義的に決定される事から
回線接続替え時の同期はずれがなく外線に悪影響
をあたえる事なく予防保守試験を行なえる。
In this way, DDF3 is connected to DSW31 and DSW-
By constructing the CTL 32 and providing an M-LINK 4 between the DSW 31 and the CSL 6 to provide a connection link for the line under test, connection change operations are possible not only for PCM lines but also for channels. or,
Connection switching can be remotely controlled from CSL6 or CP8, allowing line switching to be performed automatically in the event of a line failure, and increasing flexibility in connection combinations. In addition, in the present invention, DDF is different from the conventional outside line.
Rather than installing it between the PCM line termination device
Installed between the PCM termination equipment and the exchange. At this installation location, the timing of the PCM line is uniquely determined by the clock of the main exchange, so there is no loss of synchronization when changing line connections, and preventive maintenance tests can be performed without adversely affecting outside lines.

本発明は以下説明したようにDDFを電子スイ
ツチとスイツチ制御回路より構成する事により工
事による人手介入がないため、接続替え所要時間
の短縮ができ、局データの変更と接続替えの一元
処理が可能となる。また、回線試験アクセスにお
いてもPCM回線対応のみならずチヤネル単位の
試験が試験項目毎に個別装置で行う必要がなく、
音声レベルでの試験及びモニタが可能となるなど
の効果がある。
As explained below, in the present invention, by configuring the DDF from an electronic switch and a switch control circuit, there is no need for manual intervention during construction, so the time required for connection changes can be shortened, and it is possible to centrally process changes to station data and connection changes. becomes. In addition, for line test access, there is no need to test not only PCM line support but also channel-by-channel tests using separate equipment for each test item.
This has the effect of enabling testing and monitoring at the audio level.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の一実施例を示す方式図である。 1:PCM回線終端装置(DT)、2:交換機本
体、3:デジタル回線配線盤(DDF)、31:電
子スイツチ(DSW)、32:電子スイツチ制御装
置(DSW CTL)、4:試験装置時分割通話路
(M−LINK)、5:試験装置プロセツサ
(TST・P)、6:試験台(CSL)、7:各種サー
ビストランク(SVT)、8:交換機本体の制御装
置(CP)。
The figure is a system diagram showing one embodiment of the present invention. 1: PCM line termination device (DT), 2: Exchange main body, 3: Digital line distribution board (DDF), 31: Electronic switch (DSW), 32: Electronic switch control device (DSW CTL), 4: Test equipment time division Communication path (M-LINK), 5: Test equipment processor (TST/P), 6: Test stand (CSL), 7: Various service trunks (SVT), 8: Switch main body control device (CP).

Claims (1)

【特許請求の範囲】[Claims] 1 電子スイツチと電子スイツチ制御回路を備え
たデジタル回線主配線盤をPCM回線終端装置と
本体交換機の通話路との間に設置し、前記電子ス
イツチ及びスイツチ制御回路によりデジタル回線
対応の接続替えならびにチヤネル対応の接続替え
を試験台および交換機制御装置から遠隔制御する
とともに、前記電子スイツチと試験台との間に時
分割通話路により構成される被試験回線接続リン
クを有する事を特徴とするデジタル回線収容方
式。
1. A digital line main distribution board equipped with an electronic switch and an electronic switch control circuit is installed between the PCM line termination device and the communication path of the main exchange, and the electronic switch and switch control circuit perform connection change and channel support for digital lines. Digital line accommodation, characterized in that compatible connection changes are remotely controlled from a test stand and a switching equipment control device, and a line under test connection link constituted by a time-division communication path is provided between the electronic switch and the test stand. method.
JP13945281A 1981-09-04 1981-09-04 Storing system of digital circuit Granted JPS5840960A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13945281A JPS5840960A (en) 1981-09-04 1981-09-04 Storing system of digital circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13945281A JPS5840960A (en) 1981-09-04 1981-09-04 Storing system of digital circuit

Publications (2)

Publication Number Publication Date
JPS5840960A JPS5840960A (en) 1983-03-10
JPH0214826B2 true JPH0214826B2 (en) 1990-04-10

Family

ID=15245534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13945281A Granted JPS5840960A (en) 1981-09-04 1981-09-04 Storing system of digital circuit

Country Status (1)

Country Link
JP (1) JPS5840960A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55105466A (en) * 1979-02-07 1980-08-13 Nec Corp Exchange system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55105466A (en) * 1979-02-07 1980-08-13 Nec Corp Exchange system

Also Published As

Publication number Publication date
JPS5840960A (en) 1983-03-10

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