JPS5840960A - Storing system of digital circuit - Google Patents

Storing system of digital circuit

Info

Publication number
JPS5840960A
JPS5840960A JP13945281A JP13945281A JPS5840960A JP S5840960 A JPS5840960 A JP S5840960A JP 13945281 A JP13945281 A JP 13945281A JP 13945281 A JP13945281 A JP 13945281A JP S5840960 A JPS5840960 A JP S5840960A
Authority
JP
Japan
Prior art keywords
connection
circuit
switching
line
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13945281A
Other languages
Japanese (ja)
Other versions
JPH0214826B2 (en
Inventor
Keiichi Miyahara
宮原 景一
Masao Hashimoto
雅男 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13945281A priority Critical patent/JPS5840960A/en
Publication of JPS5840960A publication Critical patent/JPS5840960A/en
Publication of JPH0214826B2 publication Critical patent/JPH0214826B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • H04M3/24Arrangements for supervision, monitoring or testing with provision for checking the normal operation
    • H04M3/244Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Structure Of Telephone Exchanges (AREA)

Abstract

PURPOSE:To eliminate the intervention of man power, to shorten the time required for switching of connection and to attain a unified process for both a change of a station data and the switching of connection, by constituting a digital circuit distributing board with an electronic switch and a switch control circuit. CONSTITUTION:A digital circuit main distributing board 3 is constituted with an electronic switch 31 and a switch control circuit 32 to store the digital circuit. A remote control is given to the switching of connection corresponding to the digital circuit and the switching of connection corresponding to the channel from a test board 6 and an exchange controller 8 and via the switch 31 and the circuit 32. At the same time, a connection link of a circuit to be tested is provided between the switch 31 and a tester. Thus the switching of connection is possible not only in response to a PCM circuit but in response to a channel.

Description

【発明の詳細な説明】 本発明はデジタル交換機におけるデジタル回線(以下P
CM回線という)の試験アク±ス機能及び回線切シ替え
機能を有するデジタル回線収容方式に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital line (hereinafter referred to as P
This invention relates to a digital line accommodation system having a test access function and a line switching function for CM lines.

従来PCM回縁終端装置と外線側はU−LINKにて接
続され、このU−LINKを引き抜く事により終端装置
と外線とを切9離すことかで色間時に外線側又は終端装
置側へのアクセスも可能である。
Conventionally, the PCM line termination device and the outside line side are connected by a U-LINK, and by pulling out this U-LINK, the termination device and the outside line are separated, allowing access to the outside line side or the termination device side at the time of color separation. is also possible.

又、上記U−LINKを接続した状態において回線のモ
ニタも可能である。PCM回線の収容変更は人手による
接続変東工事が必要である。
It is also possible to monitor the line while the U-LINK is connected. Changing the accommodation of PCM lines requires manual connection work.

しかしながらPCM回線は多重化されたパルス弓0リー
ムとしか得られず対向試験切プ分は試験等の場合、各々
個別の測定装置、テスト装置を使用し音声レベルに復−
して試験する事になる。
However, with PCM lines, only multiplexed pulse bow beams can be obtained, and in the case of tests, etc., separate measurement equipment and test equipment are used to restore the audio level.
I'll have to test it.

又、PCM回線の接続替に関しても回線束が大きく工事
性が良くなシ、人手介入が多いなどの欠点がめりた。
In addition, when it comes to changing connections of PCM lines, disadvantages such as the large line bundle, poor workability, and a lot of manual intervention have been identified.

本発明の目的は、デジタル回線配線盤(以下DDFとい
う)を電子スイッチとスイッチ制御回路により構成し、
DDFt従来の外縁とPCM終端装置との間に設置する
のではな(、PCM終端装置と交換機との間に設置する
事によp上記欠点を解決し、工事性が良く、人手介入が
少ないデジタル回線収容方式を提供するものである。
The object of the present invention is to configure a digital distribution board (hereinafter referred to as DDF) with an electronic switch and a switch control circuit,
DDFtInstead of installing it between the conventional outer edge and the PCM termination device (DDFt), by installing it between the PCM termination device and the switch, digital It provides a line accommodation method.

本発明のデジタル回線収容方式は、デジタル回線主配線
盤を電子スイッチとスイッチ制御回路によシ構成し、I
ItI記電子スイッチおよびスイッチ制御回路によりデ
ジタル回線対応の接続替えならびにチャネル対応の接続
替えを試験台および交換機制御装置から遠隔制御すると
ともに前記電子スイ、チと試験装置との間に被試験回線
接続リンクを有することを特徴とする。
The digital line accommodation method of the present invention consists of a digital line main distribution board with electronic switches and switch control circuits,
The electronic switch and switch control circuit remotely control the connection change for digital lines and the connection change for channels from the test bench and exchange control device, and also provide a connection link for the line under test between the electronic switch and the test equipment. It is characterized by having the following.

次に図面を参照して本発明について説明する。Next, the present invention will be explained with reference to the drawings.

PCM回1終端装置t(以下DTという)1に接続され
る。DTIは公知のフレーム同期回路、単極性−双極性
(Unipolar −Bipolar )変換回路。
The PCM circuit 1 is connected to a terminal device t (hereinafter referred to as DT) 1. DTI is a well-known frame synchronization circuit, unipolar-bipolar conversion circuit.

7レ一ムアライナ信号検出挿入回路、フレームアライナ
検出挿入回路から成L PCM信号ば本体交換機2のク
ロックに同期した30チャネル多電化ビ、トスドリーム
としてDDF3の電子スイッチ(以下DSW)31へ入
力される。このDSW31の出力信号は電子スイッチに
よりチャネル対応又はPCM回線対応に接続替えされた
30チャネル多重化ピットストリームとして本体交換機
2の時分割通話路へ接続される。DDF3のD8W31
の接続制御はDDF3の電子スイッチ制御装置(以下D
8W CTLという)32によシ行う。
The L PCM signal generated from the 7-frame aligner signal detection and insertion circuit and the frame aligner detection and insertion circuit is input to the electronic switch (hereinafter referred to as DSW) 31 of the DDF 3 as a 30-channel multi-electrification video synchronized with the clock of the main exchange 2, and as a toss dream. . The output signal of this DSW 31 is connected to the time-division communication path of the main exchange 2 as a 30-channel multiplexed pit stream which is changed to correspond to channels or PCM lines by an electronic switch. DDF3 D8W31
The connection control is performed by the DDF3 electronic switch control device (hereinafter referred to as D
(referred to as 8W CTL) 32.

このDDF3はさらにPCM回線保守試験装置とのイン
タフスイスとして通話路及び制御信号接続インク7エイ
スを有する。被試験チャネル又はPCM回線はDDF8
のD8W31で挿入、抽出され、30チャネル多重化ピ
ットスドリーふとじて試験機内の時分割通話路(以下M
−LINKという)4へ導かれ被試験チャネル又はPC
M回線の接続替え制御を行うための制御リンクをnsw
−CTL32及び試験制御用プロセッサ(以下TST・
Pという)5関に有する。
This DDF 3 further has a communication path and control signal connection ink 7A as an interface with the PCM line maintenance test equipment. The channel or PCM line under test is DDF8
D8W31 is used to insert and extract the 30-channel multiplexed Pittsudley Futjite test machine's time-division communication channel (hereinafter referred to as M
-LINK) 4 to the channel under test or PC.
nsw control link for controlling connection switching of M line
-CTL32 and test control processor (hereinafter TST)
(referred to as P).

PCM回線試験時保守者は試験台(以下C8Lという)
6より試験内容及び被試験チャネル又はPCM回線を指
定する事によfiTsT−P5!すDDF3のD8WC
TL32へ引き込み指示を行う。
During the PCM line test, the maintenance person is on the test stand (hereinafter referred to as C8L)
fiTsT-P5! by specifying the test content and the channel or PCM line under test from 6! D8WC of DDF3
Instructs TL32 to pull in.

保守者は試験機内の各種サービストランクC3VT)7
t−使用する事により外1iNjA及び本体交換機側の
回線特性試験及び回線機能試験が可能である。
The maintenance person is responsible for various service trunks in the test aircraft C3VT)7
By using t-, it is possible to test the line characteristics and function of the external 1iNjA and the main exchange side.

回線試験後のPCM回線接続替え及び回線障害時にはC
S L 6’からの接続替えが可能であるとともに本体
交換機2の制御装置(CP)8とTST・P5との間に
制御リンクをもうける事により交換機本体からの自動回
線試験及び回lIM接続替えの遠隔制御が可能である。
C in case of PCM line connection change after line test and line failure
It is possible to change the connection from the S L 6', and by creating a control link between the control device (CP) 8 of the main exchange 2 and the TST/P5, it is possible to perform automatic line tests and line IM connection changes from the main exchange. Remote control is possible.

このように、DDF3をDSW31とDSW−CTL3
2によシ構成し、試験用デジタルスイ。
In this way, DDF3 is connected to DSW31 and DSW-CTL3.
2 configuration, digital switch for testing.

チへの接続リンクを持たせる事によシ接続替え操作がP
CM回線対応のみならずチャネル対応で可能となる。又
%C3L6あるいはCP8から接続替えの遠隔制御が可
能となり、回線障害時の回線切シ替え操作を自動的に行
いうるとともに接続組合せの自由度が向上する。なお本
発明ではDDFt従来の外線とPCM回線終端装置との
間に設置するのではなくPCM終端装置と交換機との間
に設置する0本設置位置においてPC°M回線のタイき
ングは本体交換機のクロックにより一義的に決定される
事から回線接続替え時の同期はずれがなく外11KI&
影響t−Sたえる事なく予防保守試験を行な見る。
By providing a connection link to the
This is possible not only for CM lines but also for channels. Furthermore, connection switching can be remotely controlled from %C3L6 or CP8, and line switching operations can be automatically performed in the event of a line failure, and the degree of freedom in connection combinations is improved. In addition, in the present invention, the DDFt is not installed between the conventional outside line and the PCM line termination device, but is installed between the PCM termination device and the exchange. Because it is uniquely determined by the clock, there is no loss of synchronization when changing line connections, and external 11KI&
Perform preventive maintenance tests without any impact.

本発明は以下説明したようにDDFを電子スイッチとス
イッチ制御回路よシ構成する事によプ工事による人手介
入がないため、接続替え所要時間の短縮ができ2局デー
タの変更と接続替えの一元処理が可能となる。tた、回
線試験アクセスにおいてもPCM回線対応のみならずチ
ャネル単位の試験が試験項目毎に個別装置で行う必要が
なく。
As explained below, the present invention configures the DDF with an electronic switch and a switch control circuit, thereby eliminating the need for manual intervention during installation work, thereby reducing the time required for connection changes and unifying data changes and connection changes for two stations. processing becomes possible. Furthermore, in line test access, there is no need to test not only PCM line compatibility but also channel-by-channel tests using individual devices for each test item.

音声レベルでの試験及びモニタが可能となるなどの効果
がある。
This has the effect of enabling testing and monitoring at the audio level.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の一実施例を示す方式図である。 1:PCM回線終端装置(DT)、2:交換機本体、3
:デジタル回線配線盤(DDF)、31:電子スイッチ
(DEW)、32;電子スイッチ制御装置(DSWCT
L)、4 :試験装置時分割通話路(M−LINK)、
5:試験装置ブロモ、す(TST・P)、6:試験台(
C8L)、7:各種サービストランク(SvT)、8:
交換機本体の制御装置(CP)。
The figure is a system diagram showing one embodiment of the present invention. 1: PCM line termination device (DT), 2: Exchange main body, 3
: Digital distribution board (DDF), 31: Electronic switch (DEW), 32; Electronic switch control device (DSWCT)
L), 4: Test equipment time division communication path (M-LINK),
5: Test equipment Bromo, Su (TST/P), 6: Test stand (
C8L), 7: Various service trunks (SvT), 8:
Control device (CP) of the main body of the exchange.

Claims (1)

【特許請求の範囲】[Claims] デジタル回融主配線盤f−電子スイッチ制御回路によ多
構成し、前記電子スイッチ及びスイッチ制御回路により
デジタル回線対応の接続替えならびにチャネル対応の接
続替えを試験台および交換機制御装置から遠隔制御する
とともに、前記電子スイッチと試験装置との間に被試験
回Iil接続すンク會有する事を4I徴とするデジタル
回線収容方式。
The digital recirculating main distribution board f- is configured with multiple electronic switch control circuits, and the electronic switch and switch control circuit remotely control the connection change for digital lines and the connection change for channels from the test bench and exchange control device. , a digital line accommodation system whose 4I characteristic is to have a connection between the electronic switch and the test equipment.
JP13945281A 1981-09-04 1981-09-04 Storing system of digital circuit Granted JPS5840960A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13945281A JPS5840960A (en) 1981-09-04 1981-09-04 Storing system of digital circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13945281A JPS5840960A (en) 1981-09-04 1981-09-04 Storing system of digital circuit

Publications (2)

Publication Number Publication Date
JPS5840960A true JPS5840960A (en) 1983-03-10
JPH0214826B2 JPH0214826B2 (en) 1990-04-10

Family

ID=15245534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13945281A Granted JPS5840960A (en) 1981-09-04 1981-09-04 Storing system of digital circuit

Country Status (1)

Country Link
JP (1) JPS5840960A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55105466A (en) * 1979-02-07 1980-08-13 Nec Corp Exchange system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55105466A (en) * 1979-02-07 1980-08-13 Nec Corp Exchange system

Also Published As

Publication number Publication date
JPH0214826B2 (en) 1990-04-10

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