JPH02146649A - Information processing system - Google Patents

Abstract

PURPOSE:To secure the correspondence to the fault information on a channel device based on the time by storing the time of occurrence of the fault of an input/output controller and therefore collecting the fault information stored once in an internal memory of an input/output control memory after a fixed time. CONSTITUTION:A 1st input/output controller 2 includes a fault detecting means 22 which detects the internal fault of the controller 2 and the fault of an input/ output interface 21, a reading means 24 which reads the time data out of an internal timepiece 11 of a system, a memory means 25 which stores the fault information and the time data, and a data transfer control means 21 which controls the write of the fault information to the means 25 via the information of the means 22. In such a constitution, the time of the fault occurrence is stored together with the fault information and the correspondence is secured to the fault information on a channel device. Then the fault dissolving time is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing system, and in particular, an information processing system connected between a main storage device and an input/output device, and
The present invention relates to a method for storing failure information of an input/output control device in an information processing system that includes an input/output control device that is connected to a channel device via an input/output infrastructure and performs data transfer, and a clock inside the system.

[Prior Art] Conventionally, a failure storage method for an input/output control device stores only failure information in the internal memory of the input/output control device.

[Problem to be solved by the invention] However, in the conventional technology, in the case of a failure in an input/output control device, only the details of the failure are stored in the internal memory, so even if you look at the failure information, the time of occurrence cannot be determined. The downside is that I don't understand.

In addition, since the time is not known, it is difficult to correlate the failure information of the channel device connected to the input/output control device.
It has the disadvantage that it takes H1 to resolve the problem.

SUMMARY OF THE INVENTION In view of the above drawbacks, it is a technical object of the present invention to provide an information processing system that can shorten the time required to solve a problem.

[Means for Solving the Problems] According to the present invention, a main storage device and an input/output device are connected to the input/output device, and are also connected to a channel device via an input/output interface to transfer data. In an information processing system that includes first and second input/output control devices, each of which performs a failure detection means for detecting a failure on the interface; a reading means for reading time data from a clock inside the system; a storage means for storing failure information of the failure and the time data; An information processing system is obtained, characterized in that it has a control means for controlling writing of the failure information into a storage means.

Further, according to the present invention, an input/output control device is connected to the input/output device between the main storage device and the input/output device, and is connected to the channel device via the input/output interface to transfer data; In the information processing system having a clock means inside the system, the input/output control device includes a failure detection means for detecting a failure inside the input/output control device and a failure on the input/output interface, and a failure information of the failure. a storage means for storing time data, a control means for controlling writing of failure information into the storage means based on notification from the failure detection means, a reading means for reading out time data from a clock means inside the system, An information processing system characterized by having a notification means for notifying other input/output control devices of time data is obtained.

Further, according to the present invention, the channel device and the input/output control device that transfer data between the main storage device and the input/output device are connected via the input/output interface for normal use and for failure time, and In the information processing system having a clock within the system, the channel device has a first reading means for reading the clock, and the input/output control device is configured to detect failures inside the input/output control device and the normal time input. a fault detection means for detecting a fault on the output interface;
a control means for controlling the failure input/output interface based on a notification from the failure detection means; and a control means for reading data by the first reading means of the channel device via the failure input/output interface. An information processing system is obtained in which the second reading means and the storage means for storing the data of the second reading means and the failure information inside the input/output control device are made white.

[Example] Next, embodiments of the present invention will be described with reference to the drawings.

First Embodiment FIG. 1 is a diagram showing a first embodiment of the present invention, in which a plurality of input/output control devices are connected to an input/output device and are connected to a channel device via an input/output interface. . The service processor 1 is also connected to each input/output control device.

The service processor 1 includes a timer circuit 1, and the timer circuit 11 is connected to the register 24 of the input/output control device (0) 2 and the registers of other input/output control devices (not shown).

The input/output control device (0) 2 includes a data transfer control circuit 21, a failure detection circuit 22, a failure control circuit 23, a register 24, and a log memory 25. Data transfer control circuit 21
is a circuit that controls data transfer and outputs fault information to the log memory 25; a fault detection circuit 22 detects a fault on the input/output interface and a fault in the data transfer control circuit 2], and outputs the detected fault information to a fault detection circuit 23. circuit, fault control circuit 2
3 is a circuit that controls writing of fault information to the log memory 25 when a fault occurs, and a register 24 is connected to the timer circuit 1 of the service processor 1, and holds the time data output from the timer circuit, and the register 24 is The log memory 25 is a memory in which failure information of the data transfer control circuit 21 and the output of the register 24 are written.

In addition, other input/output control devices (not shown) are similarly provided with a data transfer control circuit, a fault detection circuit, a fault control circuit, a register, and a log memory.

Next, the operation will be explained.

When the input/output device connected to the input/output control device (0) 2 is transferring data between the main storage device, the data transfer control circuit 21 is operating.

When a fault occurs on the data transfer control circuit 21 or the input/output interface line, the fault detection circuit 22 detects the fault and notifies the fault control circuit 23. When the fault control circuit 23 receives the notification, it controls the data transfer control circuit 21.
The failure information and the time data held in the register 24 are sequentially written to the log memory 25, and the failure processing is completed. Next, data transfer is restarted under the control of the data transfer control circuit 21.

Even when the fault information stored in the log memory 25 is output after a period of time has elapsed, the time of fault occurrence can be determined from the time data stored as data in the register 24.

Furthermore, even if a failure occurs in another input/output control device, the same operation as the ``double operation'' is performed, and the time when the failure occurred can be determined by reading the log memory.

Second Embodiment FIG. 2 is a diagram showing a second embodiment of the present invention, in which a plurality of input/output control devices (0), (1), etc. are connected to input/output devices, and It is connected to the channel device via an output interface. A service processor 1 is also connected to an input/output control device (0).

The service processor 1 includes a timer circuit 11, and the timer circuit 11 is connected to the register 24 of the input/output control device (O) 2.

The input/output control device (0) 2 includes a data transfer control circuit 21, a failure detection circuit 22, a failure control circuit 23, and a register 2.
4 and a log memory 25. The data transfer control circuit 2 is a circuit that controls data transfer and outputs fault information to the log memory 25. The fault detection circuit 22 is a circuit that detects a fault on the input/output interface and a fault in the data transfer control circuit 21 and outputs the detected fault to the fault control circuit 23. Fault control circuit 2
3 is a circuit that controls writing of fault information to the log memory 25 when a fault occurs. The register 24 manually inputs the time data of the timer circuit 11 of the service processor 1,
This is a register that outputs to the log memory 25 and the register 34 of the other input/output control device (1). The log memory 25 is a memory in which failure information of the data transfer control circuit 21 and time data output of the register 24 are written.

Although not shown, other input/output control devices are similarly provided with a data transfer control circuit, a fault detection circuit, a fault control circuit, a register, and a log memory.

Next, the operation of the second embodiment will be explained.

When the input/output device connected to the input/output control device (O) 2 is transferring data with the main storage device, the data transfer control circuit 21 is operating.

The register 24 also reads time data from the timer circuit 11 and notifies it to the input/output control device (1) register 34 as well.

When a failure occurs on the data transfer circuit 21 or the input/output interface, the failure detection circuit 22 detects the failure and notifies the failure control circuit 23. Fault control circuit 2
3 receives the notification and sequentially writes the failure information of the data transfer control circuit 21 and the time data held in the register 24 to the log memory 25, and finishes the failure processing. Next, data transfer is restarted under the control of the data transfer control circuit 21.

Even when the fault information stored in the log memory 25 is output after a period of time has elapsed, the time of fault occurrence can be determined from the time data stored as data in the register 24.

Also, when a failure occurs in another input/output control device (1) 2, the same operation as described above is performed and the log memory is read.

1. Third Embodiment FIG. 3 is a diagram showing a third embodiment of the present invention, in which a channel device 20 and an input/output control device 30 are provided between the main memory and the input/output device for normal use and for failure. A central processing unit 10 is connected to a channel device 20 via an input/output interface.

The central processing unit 10 includes a timer circuit 11, and the timer circuit 11 is connected to a register 36 of the input/output control device 30.

Channel device 20 includes a control circuit 27 and a register 26. The control circuit 27 is connected to the input/output control device 30 by a signal line 41 and a signal line 42 of the input/output interface for failure, and the register 26 is a circuit that notifies the register 26 of a write instruction. This is a register connected to the register 36 of the input/output control device 30.

The input/output control device 30 includes a data transfer control circuit 31, a failure detection circuit 32, a failure control circuit 33, and a register 36.
and the log memory 35. The data transfer control circuit 31 controls data transfer and stores fault information in the log memory 35.
The fault detection circuit 32 detects faults on the normal input/output interface and the data transfer control circuit 31.
The fault control circuit 33 issues a write instruction to the register 36 when a fault occurs, and controls writing of log data to the log memory 35 instead of controlling the data transfer control circuit 31. The circuit/register 36 is connected to the register 26 of the channel device 20 via the input/output interface 43, and the register/log memory 35 outputs time data to the log memory 35, which outputs failure information of the data transfer control circuit 31. and a memory into which the output of the register 36 is written.

Next, the operation will be explained.

During data transfer between the main memory and the input/output control device 300, the data transfer control circuit 31 of the input/output control device 30 is operating.

When a fault occurs on the data transfer control circuit 31 or the normal input/output interface line, the fault detection circuit 32 detects the fault and notifies the fault control circuit 33. When the fault control circuit 33 receives the notification, it turns on the output of the signal line 41 and writes the fault information of the data transfer control circuit 3 to the log memory 35.

The control circuit 21 of the channel device 20 has the signal line 41 connected to
When the N state is reached, a write instruction is issued to the register 26, and the signal line 42 is turned on. Upon receiving the write instruction, the register 26 writes the time output by the timer circuit 11 of the central processing unit 10, outputs it on the input/output interface, and notifies the input/output control unit 30.

Further, when the signal line 42 is turned on, the fault control circuit 33 of the input/output control device 30 turns the output of the signal line 41 off.
FF state and input/output interface 4 to register 36.
Issue an instruction to write the data above. Upon receiving the write instruction, the register 36 takes in the time, which is data on the input/output interface 43, and outputs it to the log memory 35.

Next, the failure control circuit 33 stores the register 36 in the log memory 35.
Write the time from.

The control circuit 21 of the channel device 20 connects the signal line 41 or
When the OFF state is reached, the output of the signal line 42 is turned OFF.

The fault control circuit 33 of the input/output control device 3 connects the signal line 4
2 is turned off, the fault handling is completed and data transfer is resumed under the control of the data transfer control circuit 31.

Even when the log data logged in the log memory 35 is inputted after a period of time has elapsed, the time at which the failure occurred can be determined from the logged time as data in the register 36.

[Effects of the Invention] As explained above, in the present invention, when a fault occurs in the input/output control device, the time of occurrence can be stored, so that the fault information once stored in the internal memory of the input/output control memory can be stored over time. It becomes possible to collect the information after the time has passed, and it becomes possible to correspond (=I) with the fault information of the channel device based on the time.This allows for flexibility in handling faults in the information processing system and shortens the troubleshooting time. It has a measurable effect.

[Brief explanation of the drawing]

1 to 3 are diagrams showing first to third embodiments of the present invention. 1... Service processor, 2... Input/output control device (
0), 10... Central processing unit, 11... Timer circuit, 20... Channel device, 21... Data transfer control circuit, 22... Fault detection circuit, 23... Fault control circuit, 2434...Register, 25. 35...Log memory, 2636...Register, 27...Control circuit,
31... Data transfer circuit, 32... Fault detection circuit,
33...fault control circuit, 41, 42.43...15
Line.

Claims (1)

[Claims] 1) An input/output control device that is connected to the input/output device and connected to the channel device via the input/output interface to transfer data between the main storage device and the input/output device. and a clock inside the system, wherein the input/output control device includes a failure detection means for detecting a failure inside the input/output control device and a failure on the input/output interface, and a clock inside the system. a reading means for reading out time data from the fault, a storage means for storing fault information of the fault, and a control means for controlling writing of the fault information into the storage means based on a notification from the fault detection means; An information processing system characterized by storing time data when a failure occurs in a device. 2) between the main storage device and the input/output device, first and second input/output controls that are connected to the input/output device and connected to the channel device via the input/output interface, and perform data transfer, respectively; and an information processing system having a clock inside the system, wherein the first input/output control device includes a failure detection means for detecting a failure inside the input/output control device and a failure on the input/output interface; a reading means for reading time data from a clock inside the system; a storage means for storing failure information of the failure; a control means for controlling writing of failure information into the storage means based on notification from the detection means; and a notification means for notifying data to the second input/output control device, and storing time data when a failure of the first input/output control device and a failure of the input/output interface occur. processing system. 3) A channel device and an input/output control device that transfer data between the main storage device and the input/output device are connected via an input/output interface for normal use and for failure,
An information processing system having a clock inside the system, wherein the channel device has a first reading means for reading the clock, and the input/output control device is configured to detect failures inside the input/output control device and the normal time. failure detection means for detecting a failure on the input/output interface for failure; a second reading means 2 for reading data from the first reading means of the channel device via the input/output interface for failure; storage means for storing the data in the readout means 2 and fault information inside the input/output control device; and a storage means for storing the data in the reading means 2 and fault information inside the input/output control device; An information processing system comprising: control means for reading time by the first and second reading means at the time of occurrence and storing the time in the storage means.