JPH02144635A - Device fault diagnostic system - Google Patents

Device fault diagnostic system

Info

Publication number
JPH02144635A
JPH02144635A JP63298526A JP29852688A JPH02144635A JP H02144635 A JPH02144635 A JP H02144635A JP 63298526 A JP63298526 A JP 63298526A JP 29852688 A JP29852688 A JP 29852688A JP H02144635 A JPH02144635 A JP H02144635A
Authority
JP
Japan
Prior art keywords
processor
diagnostic
processing
monitoring circuit
fault information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63298526A
Other languages
Japanese (ja)
Inventor
Tsuneo Fujiwara
藤原 常雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63298526A priority Critical patent/JPH02144635A/en
Publication of JPH02144635A publication Critical patent/JPH02144635A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To inform the state of a processor generating a fault by communicating data including detected fault information for the operation of a self-processor and detected fault information for the operation of the other processor from plural monitoring circuits to a diagnostic device. CONSTITUTION:A diagnostic bus D connects the diagnostic device B to a monitoring circuit 1 in a processor 1 and a monitoring circuit A2 in a processor 2. Data including detected fault information for the operation of the self- processor 1 and monitored detected fault information for the operation of the other processor 2 are communicated from the monitoring circuit A1 to the device B. On the other hand, data including detected fault information for the operation of the self-processor 2 and monitored and detected fault information for the operation of the other processor 1 are communicated from the monitoring circuit A2 to the device B. Consequently, the diagnosing device B can collect or edit fault information at the time of generating faults in the operation of plural processors 1, 2 through the diagnostic bus D and check normality.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は装置障害診断方式に関し、特に診断装置による
複数の処理袋での装置障害診断方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a system for diagnosing equipment failures, and more particularly to a system for diagnosing equipment failures in a plurality of processing bags using a diagnostic device.

〔従来の技術〕[Conventional technology]

情報処理システムにおける診断装置による複数の処理装
置に対する従来の装置障害診断方式は、複数の処理装置
のそれぞれから、障害が発生したときに、診断装置への
通知や割込み要求により、自己の動作に対する障害情報
を診断装置に送付している。
In the conventional device fault diagnosis method for multiple processing devices using a diagnostic device in an information processing system, when a fault occurs, each of the multiple processing devices sends a notification to the diagnostic device or requests an interrupt to detect the problem in its own operation. Sending information to diagnostic equipment.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

情報処理システノ、におζ“)る上述した従来の装置障
害診断方式は、処理装置のそitそれから、障害が発生
したときに、自己の動作に対する障害情報を送付し、て
いるので、lI!害を発生した処理袋Tが何らかの要因
で動作不可の状態になった場合に、そ(7)処理装置が
情報処理システムから突然孤立することにより、診断装
置も、その状態を知ることができないという欠点を有し
ている。
In the above-mentioned conventional device fault diagnosis method for information processing systems, when a fault occurs, the processing device itself sends fault information regarding its own operation. If the processing bag T that caused the damage becomes inoperable for some reason, (7) the processing device will be suddenly isolated from the information processing system, and the diagnostic device will not be able to know its status. It has its drawbacks.

本発明の目的は、障害を発生した処理装置が何らかの要
因て′動作不可の状態になった場合にも。
The object of the present invention is to provide a system that can be used even when a faulty processing device becomes inoperable for some reason.

障害を発生した処理gX置を監視していン・他の処理r
モ訓の監視回路から、診断装置に対して、卜す害を発生
した処理装置の状態を知らせることができる装置′Pi
!障害診断方式を提供することにある、〔課題を解決す
るための手段〕 本発明の装置障害診断方式は、 (A>複数の処理装置のそれぞれに有し、自己の前記処
理装置の動作に対する障害情報を検出するどどもに、他
の前記処理装置の動作を監視して、監視した他の前記処
理装置の動作に対する障害情報を検出する監視回路、 ()3 )複数の前記処理装置の動作に対する正常性の
確認および障害発生時の障害情報の収M5や編集を行う
診断装置、 <C)複数の前記監視回路の対の各々を相互に接続[7
、対をなす前記監視回路の相互間て力いに監視し合うデ
ータの通信を行わせる各々の監析、バス、 (1))前記診断装置と複数の前記監視回路とを接続し
、複数の前記監視回路のそれぞれから前記診断装置に対
して、検出した自己の前記処理装置の動作に対する障害
情報と監視して検出しまた他の前記処理装置の動作に対
する障害情報とを含むデータの通信を行わせる診断バス を備えて構成されている。
Monitoring the process in which the failure occurred/Other processes
A device 'Pi' that can notify the diagnosis device of the status of the processing device that caused the damage from the monitoring circuit of Mokun.
! [Means for Solving the Problem] The device fault diagnosis method of the present invention consists in providing a fault diagnosis method (A> provided in each of a plurality of processing devices, and detecting a fault in the operation of the own processing device). a monitoring circuit for detecting information, which monitors the operation of the other processing devices and detects failure information regarding the operation of the other monitored processing devices; A diagnostic device that confirms normality and collects and edits fault information when a fault occurs;
(1) Connecting the diagnostic device and a plurality of the monitoring circuits, Communication of data from each of the monitoring circuits to the diagnostic device includes information on a detected fault in the operation of the processing device itself and information on a fault in the operation of the other processing device that has been monitored and detected. The system is configured with a diagnostic bus that allows

〔実施例〕〔Example〕

次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の装置障害診断方式の一実於例を示すブ
ロック図である、 第1図に示す情報処理システムは、処理装置1.2およ
び診断装置Bを有しており、処理装置1.2のそれぞれ
に、監視回路A1.、A2を有している6 監視回路A1は、処理装置1の動作に対するi:章賽情
@’5.検出するとともに、他の処理装置2の動作も−
・定萌間ごとに監視バスCを通じて監視し1、監視1.
7’::他の処理装置2の動作に対する障害情報も検出
し7ている。
FIG. 1 is a block diagram showing an example of the device failure diagnosis method of the present invention. The information processing system shown in FIG. 1 includes a processing device 1.2 and a diagnostic device B. 1.2, each of which has a monitoring circuit A1. , A2, the monitoring circuit A1 has i:chapter information@'5. Along with the detection, the operation of other processing devices 2 is also detected.
・Monitor through the monitoring bus C every fixed interval.
7':: Failure information regarding the operation of other processing devices 2 is also detected.

一方、監視回路A2は、処理装置2の動作に対する障害
情報を検出するとともに、他の処理袋):〕−の動作も
一定時間ことに監視バスCを通じて監視L、監視した他
の処理装置1の動作に対する障害情報も検出している。
On the other hand, the monitoring circuit A2 detects failure information regarding the operation of the processing device 2, and also monitors the operation of other processing devices ():]- through the monitoring bus C for a certain period of time. It also detects operational failure information.

このように、監視バスCは、処理袋N1の監視回路A1
と処理装置2の監視回路A2とを接続し7、監視回路A
1と監視回路A2との相互間で互いに監視し合うデータ
の通信を行わせている。
In this way, the monitoring bus C is connected to the monitoring circuit A1 of the processing bag N1.
and the monitoring circuit A2 of the processing device 2 are connected 7, and the monitoring circuit A
1 and the monitoring circuit A2 mutually communicate data to monitor each other.

他方、診断バスL)は、診断装置Bと処理装置1の監視
回路A1と処理装置2の監視回路A2とを接続しており
、監視回路A1から診断装置Bに対しで、検出した自己
の処理装置1の動作に対する障害情報と船視して検出し
た他の処理装置2の動作に対する障害情報とを含むデー
タの通信を行わせるとともに、監視回路A2から診断装
fi Bに対して、検出した自己の処理装置2の動作に
対する障害情報と監視して検出し7だ他の処理袋r1の
動作に対する障害情報どを含むデータの通信を行わせて
いる。
On the other hand, the diagnostic bus L) connects the diagnostic device B, the monitoring circuit A1 of the processing device 1, and the monitoring circuit A2 of the processing device 2. In addition to communicating data including failure information regarding the operation of the device 1 and failure information regarding the operation of other processing devices 2 detected from the ship's view, the monitoring circuit A2 transmits the detected self Data is communicated including failure information for the operation of the processing device 2 and failure information for the operation of the other processing bag r1 that has been monitored and detected.

このため1診断装ffBは、診断バスDを通して複数の
処理装置1,2の動作に対する障害発生時の障害情報の
収九や編集および正常性の確認を行うことができる。
Therefore, one diagnostic device ffB can correct and edit fault information regarding the operations of the plurality of processing devices 1 and 2 when a fault occurs, and check the normality of the operations of the plurality of processing devices 1 and 2 through the diagnostic bus D.

以上述べたように、本実施例の装置障害診断方式は、障
害を発生した処理装置が何らかの要因で動作不可の状態
になった場合にも、障害を発生した処理装置を監視して
いる他の処理装置の監視回路から、診断装置に対して、
障害を発生した処理装置の状態を知らせることができる
As described above, the device failure diagnosis method of this embodiment allows even if a faulty processing device becomes inoperable for some reason, other devices monitoring the faulty processing device can From the monitoring circuit of the processing device to the diagnostic device,
It is possible to notify the status of a processing device in which a failure has occurred.

〔発明の効果〕 以上説明したように、本発明の装置障害診断方式は、障
害を発生した処理装置が何らかの要因で動作不可の状態
になった場合にも、障害を発生した処理装置を監視して
いる他の処理装置の監視回路から、診断装置に対して、
障害を発生した処理装置の状態を知らせることができる
という効果を有している。
[Effects of the Invention] As explained above, the device fault diagnosis method of the present invention can monitor a faulty processing device even if the faulty processing device becomes inoperable for some reason. from the monitoring circuit of other processing equipment to the diagnostic equipment.
This has the effect of being able to notify the status of a processing device in which a failure has occurred.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の装置障害診断方式の一実施例を示すブ
ロック図である。 〕、2・・・・・・処理装置、AI、A2・・・・・・
監視回路、B・・・・・・診断装置、C・・・・・・監
視バス、D・・・・・・診断バス。
FIG. 1 is a block diagram showing an embodiment of the device failure diagnosis method of the present invention. ], 2... Processing device, AI, A2...
Monitoring circuit, B...Diagnostic device, C...Monitoring bus, D...Diagnostic bus.

Claims (1)

【特許請求の範囲】 (A)複数の処理装置のそれぞれに有し、自己の前記処
理装置の動作に対する障害情報を検出するとともに、他
の前記処理装置の動作を監視して、監視した他の前記処
理装置の動作に対する障害情報を検出する監視回路、 (B)複数の前記処理装置の動作に対する正常性の確認
および障害発生時の障害情報の収集や編集を行う診断装
置、 (C)複数の前記監視回路の対の各々を相互に接続し、
対をなす前記監視回路の相互間で互いに監視し合うデー
タの通信を行わせる各々の監視バス、 (D)前記診断装置と複数の前記監視回路とを接続し、
複数の前記監視回路のそれぞれから前記診断装置に対し
て、検出した自己の前記処理装置の動作に対する障害情
報と監視して検出した他の前記処理装置の動作に対する
障害情報とを含むデータの通信を行わせる診断バス、 を備えることを特徴とする装置障害診断方式。
[Scope of Claims] (A) A device provided in each of a plurality of processing devices, which detects failure information regarding the operation of the own processing device, and monitors the operation of other processing devices, a monitoring circuit that detects failure information regarding the operation of the processing device; (B) a diagnostic device that confirms the normality of the operation of the plurality of processing devices and collects and edits failure information when a failure occurs; interconnecting each of the pairs of monitoring circuits;
(D) connecting the diagnostic device and a plurality of the monitoring circuits;
Communication of data from each of the plurality of monitoring circuits to the diagnostic device includes information on a detected fault in the operation of the processing device itself and information on a fault in the operation of the other processing device detected by monitoring. 1. A device failure diagnosis method comprising: a diagnostic bus for causing a diagnosis to be performed.
JP63298526A 1988-11-25 1988-11-25 Device fault diagnostic system Pending JPH02144635A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63298526A JPH02144635A (en) 1988-11-25 1988-11-25 Device fault diagnostic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63298526A JPH02144635A (en) 1988-11-25 1988-11-25 Device fault diagnostic system

Publications (1)

Publication Number Publication Date
JPH02144635A true JPH02144635A (en) 1990-06-04

Family

ID=17860868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63298526A Pending JPH02144635A (en) 1988-11-25 1988-11-25 Device fault diagnostic system

Country Status (1)

Country Link
JP (1) JPH02144635A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0636973A2 (en) * 1993-07-06 1995-02-01 Tandem Computers Incorporated Processor interface chip for dual-microprocessor processor system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57201945A (en) * 1981-06-03 1982-12-10 Omron Tateisi Electronics Co Fault diagnosing method for multiple cpu system
JPS62242247A (en) * 1986-04-14 1987-10-22 Nec Corp Diagnosing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57201945A (en) * 1981-06-03 1982-12-10 Omron Tateisi Electronics Co Fault diagnosing method for multiple cpu system
JPS62242247A (en) * 1986-04-14 1987-10-22 Nec Corp Diagnosing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0636973A2 (en) * 1993-07-06 1995-02-01 Tandem Computers Incorporated Processor interface chip for dual-microprocessor processor system
EP0636973A3 (en) * 1993-07-06 1995-06-28 Tandem Computers Inc Processor interface chip for dual-microprocessor processor system.

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