JPH02140065A - Video signal correction circuit - Google Patents

Abstract

PURPOSE:To improve the accuracy of inverse gamma correction with simple offset adjustment by providing a differential amplifier amplifying an input video signal and outputting the result, a comparator comparing an output video signal with a reference signal and a bias offset means or the like. CONSTITUTION:Each base of a transistor(TR) 14 in a comparator B and a TR 20 in a differential amplifier C is connected to an output terminal 29 and an input terminal 30 and a TR 32 as a bias offset means is provided to a common collector path of the TRs 19, 20. Then the input video signal is subject to DC restoration so that the pedestal level reaches a level of a reference signal by a holding voltage based on the difference between a voltage VO of an output video signal at a terminal 29 and a reference voltage Vref for the base voltage of the TR 13, and the signal and the reference signal are inputted to bases of TRs 19, 20. Based on the limit of the collector current of the TRs 19, 20, the offset of the base bias is set so that the operating range of the amplifier C is within a range of inverse gamma correction of the TRs 19, 20. Thus, the inverse gamma correction with high accuracy is attained with simple offset adjustment.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal correction circuit that is installed in a liquid crystal television receiver or the like and performs inverse gamma correction on a video signal and amplifies and outputs the video signal.

[Conventional technology]

Conventionally, in liquid crystal television receivers and the like that display images using a liquid crystal display instead of a CRT, based on the difference in characteristics between a CRT and a liquid crystal display, a television that is gamma-corrected according to the light emission characteristics of the CRT is used. It is necessary to apply inverse gamma correction to a video signal such as a video signal, restore the nonlinearity of the video signal based on the gamma correction, and then amplify the video signal.

A conventional video signal correction circuit that performs inverse gamma correction using polygonal line approximation is configured as shown in Figure 3, and the input terminal (
The gamma-corrected video signal of 1) is sent to the DC reproduction circuit (2)
At this time, when the input voltage Ei of the transistor (3) exceeds each of al, a2, and a8 in FIG. 4, the collector of the transistor (3) switch (4)
a), (4b), (4c) sequentially or selectively, the collector load resistance of the transistor (3) is replaced by the original resistor (5) with the resistors (6a), (6b), (6c) sequentially or selectively. The video signal changes to the resistor added in parallel, and the video signal is inversely gamma corrected to the output chamber 6Eo approximated by a polygonal line and output from the output terminal (7).

Note that (10B) and (8) in FIG. 3 indicate the power supply terminal and emitter resistance, respectively, and b+, b2.
bs indicates the output voltage EO corresponding to a1a2 and a3.

If the video signal is still a three-primary color signal, the circuit shown in FIG. 3 is provided for each primary color signal.

By the way, when performing correction using the polygonal line approximation as shown in FIG. 3, the bias resistor (5) of the transistor (3),
It is necessary to accurately set a large number of circuit constants such as the resistance values (6a) to (6C) and (8), and furthermore, when correction is performed for each primary color signal, it is also necessary to adjust variations in each primary color signal.

Therefore, it is desirable to reduce the setting and adjustment of two circuit constants by utilizing the input/output characteristics of the transistor shown in Fig. 5, which change exponentially between the base-emitter voltage Vbe and the collector current Ic, for reverse gamma correction. .

When using the transistor input/output characteristics of a differential amplifier,
It is conceivable to configure the video signal correction circuit as shown in FIG.

In FIG. 6, (A) is a transistor (9), Q
A level shift circuit consisting of O and resistors 0υ, 0 (B
) is the transistor α3. A comparator consisting of QΦ, 0υ, a switching type constant current source Qt9, a resistor, and a capacitor O.

(C) is a transistor aca, CA, aυ, a constant current source (A), and a resistor H, l2IQ12!9. ), a differential amplifier consisting of a slope, (support).

The wire is the output terminal for the video signal, the copper is the input terminal for the reference code (described later), and C3υ is the power supply terminal.

The input video signal of the input terminal (E) is transmitted to the transistor (14) via the transistor (9) and the resistor qυ.
Q (input to the base of J.

Further, a reference signal set to the reference voltage Vref for setting the pedestal level is input to the input terminal (7).

The reference signal is input to the base of the transistor (13).

And transistor α4. A constant current source (lt9) in the common emitter path of α4) operates every pedestal period of the video signal, and calculates the difference between the voltage Vx at the base of the transistors q and a during the pedestal period of the video signal and the voltage Vref of the reference signal. In response to this, transistor αυ loses its base bias,
The hold capacitor 0 is charged so that the voltage Vx becomes the voltage Vref.

Sarani, transistor 0Q is base biased by the hold voltage of capacitor α, and at this point, transistor Q
The voltage Vx changes in the opposite way to the charging voltage of camphor.

Therefore, the input video signal is subjected to direct current reproduction by the level shift circuit (A) and comparator (B) so that the voltage E Vx during the pedestal period becomes the voltage Vref, and the input video signal is transferred to the amplifier (C).
is input.

The amplifier (C) is constructed by setting the base voltage Vx of the transistor α and the resistor (A).
It operates based on the difference between the base voltage E Vy of and the voltage v
Due to the offset of the base bias in (a), the transistor 4 (7) changes exponentially with respect to the voltage Vx, Vbe (
The voltage Vx is reverse gamma corrected and amplified.

Furthermore, the reverse gamma-corrected voltage Vx is applied to the transistor (
21), the inverse gamma correction is performed, and the amplified output video signal is outputted to the output terminal -.

In the case of Figure 6, inverse gamma correction is performed using the transistor input/output characteristics that change exponentially in the amplifier (C), so the adjustment of the circuit constants is more difficult than in the case of correction using the polygonal line approximation in Figure 3. There are fewer places, etc.

In addition, since the DC regeneration circuit (2) in Fig. 3 requires complex circuits corresponding to the level shift circuit (A) and comparator (B), the correction circuit in Fig. 3 The correction circuit shown in FIG. 6 is more advantageous.

On the other hand, Japanese Patent Publication No. 62-16068 (HO4N 5/
66) combines a clamp circuit, a switching transistor circuit for inverse gamma correction, and a differential amplifier, and after gamma correction is performed by switching the transistor,
It is described that the signal is amplified and output using a differential amplifier.

[Problem to be solved by the invention]

In the case of the correction circuit shown in FIG. 6, the base bias of the transistors a'a and Gl) is offset-corrected by voltage 8EVy, and the operating point of the amplifier (C) based on the voltage Vx during the pedestal period is approximately the cutoff point, and the voltage It is necessary to set the amplifier (C) so that it operates within the range of inverse gamma correction in which the transistor input/output characteristics change exponentially depending on Vx.

However, the difference between the voltages Vx and vyO becomes the differential input voltage of the amplifier (C), and the error in the voltage Vy directly becomes a shift in the differential input terminal range, and the setting error in the voltage ■y, that is, the offset error, causes the amplification U < C) This has an extremely large effect on the operating range of the voltage Vy, and there is a problem in that highly accurate correction cannot be performed with a simple offset adjustment of the voltage Vy.

Note that when inverse gamma correction is performed using the video signal processing circuit described in the above publication, a dedicated switching circuit is required for inverse gamma correction, and furthermore, since amplification is performed using a differential amplifier after inverse gamma correction, There is a problem that the configuration is more complicated than when the inverse gamma correction and amplification are performed simultaneously by the differential amplifier (C) as in the correction circuit shown in FIG.

An object of the present invention is to enable highly accurate inverse gamma correction with simple offset adjustment in an inverse gamma correction circuit that simultaneously performs inverse gamma correction and amplification using a differential amplifier.

[Failure to solve the problem]

In order to achieve the above object, the inverse gamma correction circuit of the present invention performs inverse gamma correction which amplifies and reproduces a video signal with DC current so that the pedestal level is constant, and performs inverse gamma correction on the video signal and outputs the amplified signal. In the circuit.

A level shift circuit for level shifting the DC level of an input video signal according to a hold voltage, a pair of transistors in which an output signal of the level shift circuit and a predetermined reference signal for level adjustment constitute a differential pair. and a differential amplifier that amplifies and outputs the input video signal input to each of the paces.

The output video signal of the amplifier and the reference signal are compared every pedestal period, the hold voltage is formed as the difference between the pedestal level of the output video signal and the level of the reference signal, and the pedestal level of the input video signal is determined by comparing the output video signal of the amplifier with the reference signal. a comparator that controls the level of the reference signal to the level of the reference signal.

Bias offset means for limiting collector currents of both transistors to set base bias offsets of both transistors, and setting the operating range of the amplifier to an inverse gamma correction range that changes exponentially in transistor input/output characteristics. Be prepared.

[For production]

In the case of the video signal correction circuit of the present invention configured as described above, the pedestal level of the output video of the differential amplifier becomes the level of the reference signal based on the held WIFE corresponding to the difference between the signal and the reference signal. The input video signal is reproduced as DC.

Furthermore, the DC-regenerated input video signal and the reference signal are differentially amplified, and at this time, the differential amplifier operates within the range of inverse gamma correction based on the collector current limit of the pair of transistors in the differential amplifier. .

An output video signal that has been inversely gamma corrected and amplified is formed.

Then, the base bias offset of a pair of transistors in a differential amplifier is set by the collector current limit of both transistors, and the shift in the differential input range of the differential amplifier based on the offset error is the reciprocal of the amplifier's amplification factor. As a result, deviations in correction characteristics due to offset errors are reduced, and highly accurate inverse gamma correction can be performed with simple offset adjustment.

〔Example〕

One embodiment will be described below with reference to FIGS. 1 and 2.

In FIG. 1, the same symbols as in FIG.
Connect the pace of 1) to the output terminal - and the input terminal (7) respectively, install the transistor C for offset adjustment in the common collector path of transistor C (1), and connect the transistor C (input terminal to the pace of 2). (This is the point where the predetermined bias voltage Vz for offset adjustment of 331 was applied.

Note that the transistors form bias offset means.

And the output terminal EVO during the pedestal period.

That is, when the base voltage of the transistor Cl4) becomes higher than the pace voltage Vref of the transistor 03, the voltage drop across the resistor 0η based on the collector current of the transistor CL41 increases by the difference between the voltages Vo and VrefO, and the collector current of the transistor aυ increases. capacitor 0
8) The hold voltage increases and the level shift circuit (A)
The shift amount increases and the voltage Vx decreases.

Conversely, when the N voltage Vo becomes lower than the voltage Vref, the voltage drop across the resistor Q7 decreases, the hold voltage of the capacitor (18) decreases, and the shift amount of the level shift circuit (A) decreases, causing the voltage to drop. Vx decreases.

Then, based on the increase or decrease of the hold voltage, the voltage Vx becomes equal to the voltage IEEvref, and the input video signal is reproduced with DC current.

this,! =1) Collector electric current mwo I3 of transistor box
The resistance value of the 2° resistor (E) is set to R25, and the transistor c! operates in the active region! 1), if the pace and emitter voltage of I34 is Vf (medium 0.7V), then the following (
1) The formula holds true.

Vref=Vx=Vz-2-Vf-R25-I32
・= In equation (1), transistor a*,
Base voltage VX of cIQ.

When the Vre fO difference becomes O, transistors a9. (
If no offset is applied to the base voltage of (e), if the current of the constant current source (a) is Io, then the collector current of transistor 09° (4) will both be Io/2.

At this time, the voltage Vz can be set using the following equation (2).

Vz = Vref +2・Vf + R25・(Io/
2) Equation (2) On the other hand, the transfer characteristics of the differential pair of transistors 4 and 4 are shown by the solid line in Figure 2,
Points a to b in the figure change non-linearly due to inverse gamma correction.
To use the range of points, (2)
It is necessary to deviate from the condition of the expression.

Based on the voltage Vx (=Vref) during the pedestal period, if the collector of the transistor a when operating at point a is 'X current I + sa, then the transistor (
7) Collector current I2G is %Izoa=Io -I
It becomes tsa.

Roughly speaking, if the range of the differential input voltage between the point of differential input voltage 0 and point a in Fig. 2 is Va, then the voltage 4Vz required to offset Va is expressed by the following equation (3). It will be done.

vz=Vo+2・vf+R25−I2O3...(3)
Therefore, the voltage Vref and the voltage Vz are (1 n formula,
The settings are made to satisfy each of the equations (3), and as a result, based on the collector current limit, the transistor I-4 operates in a shifted state by applying the off-set bias of Va to the pace bias, and from point a to The input video signal is inversely gamma corrected and amplified using the characteristics of b and (.

And 1 For example, Vα=0.2V, Io=0.4m
When A and R25=IOKΩ, J
The collector current Jzoa of g becomes 0.02 mA,
Assuming that (Io/2) -l2oa=0.18 mA, the range Vα of the differential input terminals apparently expands to 1.8 .

That is, the transistor 09. at point a operating at offset voltage ■α based on voltage Vz. If the voltage amplification factor of the differential pair in (7) is Ga, then the electric current rEV.

= VOa is the Ga of Va as shown in the following equation (4)
It will be doubled.

Voa = Ga - Va ・(4) Formula and one? Since the deviation in the differential input voltage range Vα based on a setting error of 1EEVz is reduced to 1/Ga of the error in voltage Vz, the deviation in the operating range of the amplifier (C) based on the setting error in voltage Vz, that is, the offset error, is reduced to 1/Ga of the error in voltage Vz. becomes extremely small, and high-precision reverse gamma correction can be performed with a simple offset adjustment.

As is clear from the above equation (3), the electric current fiVz is a function of the pace emitter electric wire Vf which depends on 1M degree, so two diodes etc. are used to form the electric current %Vz and the 2.Vf is It is desirable to perform temperature compensation.

Also, a transistor? If a PNP type transistor is used instead of υ, temperature compensation is performed between the transistor and the transistor Hiroshi, and temperature compensation when forming the voltage Vz can be omitted.

〔Effect of the invention〕

Since the present invention is configured as described above, it achieves the effects described below.

Using a hold voltage based on the difference between the output video signal of the differential amplifier and the reference signal, the input video signal is DC-regenerated so that the pedestal level becomes the reference signal level, and the DC-regenerated input video signal and the reference signal are is input to each of the bases of a pair of transistors of the differential amplifier, and based on the collector current limitations of both transistors, the base bias offset is determined such that the operating range of the differential amplifier is equal to the inverse gamma correction of both transistors. By setting it within this range, deviations in the correction characteristics due to offset errors can be made extremely small.

In a simple configuration of an inverse gamma correction circuit that simultaneously performs inverse gamma correction and amplification using a differential amplifier.

Highly accurate inverse gamma correction can be performed with simple adjustments.

[Brief explanation of the drawing]

FIG. 1 is a wiring diagram of one embodiment of the video signal correction circuit of the present invention, and FIG. 2 is a characteristic diagram for explaining the operation of FIG. Fig. 3 is a connection diagram of a conventional video signal correction circuit using a polygonal line approximation, Fig. 4 is a block diagram for explaining the operation of Fig. 3, and Fig. 5 is a relation between the voltage between the base and emitter of a transistor and the collector current. , FIG. 6 is a wiring diagram of the video signal correction circuit for reference. (A)...Level shift circuit, (B)...Comparator,
(C)... Differential amplifier, Mouse, Kan... A pair of transistors constituting a differential pair %134... Transistors forming the entire bias offset means.

Claims (1)

[Scope of Claims] 1. In a video signal correction circuit that reproduces and amplifies a video signal with DC current so that the pedestal level is constant, and performs inverse gamma correction on the video signal and outputs the amplified signal, the DC level of the input video signal is A level shift circuit that shifts the level according to the hold voltage, an output signal of the level shift circuit, and a predetermined reference signal for adjusting the pedestal level are input to the bases of a pair of transistors constituting a differential pair, and the input a differential amplifier that amplifies and outputs a video signal, and compares the output video signal of the amplifier and the reference signal every pedestal period, and calculates a signal proportional to the difference between the pedestal level of the output video signal and the level of the reference signal. a comparator that forms the hold voltage and controls the pedestal level of the input video signal to the level of the reference signal; and a comparator that limits collector currents of both transistors to set base bias offsets of both transistors; A video signal correction circuit comprising: bias offset means for setting the operating range of the amplifier to an inverse gamma correction range in which transistor input/output characteristics change exponentially.