JPH02139973A - Switching element - Google Patents

Abstract

PURPOSE:To improve a switching speed by a method wherein one of two channels is in an ON state and the other is in an OFF state and a bias applied to one gate is changed to switch over the ON and OFF states of both the channels. CONSTITUTION:Normally, a current along an X-Y direction between a source electrode 1 and a drain electrode 2 is in an OFF state and a current along a U-V direction between a source electrode 4 and a drain electrode 5 is in an ON state. Then, if a bias applied to a front gate 7 is changed, electrons stored in a channel I 19 directly under the front gate 7 are transferred to a channel II 20 and, finally, a potential state is obtained. In other words, electrons in the channel I 19 are removed and a two-dimensional electron gas is formed in the channel II 20. With this process, the current along the X-Y direction is turned ON and the current along the U-V direction is turned OFF. That is, electrons are transferred between the channel I and the channel II without charge and discharge of electrons, so that a very high switching speed can be achieved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switching element, and more particularly to a switching element for a digital circuit using a double heterojunction consisting of a wide bandgap semiconductor and a narrow bandgap semiconductor.

A typical heterojunction field effect transistor used as a speed-following 41 branch switching element is, for example, as shown in FIG.
Narrow bandgap semiconductor N31 made of GaAs and N-type AlGa
Electrons are accumulated on the narrow bandgap semiconductor layer 31 side at the interface with the wide bandgap semiconductor layer 32 made of As due to the difference in electron affinity between the two. These electrons are connected to GaAs and N-type A.
It is called a two-dimensional electron gas that is confined within a potential barrier created by GaAs and has a degree of freedom only in the direction parallel to the heterointerface.

When a DC voltage is applied between the source electrode 35 and the drain electrode 36, the two-dimensional electron gas is accelerated and a current flows between the two electrodes. Further, since the two-dimensional electron gas can be generated and extinguished by changing the voltage applied to the gate switch key electrode 33, it is possible to turn on and off the current flowing between the two electrodes.

B<7, then i- By the way, when a switching element is used in a digital circuit that operates at extremely high speed, the switching speed becomes a problem. Carrier transit time τ is one parameter that determines the switching speed.

There is. However, in the case of the above-mentioned heterojunction device, d is not necessarily smaller than that of a normal MOS FET. This is because in order to turn on and off the element, it is necessary to generate and eliminate carriers, so the time taken to charge and discharge carriers when the operating state changes impedes high-speed operation of the element. therefore,
The switching element with the above structure has a problem of slow switching speed.

The present invention has been made in consideration of the above-mentioned conventional problems, and an object of the present invention is to provide a high-performance switching element by increasing the switching speed.

In order to achieve the above object, the present invention provides a switching element formed by a double heterojunction consisting of a wide bandgap semiconductor and a narrow bandgap semiconductor, which has two channels. In addition to crossing the channels in a cross shape, one of the two channels is in a conductive state and the other channel is in a cutoff state, and by changing one gate bias, the conduction and cutoff states of both channels are switched. It is characterized by

North-U In the above configuration, when one of the two channels is in a conductive state and the other is in a cut-off state, the gate bias is changed to switch between the conductive and cut-off states of both channels. At this time, charging and discharging of carriers does not occur, and carriers directly under the gate only move from one channel to the other channel. And in this case,
The carrier transit time τ1 is related to the high speed of the device.
rather, it is the time τ that the carrier takes to travel between channels. Since τ is considered to be much smaller than τ, ["Molecular Beam Epitaxy Technology" edited by Kiyoshi Takahashi, Industrial Research Association (
1984) 225], the switching element having the above structure can operate at ultra high speed.

However, one embodiment of the present invention will be described below with reference to FIGS. 1 to 6.

As shown in FIGS. 2 and 3, a narrow forbidden band semiconductor layer 8 made of high purity GaAs is formed on a wide forbidden band semiconductor layer 9 made of N-type AlGaAs, and this narrow forbidden band semiconductor layer B Above are both N type A/! X- made of GaAs
A wide forbidden band semiconductor layer 3 for the Y direction and a wide forbidden band semiconductor layer 6 for the UV direction are formed. As shown in FIG. 1, the wide forbidden band semiconductors M3 and 6 are arranged to run perpendicularly, and the wide forbidden band semiconductor layer 3 has a source electrode 1 and a drain electrode 2 at both ends. of.

Ohmic electrodes 11 and 12 formed at the bottom are provided, and current can flow in the X-Y direction by these three electrodes. Further, a source electrode 4, a drain electrode 5, and ohmic electrodes 13 and 14 formed under these two electrodes are provided at both ends of the wide bandgap semiconductor layer 6, and these three electrodes Current can flow in any direction. Further, a front gate 7 for switching the channel through which current flows is formed at the intersection of the two forbidden band semiconductors 3 and 6, and furthermore, a front gate 7 is formed on the lower surface of the wide forbidden band semiconductor layer 9 in the UV direction. 16 has been formed.

Here, a two-dimensional electron gas is applied to the narrow bandgap semiconductor layer 8 side at the hetero interface between the wide bandgap semiconductor layers 3 and 6 formed on the upper side and the wide bandgap semiconductor layer 9 formed at the bottom. Two channels 19 and 20 are formed to serve as carriers.

Hereinafter, the upper channel will be referred to as channel 119, and the lower channel will be referred to as channel 1120.

By the way, as shown in Fig. 2, the upper N type AffiG
aAs is etched (except for the front gate 7 part)
18 is an etched portion), so it is thin except for the front gate 7. Therefore, no electrons are accumulated in the channel 118, and a two-dimensional electron gas is formed in the channel [19] other than the portion directly below the front gate 7. FIG. 4 is a potential distribution diagram in this state. Conversely, since the upper N-type AβGaAs, which is the electron supply layer, is not etched in the part directly below the front gate 7, the part directly below the front gate 7 of the channel 118 is A dimensional electron gas is formed. Furthermore, assuming that a positive voltage is applied to the back gate 16 provided only in the UV direction, the potential distribution becomes as shown in FIG. 5, and no electrons are accumulated in the channel I[19. Therefore, even if a voltage is applied between the source electrode 1 and the drain electrode 2, no current flows because there are no carriers in the portion of the channel [19 directly below the front gate 7].

On the other hand, in the UV direction, the potential is in the state shown in FIG. 5, similar to the front gate 7 portion. Therefore, a two-dimensional electron gas is formed in the channel 119, and no electrons exist in the channel 20. Therefore, U
A source electrode 4 and a drain electrode 5 formed in the -V direction.
When a voltage is applied between , current flows through channel I.

That is, as shown in FIG. 6, in the normal state B (state where no bias is applied to the front gate 7), the current between the source electrode 1 and the drain electrode 2 in the X-Y direction is OFF, and the U- The current between the source electrode 4 and the drain electrode 5 in the V direction is turned on.

Next, when the bias applied to the front gate 7 is changed, the channel 119 is
The electrons accumulated in the channel move to the channel 20, and the potential state as shown in FIG. 4 is finally established. That is, the electrons in channel 119 disappear and become channel lI20.
A two-dimensional electron gas is formed. As a result, this time
-Y direction current is ON, U-■ direction current is OFF
It becomes F.

As described above, by changing the gate bias, two sets of source-drain currents can be turned on.

The OFF state can be changed. At this time, there is no charging or discharging of electrons, and only electrons move between channels (2) and (2), so extremely high-speed switching is possible.

Furthermore, if the channel is formed by a plurality of quantum thin 4° wires of about 100 people, then Tk (h/2π=
In order for an electron running with a momentum of i (h is a blank constant and k is a displacement) to be elastically scattered, a large momentum change of 1 in 21π is required according to the law of conservation of momentum. Therefore, the probability that such scattering will occur is extremely small.

As a result, it is thought that the present device using quantum wires exhibits an extremely high switching speed in the extremely low temperature region where the probability of inelastic scattering occurring is small.

As described above, according to the present invention, when switching the on and off states of two channels, charging and discharging of carriers does not occur, and carriers directly under the gate transfer from one channel to the other. Just move. therefore,
Since the switching element can operate at ultra high speed, the performance of the switching element can be dramatically improved.

[Brief explanation of the drawing]

FIG. 1 is a top view of a device using the element according to the present invention, and FIG.
The figure is a nn cross-sectional view of Figure 1, Figure 3 is a mm-m cross-section of Figure 1, Figure 4 is a potential diagram of the channel in the x-y direction, and Figure 5 is the potential diagram of the channel in the U-■ direction. 6 is a bias application diagram for device operation, and FIG. 7 is a sectional view showing a conventional heterojunction field effect transistor. l...source electrode, 2...drain electrode, 3...
Wide bandgap semiconductor layer for X-Y channel, 4...
Source electrode, 5... Drain electrode, 6... Wide bandgap semiconductor layer for UV channel, 7... Front gate, 8... Narrow bandgap semiconductor layer, 9... Wide bandgap semiconductor layer. Band semiconductor layer, 19...channel 1120...channel ■. Utility model registration applicant: Sanyo Electric Co., Ltd. agent
: Patent Attorney Shiro Nakajima Figure 3 Figure 6 Figure 7 (a)

Claims (1)

[Claims] (1) A switching element formed by a double heterojunction consisting of a wide forbidden band semiconductor and a narrow forbidden band semiconductor, in which two channels intersect in a cross shape, and one of the two channels is in a conductive state. , a switching element characterized in that the other channel is placed in a cut-off state and the conduction and cut-off states of both channels are switched by changing one gate bias.