JPH02139653A - Bus occupation control system - Google Patents

Abstract

PURPOSE:To easily detect trouble without providing a line directly connecting a request arbitrating circuit and the most distant device by providing a feedback circuit so that it is connected from the request arbitrating circuit to the most distant device in a column. CONSTITUTION:A feedback circuit 7 is connected from a request arbitrating circuit 2 to the most distant device 6; and when a bus occupation permitting signal is outputted from the most distant device 6 to the feedback circuit 7, the feedback circuit 7 returns this signal to the device 6 through a bus occupation permitting line, for example, 61 other than a bus occupation permitting line, for example, 60 where this signal is inputted. Hereafter, the bus occupation permitting signal is returned to the request arbitrating circuit 2 through bus occupation permitting lines 51, 41, 31, and 21 other than lines for output, and the request arbitrating circuit 2 detects a bus occupation permitting signal other than the outputted bus occupation permitting signal to recognize the occurrence of trouble. Since trouble is detected in this manner, it is unnecessary to provide the line directly connecting the most distant device 6 and the request arbitrating circuit 2.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a bus occupancy control method in a daisy chain information processing device.

(Prior Art) In an information processing apparatus that employs a daisy chain system, devices such as channels for controlling input/output devices are connected in cascade to control their operations.

In this day chain system, a request arbitration circuit controls a bus (data bus) shared by each device. That is, when each device occupies the bus, the front side outputs a bus occupancy request signal toward the bus occupancy request line. The request arbitration circuit receives this bus occupancy request signal, returns a bus occupancy permission signal, and arbitrates for bus occupancy.

FIG. 2 shows a block diagram of the main parts of a conventional information processing device.

The figure shows a daisy chain type information processing device.

In the figure, a bus (data bus) 1 includes a request arbitration circuit 2, a first device 3, a second device 4, a third device 5, and a fourth device.
equipment 6 is connected. The first device 3, the second device 4, the third device 5, and the fourth device 6 are sequentially connected in cascade to the request arbitration circuit 2 via a bus occupancy request line 10 and a bus occupancy permission line 11. has been done. That is, the first device 3 is connected to the position of the bus occupancy permission line 10 closest to the request arbitration circuit 2, and the second device 4, third device 5, and so on are connected in order.
A fourth device 6 is connected to the farthest position.

The bus occupancy request lines 10 are request lines too and tot10.
It consists of four lines: 2, 103. The reason why the bus occupancy request line 10 is composed of four lines is that, for example, when the bus occupancy request line 10 is made into one line, when multiple bus occupancy requests conflict, the request arbitration circuit 2
A situation occurs in which only devices close to the bus 1 occupy the bus 1. Therefore, a plurality of bus occupancy request lines 10 are provided. Furthermore, if a plurality of buses are treated equally, the order of permission cannot be adjusted if bus occupancy request signals are output at the same time.

For this reason, each line is given a priority order of bus occupancy requests. For example, if the priority of the bus occupancy request signal outputted using the request line 100 is set to 1 and is treated as the highest priority, the request lines 101, 102, and 103 are set to priorities 2 and 3.4, respectively.

The bus occupancy permission line 11 connects the request arbitration circuit 2 and the first device 3.
, the first device 3 and the second device 4, the second device 4 and the third device 5, the third device 5 and the fourth device 6, and the fourth device 6 and the request arbitration circuit 2, respectively. Connect, permission line 20-2
3.30~33°40~43,50~53.60~63
It consists of

Each device has a request generating section 301 and 401, respectively.

501, 601 and bus occupancy control units 302, 402
, 502.

602 is provided. Further, the request arbitration circuit 2 is provided with a bus priority control section 201 and a failure detection section 202.

The request generation unit 301 is connected to the bus occupancy request line 10, and when the first device needs to occupy the bus 1, it sends a bus request to the bus priority control unit 201 via the bus occupancy request line 10. It is composed of registers and the like that output occupancy request signals. The bus occupancy control unit 302 is connected to the bus occupancy permission line 11 and includes a gate circuit or the like that takes in a bus occupancy permission signal or transmits it in a fixed direction to an adjacent device.

The bus priority control unit 201 allows each device to use the bus occupancy request line 10.
It is composed of a processor, etc., which accepts a bus occupancy request signal outputted through the bus occupancy request signal, determines whether or not occupation of the bus 1 can be permitted in accordance with the bus occupancy request signal, and outputs a bus occupancy permission signal. The failure detection unit 202 is composed of a gate circuit or the like that monitors transmission of the bus occupancy permission signal to the bus occupancy permission line 11 due to a failure such as noise. It should be noted that the request arbitration circuit 2 is usually composed of an LSI of 1 chip or the like.

In the above configuration, for example, when the first device 3 requests occupation of the bus 1 with the highest priority, the request generation unit 301
A bus occupancy request signal (REQO) is output using the request line 100. Upon receiving this, the bus priority control unit 201 determines that if the bus 1 is not already occupied by another device, the permission line 2
A bus occupancy permission signal (GNT20) is output through o. When the bus occupancy control unit 302 receives this bus occupancy permission signal, it determines whether the signal is for itself. Request generation unit 30 in advance! is outputting a bus occupancy request signal (REQO), so here it is determined that the signal is for itself. As a result, the bus occupancy control unit 302 receives the bus occupancy permission signal and starts occupying the bus 1 .

Next, for example, if the fourth device 6 wants to occupy the bus 1 with priority 3, a bus occupancy request signal (R
EQ2) is output. In the bus priority control unit 201, the bus 1 is released and a bus occupancy request signal (REQO) with a priority of 1.2 is sent.

REQI) is not generated, a bus occupancy permission signal (GNT22) is output through the permission line 22. This GN
T22 is first input to the bus occupancy control unit 302 of the first device 3. Here, as explained earlier, this GNT
22 is a signal directed to itself. in this case,
Since the first device 3 is unrelated, it refuses to take in the GNT 22 and sends a bus occupancy permission signal (GN
T32). The second device 4 and the third device 5 reject the import in the same way as the first device 3.

The fourth device 6 receives a bus occupancy permission signal (GNT 52) from the third device 5 through the permission line 52. The fourth device 6 receives this bus occupation permission signal (GNT52) and starts occupying the bus 1.

Now, there are cases where noise or the like gets on the bus occupancy request line 10, causing the bus priority control section 201 to malfunction. For example, when noise is on the bus occupancy request line 103, the bus priority control unit 201 outputs a bus occupancy permission signal (GNT23) through the permission line 23. This bus occupancy permission signal (GNT23) is refused to be taken in by the first to fourth devices 3 to 6 as described above, and finally a failure is detected as a bus occupancy permission signal (GNT63) via the permission line 63. The information is input to section 202 . When the failure detection unit 202 detects the bus occupancy permission signal (GNT63), the bus priority permission signal (GNT23) output from the bus priority control unit 201 is detected.
Process to invalidate.

(Problems to be Solved by the Invention) By the way, the request arbitration circuit 2, the bus occupancy request line 10, the bus occupancy permission line 11, etc. are usually arranged on one board. For this reason, when the number of bus occupancy request lines 10 and bus occupancy permission lines 11 is large, a problem arises in that it becomes difficult to secure the wiring space and the like. Furthermore, when there are many lines, a problem arises in that a large number of input/output ports for the request arbitration circuit 2 must be prepared.

The present invention has been made with attention to the above points, and is a bus control system that allows failures to be easily detected without the need for a direct connection line between a request arbitration circuit and a device farthest from the request arbitration circuit. The purpose is to provide a method.

(Means for Solving the Problems) The bus occupancy control method of the present invention employs a daisy chain system that consists of a plurality of devices sequentially connected in cascade to a request arbitration circuit via a bus occupancy request line and a bus occupancy permission line. In the processing device, a feedback circuit is provided to be connected in cascade to the device furthest from the request arbitration circuit among the plurality of devices, and the predetermined device sends a bus occupancy request signal in advance through the bus occupancy request line. output to the request arbitration circuit;
In response to this, when the request arbitration circuit outputs a bus occupancy permission signal to the bus occupancy permission line, this device takes in the bus occupancy permission signal, and any of the devices transmits the bus occupancy request signal to the bus occupancy permission line. If the bus occupancy permission signal is transmitted to the bus occupancy permission line even though the bus occupancy permission signal is not output to the arbitration circuit, the device furthest from the request arbitration circuit refuses to take in the bus occupancy permission signal and returns the bus occupancy permission signal. The bus occupancy permission signal is input to the circuit, and the feedback circuit connects the bus via the bus occupancy permission line different from the bus occupancy permission line to which the bus occupancy permission signal was input and the plurality of devices. The occupancy permission signal is returned to the request arbitration circuit, and the request arbitration circuit compares the returned bus occupancy permission signal with the bus occupancy permission signal transmitted to the bus occupancy permission line and determines the bus occupancy permission. This is to determine line failure.

(Operation) In the above method, the feedback circuit is connected to the device farthest from the request arbitration circuit. When a bus occupancy permission signal is output from this farthest device to the feedback circuit, the feedback circuit outputs the bus occupancy permission signal via another bus occupancy permission line that is different from the bus occupancy permission line that inputs the bus occupancy permission signal. Return to the device farthest from the request arbitration circuit. Thereafter, the bus occupancy permission signal is returned to the request arbitration circuit through a different bus occupancy permission line and each device from when it was first output from the request arbitration circuit. The request arbitration circuit recognizes that a failure has occurred by detecting a bus occupancy permission signal different from the previously output bus occupancy permission signal.

(Embodiment) FIG. 1 shows a block diagram of main parts of an information processing apparatus according to the present invention.

In the figure, the arrangement and connections of the request arbitration circuit 2, the first device 3, the second device 4, the third device 5, and the fourth device 6 for the bus 1 are the same as the conventional one shown in FIG. The same is true. Furthermore, the bus occupancy request line 10 connected from each device to the request arbitration circuit 2 has a similar configuration.

The bus occupancy permission line 11 connects the request arbitration circuit 2 and the first device 3.
, the first device 3 and the second device 4, the second device 4 and the third device 5, the third device 5 and the fourth device 6, and the fourth device 6 and the feedback circuit 7, respectively. Permission lines 20-23.
It is composed of 30-33.40-43.50-53.60-63.

Each device has request generation units 301, 401, 5016.
01 and the lotus occupancy control unit 302 , 402 , 502 ,
602 is provided. Further, the request arbitration circuit 2
A bus priority control section 201 and a failure detection section 202 are provided.

The request generation units 301 , 401 , 501 , 601 are
If each device does not need to occupy bus 1,
It is composed of a register and the like that outputs a bus occupancy request signal to the bus priority control section 201 via the bus occupancy request line 10. Bus occupancy control units 302, 402,
502 and 602 are connected to the bus occupancy permission line 11,
It consists of gate circuits and the like that control bidirectional transmission of bus occupancy permission signals. The bus occupancy control units 302 to 602 transmit bus occupancy permission signals in both directions, for example, from the permission line 20 to the bus occupancy permission line 30 and from the bus occupancy permission line 30 to the bus occupancy permission line 20. be able to.

The bus priority control unit 201 accepts bus occupancy request signals output from each device, determines whether or not the bus 1 can be occupied according to each bus occupancy request signal, and uses the bus occupancy permission line 11 to occupy the bus. It consists of a processor etc. that outputs a permission signal. The failure detection unit 202 is composed of a gate circuit or the like that monitors transmission of the bus permission signal to the bus occupancy permission line 11 due to a failure such as noise. Note that within the request arbitration circuit 2, permission lines 20, 21, 22, and 23, which are connected to the bus priority control section 201, are also connected to this failure detection section 202.

The feedback circuit 7 is a circuit that short-circuits the permission line 60 and the permission line 61 and the permission line 62 and the permission line 63, respectively.

Here, the bus occupancy control section shown in FIG. 1 will be explained using FIG. 3.

FIG. 3 is a circuit diagram of a main part of the bus occupancy control section according to the present invention.

Here, the circuit will be described as a portion of the bus occupancy control unit 302 of the first device 3 shown in FIG. 1 that connects the permission line 20 and the permission line 30.

An inverter 71 is connected to the terminal 70 to which the permission line 20 is connected.
input is connected. The output of inverter 71 is connected to the non-inverting input of AND gate 72. The output of AND gate 72 is connected to one input of AND gate 73.

The output of AND gate 73 is connected to the input of D flip-flop 74. The output of the D flip-flop 74 is connected to a control terminal of a three-state driver 75. The output terminal of the three-state driver 75 is connected to a terminal 76 to which the permission line 3o is connected. Following each of the above elements, the bus occupancy permission signal inputted to the terminal 7o through the permission line 20 is output to the terminal 76, and the permission line 3
It is transmitted to ゜.

On the other hand, the input of an inverter 77 is connected to the terminal 76 . The output of inverter 77 is connected to the non-inverting input of AND gate 78. The output of AND gate 78 is connected to the input of D flip-flop 79.

The output of the D flip-flop is connected to a control terminal of a three-state driver 80. The output terminal of three-state driver 8o is connected to terminal 70.

Following each of the above elements, a bus occupancy permission signal manually inputted to the terminal 76 through the permission line 30 is outputted to the terminal 70 and transmitted to the permission line 20.

Note that the output of the D flip-flop 79 is connected to the inverting input of the AND gate 72. ANDKATE 73
A terminal 81 to which a control signal from the request generating section 301 (FIG. 1) is input is connected to the other input. In this case, the control signal input to this terminal 81 is the request generator 3
01 is the bus occupancy request signal (REQ) through the permission line 100.
When the signal O) is output, it is a low level (L) signal, and at other times, it is a high level (H) signal.

The output of the D flip-flop 74 is connected to the inverting input of the AND gate 78 . The input terminals of the three-state drivers 75 and 80 are grounded and kept at a low level. D flip-flop 74.79 has
A clock with a predetermined repetition period is input.

In the above configuration, when the bus occupancy permission signal (GNT20.GNT30) is not transmitted to the terminals 70 and 76,
It is set to high level. Furthermore, the inputs of the D flip-flops 74 and 79 are set to low level.

In the above configuration, when a low level bus occupancy permission signal (GNT20) is input to the terminal 70, the inverter 7
1 is man-powered. Since the three-state driver 80 is in an off state and its output terminal is set to high impedance, no signal flows into it.

The output of inverter 71 becomes high level. The data is input to the ANDQATE 72. AND gate 72 outputs a high level signal and inputs it to one input of AND gate 73 . The output of the AND gate 73 is, when the request generation unit 301 does not output the bus occupancy request signal (REQO),
High level otherwise low level.

When a high level signal is input to the D flip-flop 74, the output becomes high level when a new lock is input to the D flip-flop 74. As a result, the three-state driver 75 is turned on, and the output terminal becomes low level.

Along with this, the terminal 76 becomes low level, and the permission line 3
0, a low level bus occupancy permission signal (GNT30) is transmitted.

On the other hand, the request generation unit 301 generates a bus occupancy request signal (REQO).
), the output of the AND gate 73 becomes low level, the level of the terminal 76 does not change, and the bus occupancy permission signal GNT20 is taken into the bus occupancy control section 302.

Now, a bus occupancy permission signal (
GNT30) is input to the inverter 77. In this case, since the three-state 75 is set to high impedance in the off state, no signal flows into it.

The output of inverter 77 is set to high level and input to AND gate 78 . AND gate 78 inputs a high level signal to D flip-flop 79 . D
When a new lock is input to the flip-flop 79, the output becomes high level. As a result, the three-state driver 79 is turned on, and the output terminal becomes low level. Along with this, the terminal 70 becomes low level, and the low level bus occupancy permission signal (GN
T20) is transmitted.

Through the above operations, the bus occupancy control unit 302 bidirectionally transmits the bus occupancy permission signal.

Note that this is the bus occupancy control unit 402 , 502 , 60
The same applies to 2.

Now, returning to FIG. 1, the operation when each device outputs a bus occupancy request signal through the bus occupancy request line 10 and occupies the bus 1 is the same as the conventional one explained in FIG. It is. Therefore, a case will be described in which the bus priority control section 201 malfunctions due to noise etc. on the bus occupancy request line 10.

Here, for example, if noise is on the bus occupancy request line 100, the bus priority control unit 201 outputs a bus occupancy permission signal (GNT20) through the bus occupancy permission line 20. The bus occupancy control unit 302 of the first device 3 refuses to accept this bus occupancy permission signal (GNT20). Thereafter, similarly, the bus occupancy control units 402 to 402 of the second to fourth devices 4 to 6
At 602, the capture is rejected. Finally, a bus occupancy permission signal (GNT60) is outputted from the bus occupancy control section 602 to the feedback circuit 7 via the permission line 60. In the feedback circuit 7, this bus occupancy permission signal (GNT60
) is transmitted to the permission line 61. As a result, the fourth device 6
The bus occupancy permission signal (GNT61
). This signal is unconditionally transmitted to the permission line 51 as previously explained in FIG.
-Transmitted to the request arbitration circuit 2 via the bus occupancy control units 502-302 of the first devices 5-3. The request arbitration circuit 2 enters the same state as when the bus occupancy permission signal (GNT20) is transmitted to the permission line 21. Here, the failure detection unit 20
2, two bus occupancy permission signals (GNT20, 2
1) will be detected. This recognizes the fault and
Processing is performed to invalidate the bus occupancy permission signal (GNT20) outputted from the bus occupancy control unit 201 first.

As described above, by transmitting the bus occupancy permission signal that has not been taken in by each device via the feedback circuit 7 again to the request arbitration circuit 2 via each device and the bus occupancy permission line 11,
There is no need to provide a line that directly connects the device farthest from the request arbitration circuit 2, in this case the device 6 of node 4, and the request arbitration circuit 2. Therefore, the request arbitration circuit 2, the bus occupancy request line 1
0. There is no need to prepare a large wiring space on the board on which the bus occupancy permission line 11 and the like are mounted.

The bus occupancy control method of the present invention is not limited to the above embodiments.

Although the case where four devices share the bus 1 has been described, the number of devices is not particularly limited. The number of bus occupancy request lines 10 and bus occupancy permission lines 11 is not limited to four, but may be any number. In addition, the connection inside the feedback circuit 7 is as appropriate to the bus occupancy permission line 11 to be connected.
may be changed. Furthermore, the circuit of the bus occupancy control section is
It may be replaced with an equivalent circuit that can transmit signals in both directions and capture them as appropriate.

(Effects of the Invention) According to the bus occupancy control method of the present invention configured as described above, in order to detect a failure using the bus occupancy permission line, a direct link between the request arbitration circuit and the device furthest from the request arbitration circuit is established. There is no need to provide a connecting line.Therefore, there is no need for a special line to detect faults in addition to the lines necessary for arbitration of bus occupancy.
There is no need to secure a large wiring space or prepare a large number of input/output ports for the request arbitration circuit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of main parts of an information processing device according to the present invention, FIG. 2 is a block diagram of main parts of a conventional information processing device, and FIG. 3 is a block diagram of main parts of a bus occupancy control section according to the present invention. It is a circuit diagram. l...Bus, 2...Request arbitration circuit, 3...First device, 4...Second device, 5...Third device, 6...
...Fourth device, 7... Feedback circuit, 10... Bus occupancy request line, 11... Bus occupancy permission line, 201... Bus priority control section, 202... Fault detection section, 301 , 4
01, 501, 601...Request generation unit, 302
, 402 , 502 , 602 . . . bus occupancy control unit. Patent applicant Oki Electric Industry Co., Ltd.

Claims (1)

[Scope of Claims] A daisy-chain type information processing device comprising a plurality of devices sequentially connected in cascade to a request arbitration circuit via a bus occupancy request line and a bus occupancy grant line, wherein among the plurality of devices, the A feedback circuit is provided to be cascade-connected to a device farthest from the request arbitration circuit, and the predetermined device outputs a bus occupancy request signal in advance to the request arbitration circuit through the bus occupancy request line, and receives the signal from the request arbitration circuit. In response, when the request arbitration circuit outputs a bus occupancy permission signal to the bus occupancy permission line, this device takes in the bus occupancy permission signal, and each of the devices transmits the bus occupancy request signal to the request arbitration circuit. If the bus occupancy permission signal is transmitted to the bus occupancy permission line even though the bus occupancy permission signal is not output to the bus occupancy permission line, the device furthest from the request arbitration circuit refuses to receive the bus occupancy permission signal and sends the bus occupancy permission signal to the feedback circuit. This bus occupancy permission signal is input, and the feedback circuit receives the bus occupancy permission via the bus occupancy permission line different from the bus occupancy permission line to which the bus occupancy permission signal was inputted, and the plurality of devices. The signal is returned to the request arbitration circuit, and the request arbitration circuit compares the returned bus occupancy permission signal with the bus occupancy permission signal transmitted to the bus occupancy permission line, and determines the bus occupancy permission line. A bus occupancy control method characterized by determining failure.