JPH02130932A - Polysilicon thin film transistor - Google Patents

Abstract

PURPOSE:To reduce the threshold voltage of a poly Si thin film transistor, and increase the mobility of carrier by using a poly Si film as a channel layer, in which poly Si film crystal grain boundary trap is made inert by fluorine atom. CONSTITUTION:On an insulative substrate wherein a thermal oxidation film 2 is grown on an Si wafer 1, a poly Si film 3 is deposited by low pressure CVD method; by implantating self ion Si<+> into the film 3, an amorphous Si film 3' is obtained; fluorine atom is introduced into the film 3' by implanting fluorine ion F<->; the film 3' is subjected to crystallization annealing at a specified temperature for a specified period, and turned into a polysilicon state; after that, the film 3' is subjected to crystallization annealing at a specified temperature for a specified period, thereby completing a poly Si thin film transistor. By this set-up, Si dangling bond of grain boundary in the poly Si film caused by fluorine atom is effectively reduced, so that the threshold voltage of a poly Si thin film transistor to be formed is reduced, and the carrier mobility is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a polysilicon thin film transistor, and more particularly to a polysilicon thin film transistor in which grain boundary traps in polysilicon used as a channel layer are reduced.

(Prior Art) In recent years, the application of polysilicon thin film transistors that use a polysilicon layer as a channel layer to flat panel displays has attracted attention.The reason for this is that compared to conventional amorphous silicon thin film transistors,
Since its mobility is more than one order of magnitude higher, its operating speed is fast, it can also provide a driving circuit, and it is possible to manufacture devices on large-area substrates.

However, since the polysilicon layer has crystal grain boundaries within itself, dangling bonds of silicon atoms at the grain boundaries (unsaturated bonds of Si atoms, i.e., 5i-3t-) This has the disadvantage that the carriers are free (an empty state), which traps moving carriers and reduces mobility. In addition, the threshold voltage becomes high, which poses a practical problem.

It has been generally known that silicon dangling bonds in the amorphous silicon film can be reduced by implanting hydrogen into a portion of the amorphous silicon film using active hydrogen. By analogy with this, it has been devised to reduce silicon dangling bonds at the grain boundaries of polysilicon by introducing active hydrogen.

In fact, hydrogenation is being studied to improve the characteristics of polysilicon thin film transistors.

For example, a reduction in trap density in a polycrystalline silicon layer due to hydrogen plasma (e.g., Appl, Phys, Lei
t, pp. 337-340 (see 1979),
It has been reported that hydrogen plasma significantly reduces the dark voltage of thin film transistors (for example, IEEB Elec
tron Dev.

Lett, EDL-1 pp. 159-161. 1980).

Furthermore, it has also been reported that fluorinated amorphous silicon is used as the silicon layer of amorphous silicon thin film transistors (for example, Electronics
Lett, 17 No. 13. pp457-458,19
8 in the June 25 issue).

[Problem to be solved by the invention]

However, the hydrogen bonded to the silicon dangling bonds in the polysilicon layer through hydrogenation dissociates when the temperature exceeds 450°C, so after the hydrogenation process, the temperature is 450°C.
There is a problem that the above thermal process cannot be performed.

Furthermore, although an amorphous silicon thin film transistor using fluorinated amorphous silicon has been shown to have thermal stability up to 600° C., its mobility is two orders of magnitude lower than that of hydrogenated amorphous silicon.

Therefore, it is not always clear whether fluorination is effective in reducing grain boundary traps in polysilicon.

Therefore, an object of the present invention is to reduce silicon dangling bonds at grain boundaries of polysilicon, thereby obtaining a polysilicon thin film transistor with improved characteristics and thermal stability.

[Means to solve the problem]

In order to achieve the above object, the present invention uses fluorine, which has a higher bonding energy with silicon than hydrogen, as a terminator for silicon dangling bonds, reduces grain boundary traps in polysilicon, and improves the properties of polysilicon. A thin film transistor is obtained.

[Effect]

By using fluorine as a terminator for silicon dangling bonds, a polysilicon thin film transistor that can significantly reduce the grain boundary trap density and is also thermally stable has been obtained.

〔Example〕

(1) First example A first embodiment of the present invention will be described with reference to FIG.

FIG. 1 shows the manufacturing process of a polysilicon thin film transistor of the present invention.

In FIG. 1, 1 is a silicon wafer, 2 is a thermal oxide film,
3 is a polysilicon film, 3' is an amorphous silicon film, 3'' is a crystallized polysilicon film, 4 is a 5iOt film, 5 is a gate electrode, 6 is a source region, 7 is a drain region, 8 is a protective insulation The membrane and 9 indicate electrodes.

■ For example, a low pressure CVD method (LPCVD method) is applied to an insulating substrate on which a thermal oxide film 2 is grown on the surface of a silicon wafer 1.
Approximately 1,000 layers of polysilicon Jll 3 are deposited using the same method (see FIG. 1(a)).

(2) Self-ion Si0 is implanted into the polysilicon pa3 to make the entire film amorphous, thereby obtaining an amorphous silicon film 3' (see FIG. 1(b)).

■ Next, silicon II is made amorphous by fluorine ion (F-) implantation! A fluorine atom is introduced at 3' (see Figure 1 (C)).

■ After that, the silicon film 3' is crystallized for about 60 minutes.
Polysiliconization is performed at 0° C. for 50 hours. Thereafter, a polysilicon thin film transistor is completed by a well-known method that will be described later.

(2) That is, after etching the polysilicon film 3# into an island shape for each element, a 5i02 film 4 is deposited as a gate insulating film.

Next, a polysilicon gate electrode 5 is formed (see FIG. 1(d)).

(2) Using this gate electrode 5 as a mask, a source region 6 and a drain region 7 are formed in a self-aligned manner by ion implantation of impurities.

Then, as the protective insulating film 8, Sin! A film is deposited, contact holes are made in predetermined portions, and each electrode 9 is formed by aluminum metallization to complete a polysilicon thin film transistor (see FIG. 1(e)).

Further, the introduction of fluorine atoms according to the present invention may be performed simultaneously when forming the source region and the drain region.

(2) Second embodiment A second embodiment of the present invention will be described with reference to FIG.

FIG. 2 shows a part of the manufacturing process of the second embodiment, and the same reference numerals as in FIG. 1 indicate the same parts.

As in the first embodiment, a silicon film 3 formed on an insulating substrate is made amorphous, and then crystallized by crystal annealing to obtain a crystallized polysilicon film 3'', which is etched into an island shape. An SiO* film 4 and a gate electrode 5 are formed as an insulating film.

The source region 6 is self-aligned using this gate electrode 5 as a mask.
, impurity ions are implanted to form the drain region 7. At this time, as shown in FIG. 2, fluorine ions (F-) are also introduced together with impurity ions (for example, eight boron ions).

The introduced fluorine atoms do not initially exist under the gate electrode, but are later diffused laterally during the impurity ion activation step and protective insulating film flow step after the protective insulating film is deposited. As a result, it is possible to reduce the grain boundary trap density in the polysilicon film used as the channel layer.

(3) Third Embodiment In the third embodiment of the present invention, activated fluorine is used to reduce silicon dangling bonds, and active hydrogen is also introduced to further efficiently reduce trap density. It is something.

That is, as in the second embodiment, fluorine ions are introduced at the same time as impurity ions are introduced to form the source and drain regions. Through a subsequent heat treatment such as an impurity ion activation process, fluorine atoms are diffused under the channel layer to reduce the trap density at the grain boundaries of the polysilicon film.

Thereafter, after forming a protective insulating film, hydrogen atoms are introduced, that is, hydrogenation is performed, and then electrodes are formed by metallization. This is because after the hydrogenation step, a heat step of 450° C. or higher cannot be performed.

By using both in combination, the grain boundary trap density can be reduced more efficiently.

In addition, although these examples described examples in which a polysilicon film was formed using a low pressure CVD method on an insulating substrate,
The silicon film growth method is not limited to this, but includes atmospheric pressure CVD,
Any of the plasma CVD method, sputtering method, electron beam evaporation method, etc. may be selected.

Alternatively, the silicon film may be an amorphous silicon film, but in this case, the time required for the subsequent crystallization step is longer than in the former case.

It goes without saying that the present invention can also be applied to inversion type polysilicon thin film transistors in addition to these storage type polysilicon thin film transistors.

In this case, fluorine atoms are introduced into the amorphous silicon film 3' by fluorine ion implantation (for example, as shown in FIG.
b) After that, dopants are ion-implanted.

Alternatively, by selecting the type of ion, for example, BF! It is also possible to simultaneously introduce fluorine atoms using ``.

However, in this case, there is a disadvantage that the doping concentration and the fluorine concentration cannot be changed independently.

〔Effect of the invention〕

As in the present invention, by using a polysilicon film in which grain boundary traps are inactivated by fluorine atoms as a channel layer, silicon dangling bonds at grain boundaries in the polysilicon film due to fluorine atoms can be efficiently reduced. This method successfully reduced the threshold voltage and increased the carrier mobility of the polysilicon thin film transistor formed.Moreover, since the bond between fluorine atoms and silicon atoms is strong, dangling bonds can be effectively reduced even at high temperatures. maintained.

As a result, using the polysilicon thin film transistor of the present invention, it becomes possible to fabricate the following composite device on a large-area substrate.

That is, it is conceivable to produce an EL display using a drive circuit using a polysilicon thin film transistor and an EL light emitting element using the drive circuit. In this case, the maximum temperature during the manufacturing process is about 450°C. Therefore, after forming the polysilicon thin film transistor, an EL light emitting device can be manufactured.

Furthermore, it is also possible to fabricate an LED array driven by polysilicon thin film transistors. This LED array is polycrystalline L
For example, GaAsPLED can be MOCVD (
When fabricated by metalorganic vapor phase epitaxy (organic metal vapor phase epitaxy), the maximum temperature during the manufacturing process is approximately 650°C.Thin film transistors that can withstand such high-temperature processes are realized due to heat resistance, which is a feature of the present invention. .

[Brief explanation of drawings]

Fig. 1 is a manufacturing process diagram of the first embodiment of the present invention, and Fig. 2 is an explanatory diagram of the manufacturing process of the second embodiment of the invention. 1-Silicon wafer, 2...Thermal oxide film, 3 −・
Polysilicon film, 3'--amorphous silicon film, 4-8i
O! film, 5--gate electrode, 6--source region, 7--drain region, 8--protective insulating film, 9--electrode. Patent Applicant Fuji Zerofukus Co., Ltd. Representative Patent Attorney Akira Yamatani

Claims (1)

[Claims] (1) A polysilicon thin film transistor characterized in that a polysilicon film in which grain boundary traps are inactivated with fluorine atoms is used as a channel layer.