JPH0213075A - Solid-state image pick-up device - Google Patents

Abstract

PURPOSE:To execute a projection as a normal picture without a defect even when a defective not to respond to a light is contained in a photosensor array by image-forming the same light image for one picture element to the odd plural number of photosensors inputting the output signals to a logic circuit, adopting a mojority logic and obtaining a correct signal. CONSTITUTION:At the time of paying attention to a picture element alphaH, a signal related to it is outputted from photosensors G, H and I, it is inputted from the photosensor G through a latch circuit P1 to a logic circuit TH at a time t1, it is inputted from the photosensor H through a latch circuit P2 to the logic circuit TH at a time t2, and it is inputted from the photosensor 1 through a latch circuit P3 to the logic circuit TH at a time t3. In the logic circuit TH, the majority logic of the above-mentioned respective input signals is adopted, and a signal alphah is sent. Thus, even when any of the photosensors G, H and I is the defective, a correct picture element signal can be obtained, and an image pick-up element is operated as one which is substantially normal.

Description

[Detailed Description of the Invention] [Summary] CCD (charge coupled dav)
ice), MIS (metal 1nsulato
Regarding solid-state imaging devices that have solid-state imaging devices such as diode arrays and silicon (St) photodiode arrays, even if some of the photosensors that make up the solid-state imaging device are defective, The purpose is to complement the image to be received by the photosensor using simple means and obtain a normal screen. at least three of the photosensors
A mirror that is rotatably set to switch and form images individually, and a logic circuit that outputs a signal that is a result of manually inputting signals regarding the same light image from the at least three photosensors and taking majority logic. Configure to be prepared.

[Industrial application field]

The present invention utilizes a CCD (charge coupled
device), MIS (metal 1nsu
The present invention relates to a solid-state imaging device having a solid-state imaging element made of a silicon (Si) photodiode array, a silicon (Si) photodiode array, or the like.

In recent years, as TV (television) cameras have become more reliable and smaller, conventional image pickup tubes are being replaced by solid-state image sensors, but the number of pixels is increasing in order to record or transmit higher quality images. Therefore, it is necessary to increase the number of light receiving elements in a solid-state image sensor.

[Conventional technology]

Conventionally, solid-state image sensors include Mis-type image sensors and CCDs.
type image pickup devices are known.

FIG. 7 shows an explanatory diagram of main parts for explaining the configuration of the MIS type image sensor.

In the figure, l is a vertical shift register, 2 is a horizontal shift register, 3A is a vertical selection line, 3B is a vertical signal line,
4 is a video output line, 5 is a horizontal switching transistor (HMO3'T), 6 is a vertical switching transistor (VMO3T), and 7 is a photodiode. Incidentally, although a set consisting of one vertical switching transistor 6 and one photodiode 7 is called a pixel, it is actually a cell that receives a signal for one pixel.

FIG. 8 shows a cutaway side view of the main parts to explain the specific structure of the part (pixel) surrounded by the broken line circle in FIG. 7,
The same symbols as those used in FIG. 7 indicate the same parts or have the same meaning.

In the figure, 8 is an n-type silicon semiconductor substrate, 9 is a p1 type source region, 10 is a p+ type drain region, 11 is an insulating film, 12 is a gate electrode, 13 is a drain voltage of 4%, S is a source, and D is The drain and G indicate the gate, respectively.

Note that the pn junction formed between the p+ type source region 9 and the n type silicon semiconductor substrate 8 is a photodiode (photosensor).
It is 7.

In this MrS type image pickup device, a vertical shift register 1 generates a vertical scanning pulse and applies it to each row of the array in sequence. VMO connected to vertical selection line 3A
When the scanning pulse is applied to the gate of 3T6, it becomes conductive, and the signal charge accumulated in the photodiode 7 is sent to the vertical signal vA3B. The photodiodes 7 of pixels to which no vertical scanning pulse (selection pulse) is applied continue to accumulate signal charges. Vertical signal line 3B(7)-
The end is connected to HMO5T5, and when HMO5T5 is sequentially turned on by horizontal shift and application of horizontal selection pulse from register 2, the signal charge temporarily stored in vertical signal line 3 is sequentially transferred to the video output line. 4, the signal is sent out as a video signal from the output end.

FIG. 9 shows an explanatory diagram of main parts for explaining the configuration of a CCD type image sensor.

In the figure, 14 is a transfer CCD, 1.5 is a memory CCD, 16 is a horizontal CCD, and 17 is a photodiode.

In this image sensor, a transfer CCD 14 is arranged between rows of photodiodes 17, and a memory CCD 14 is arranged between rows of photodiodes 17.
It is connected to the horizontal CCD l6 via D15.

The signal charge generated in the photodiode 17 is accumulated in each junction capacitance by a charge accumulation operation. When the accumulation period ends, the signal charges for all pixels are simultaneously transferred to the adjacent transfer CCD 14. After that, the signal charge is COD
The charges are transferred in synchronization with the clock pulses applied to the transfer electrodes and sent to the memory CCD 15, and when read out to the output terminal, the charges for each row of the transfer CCD are transferred to the horizontal CCD l.
6 and output in order.

[Problem to be solved by the invention]

Each of the above-mentioned image sensors has an array in which a large number of photosensors are arranged, and the number of these photosensors is likely to increase more and more in the future.Therefore, the number of defective photosensors that do not respond to light will also increase, and all Obtaining an array composed of normal photosensors becomes almost impossible.

This situation is difficult to overcome when large amounts of random access memory (
Random access memory:
This is similar to a focus failure in RAM, but Daisha iRAM introduces redundancy to replace such defective bits with good bits and salvage the entire RAM. However, it is impossible to perform such relief using an image sensor.

Figure 1O shows an optical explanatory diagram for explaining the image formed on the imaging element 9. In the figure, 18 is the object to be imaged, 19 is the lens, 20 is the focal point, and 21 is the imaging element. The images generated on the imaging plane are shown respectively.

Since the surface on which the illustrated image 21 is formed is the surface of the photosensor, if the photosensor is a defective product that does not respond to light, the image 21 will be missing from the entire screen and the image quality will deteriorate. .

The present invention makes it possible to obtain a normal screen by complementing the image to be received by the photosensor using a simple means even if some of the photosensors constituting the solid-state image sensor include a defective one. try to make it possible.

[Means to solve the problem]

The solid-state imaging device of the present invention includes a photosensor array (for example, an array consisting of photosensors D to M) arranged in a -dimensional or two-dimensional manner, and an identical optical image for one pixel (for example, pixel αN) arranged in at least three of the photosensors. Signals related to the same light image from a mirror (for example, mirror 33) which is set to be freely rotatable in order to switch between individual images and the at least three photosensors (for example, photosensors G, H, and I) are input, and a majority decision is made. A logic circuit (for example, logic circuit TH) that outputs a signal (for example, signal αh) as a result of logic calculation
It is configured so that it is equipped with the following.

[Effect]

By adopting the above method, even if there are defective products that do not respond to light in the photo sensor array that constitutes the solid-state image sensor, as long as there are not many defective products, the resulting screen can be treated as normal without any defects. Since it can display an image, it is effective in repairing solid-state image sensors, which are concerned about the number of defective products increasing in the future as the number of photo sensors increases.

〔Example〕

FIG. 1 shows an optical explanatory diagram for explaining an imaging system in an embodiment of the present invention.

In the figure, 31 is an object to be imaged, 32 is a lens, 33 is a mirror, and 34 is an image formed on the light receiving surface of the image sensor.

In this imaging system, the mirror 33 can rotate clockwise and counterclockwise within a limited angular range around a predetermined axis. Therefore, it is possible to select the imaging plane on which the image 34 is formed, that is, the photosensor.

FIG. 2 shows a perspective view of essential parts for explaining the mirror drive mechanism, and the same symbols as those used in FIG. 1 indicate the same parts or have the same meanings.

In the figure, 35 is a stepping motor, 37 is a rotating shaft, and 38 is a light beam.

Currently, stepping motors 35 with a rotational angle accuracy of 8×10-' (rad) are commercially available, and those with sufficient accuracy to step-drive the mirror 33 can be easily obtained.

FIG. 3 shows a mirror 33 interposed between the lens 32 seen in FIG. 1 and the array of photosensors on which an image 34 is formed.
This is a diagram for explaining how to shift the image formed on the array.

In the figure, D to M are one-dimensionally arranged photo sensors;
α. α9 to α9 indicate pixels, and t to t3 indicate times.

Now, at time t, pixel α is connected to photosensor D, pixel α is connected to photosensor E, and so on, pixel α9 is connected to photosensor E, and so on.
are respectively imaged on a photo sensor.

Next, at time t2, each pixel is shifted by one photosensor due to the rotation of the mirror 33, and pixels α,
is imaged on photosensor D, pixel αE is imaged on photosensor E, and similarly pixel α9 is imaged on photosensor M.

Next, at time t3, each pixel is shifted by one photosensor from the state at time t2 due to further rotation of the mirror 33, and the pixel α. is imaged on photosensor E, pixel α is imaged on photosensor F, and similarly, pixel α is imaged on photosensor M, respectively.

Such movement of the image formation can be performed sufficiently faster than the speed at which the object being imaged moves or changes.

Now, focusing on a pixel, for example, pixel α, it is imaged on the photosensor G at time L1, imaged on the photosensor H at time t2, and furthermore, at time t3. An image is formed on the photosensor I.

Therefore, the signal that is the result of applying majority logic to the output signals from the photosensors G, H, and I regarding the pixel α□ is used as the correct signal for the pixel α□. Even if any one of them is defective, a correct pixel signal will be obtained, and the imaging element will operate as a substantially normal one.

FIG. 4 shows a block diagram of essential parts for explaining a circuit for adopting majority logic, and symbols used in FIG. 3 indicate the same parts or have the same meanings.

In the figure, P+, Pz, P:+ are latch circuits, TG,
TM and TI are logic circuits, α9. αh, α.

indicate the signals after adopting majority logic.

As before, focusing on pixel α, the signals related to it are output from photosensors G, H, and I, and at time, the signals are input from photosensor G to logic circuit T via latch circuit P, and at time t2. It is inputted from the photosensor H to the logic circuit T, , via the launch circuit P2, and at time t3, it is inputted from the photosensor I to the logic circuit T, via the latch circuit P3. In the logic circuit T, the majority logic of each of the input signals is adopted and a signal α is sent out.

Figure 5 shows a logic circuit that adopts the majority logic shown in Figure 4.
For example, this is a circuit diagram specifically representing a logic circuit T, and the same symbols as those used in FIG. 4 indicate the same parts or have the same meanings.

In the figure, P+ * pz+ p:l is the output of the latch circuits P, , pg, and P3 shown in FIG. 4, and ENI.

EN2. EN3 is exclusive Noah (exclusive
nor) circuit, Ql, Q2. Q3 indicates a transfer gate transistor.

FIG. 6 is a circuit diagram specifically representing the exclusive NOR circuit shown in FIG.

In the figure, IVY, IVz, IVi are inverters, 0
．． ．． 0□ is an OR circuit, ND is a NAND
) shows each circuit.

In the above embodiment, it takes 3 to obtain the correct signal for one pixel.
In this case, if two photosensors are defective, correct signals cannot be obtained.

If necessary, five photosensors may be used to switch and form the same light image for one pixel, and majority logic of the signals derived from them may be used.

〔Effect of the invention〕

In the solid-state imaging device according to the present invention, the same light image for one pixel is formed on an odd number of photosensors, and the output signals thereof are input to a logic circuit and majority logic is used to output the correct signal. I'm trying to get it.

By adopting the above configuration, even if there are defective products that do not respond to light in the photo sensor array that makes up the solid-state image sensor, as long as there are not many defective products, the resulting screen can be treated as normal without any defects. Since it can display an image, it is effective in repairing solid-state image sensors, which are concerned about the number of defective products increasing in the future as the number of photo sensors increases.

[Brief explanation of the drawing]

Figure 1 is an optical explanatory diagram to explain the image system of the present invention, Figure 2 is a perspective view of the main parts to explain the mirror drive mechanism, and Figure 3 is an illustration of how to move the image. Diagram for explanation; Figure 4 is a main block diagram for explaining a circuit that uses majority logic; Figure 5 is a circuit specifically showing the logic circuit that uses majority logic as shown in Figure 4. Figure 6 is a circuit diagram specifically representing the exclusive NOR circuit shown in Figure 5, Figure 7 is an explanatory diagram of the main parts to explain the configuration of the MIS type image sensor, and Figure 8 is a pixel Figure 9 is a cross-sectional side view of the main part to explain the specific structure of the (cell), Figure 9 is an explanatory diagram of the main part to explain the structure of the CCD type image sensor, and Figure 1O is formed into the first image element. Each represents an optical explanatory diagram to explain the image. In the figure, 31 is the object to be imaged, 32 is the lens, 33 is the mirror, 34 is the image formed on the light receiving surface of the image element, 35 is the stepping motor, 37 is the rotation axis, 38
is a light beam, D to M are one-dimensionally arranged photosensors, αD
αH to αH are pixels, t3 is time, P, , PZ, P3
is a latch circuit, Tc, To, T+ are logic circuits, α9
．． αh, α positive is the signal after adopting majority logic, pI+
p2 and p3 are the outputs of latch circuits p+, p, , p,
ENI. EN2. EN3 is an exclusive NOR circuit, Ql, Q2゜Q3 are transfer gate transistors, IV+,
IVz and IV3 are inverters, O+ and 02 are OR circuits, and ND is a NAND circuit, respectively. Patent applicant: Fujitsu Ltd. Representative Patent Attorney Shoji Aitani

Claims (1)

[Scope of Claims] A photosensor array arranged one-dimensionally or two-dimensionally, and a mirror rotatably set to switch and form the same light image of one pixel on at least three of the photosensors. and a logic circuit that receives signals related to the same optical image from the at least three photosensors and outputs a signal as a result of taking majority logic.