JPH0212954A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH0212954A
JPH0212954A JP16361688A JP16361688A JPH0212954A JP H0212954 A JPH0212954 A JP H0212954A JP 16361688 A JP16361688 A JP 16361688A JP 16361688 A JP16361688 A JP 16361688A JP H0212954 A JPH0212954 A JP H0212954A
Authority
JP
Japan
Prior art keywords
substrate
groove
semiconductor
temperature
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16361688A
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Japanese (ja)
Inventor
Toshiro Nakanishi
俊郎 中西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16361688A priority Critical patent/JPH0212954A/en
Publication of JPH0212954A publication Critical patent/JPH0212954A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To maintain a semiconductor element at predetermined low temperature and to obtain a semiconductor device in which stable and satisfactory element characteristics are always obtained by providing a first semiconductor substrate having a silicon oxide film on its surface including the inner face of a groove and a second semiconductor substrate formed with the element, and feeding refrigerant in the groove. CONSTITUTION:A liquid circulating groove 2 communicating with an upper face is formed on a CCD type image sensor, a less dopant irregularity is formed, for example, by a MCZ method on a first Si substrate 1 formed with a thin silicon dioxide film 3 on its surface, a P-type second Si substrate 4 formed as thin as possible employs an Si substrate of a double structure thermally adhering with the film 3 as a medium, CFC-113 controlled, for example, at a constant temperature of 0 deg.C or lower is fed as a refrigerant into the groove 2 formed on the upper face of the first substrate 1 thereby to maintain the element temperature at constant temperature near 0 deg.C.

Description

【発明の詳細な説明】 〔概 要〕 半導体装置、特に基板内に冷却手段を具備した半導体装
置に関し、 素子温度を一定した低温度に維持し、環境温度の変化に
影響されずに常に安定且つ良好な素子特性が得られる構
造の提供を目的とし、 上面に溝を有し、且つ該溝の内面を含む表面に酸化シリ
コン膜を有する第1の半導体基板と、該第1の半導体基
板の該溝を有する面上に該酸化シリコン膜を介して接着
され、且つ半導体素子が形成された第2の半導体基板と
を有し、該溝内に冷媒を流通せしめてなる構成を有する
[Detailed Description of the Invention] [Summary] Regarding semiconductor devices, especially semiconductor devices equipped with a cooling means in the substrate, the device temperature is maintained at a constant low temperature and is always stable and unaffected by changes in environmental temperature. A first semiconductor substrate having a groove on its upper surface and a silicon oxide film on its surface including the inner surface of the groove; The second semiconductor substrate is bonded to a surface having a groove via the silicon oxide film and has a semiconductor element formed thereon, and has a structure in which a coolant is allowed to flow within the groove.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体装置、特に基板内に冷却手段を具備した
半導体装置に関する。
The present invention relates to a semiconductor device, and more particularly to a semiconductor device including a cooling means within a substrate.

VLS Iの時代におけるDRAM、撮像素子等の半導
体装置の材料には、依然として引上げ法により製造され
た単結晶シリコンが用いられる。
In the era of VLSI, single crystal silicon manufactured by the pulling method is still used as a material for semiconductor devices such as DRAMs and image sensors.

一方、シリコン結晶が素子特性に悪影響を及ぼす要因と
しては、G−R(generation−recomb
inati。
On the other hand, G-R (generation-recomb
inati.

n)中心から発生する小数キャリアのライフタイムや、
バルクから発生する拡散電流が挙げられる。
n) Lifetime of minority carriers generated from the center,
One example is the diffusion current generated from the bulk.

このG−R中心から発生する電流や拡散電流は、特に高
集積化により素子が微細化された際には、上記DRAM
におけるリフレッシュタイムの短縮、撮像素子における
S/N比の減少等、素子特性の劣化を招く原因となる。
This current generated from the G-R center and the diffusion current are
This causes deterioration of device characteristics, such as a reduction in the refresh time in the image sensor and a decrease in the S/N ratio in the image sensor.

そのためG−R中心から発生する電流や、基板からの拡
散電流を減少する手段が望まれている。
Therefore, a means for reducing the current generated from the center of the G-R and the current diffused from the substrate is desired.

〔従来の技術〕[Conventional technology]

第5図は従来の撮像素子の受光部の断面を模式的に示し
た図であるが、この図に示されるように従来の撮像素子
においては、通常の引上げ法で製造された200〜30
0μm程度の厚さの例えばp型シリコン(Si)基板5
1上に、直に、フィールド酸化膜52及びp゛型チャネ
ルストッパ53で画定分離された複数のn゛型拡散領域
54が整列形成され、該n゛型拡散領域54とp型Si
基板51とによって構成されるフォトダイオード(P、
D)が画素として用いられていた。
FIG. 5 is a diagram schematically showing a cross section of the light receiving part of a conventional image sensor. As shown in this figure, in the conventional image sensor, 200 to 30
For example, a p-type silicon (Si) substrate 5 with a thickness of about 0 μm.
A plurality of n-type diffusion regions 54 defined and separated by a field oxide film 52 and a p-type channel stopper 53 are formed directly on the layer 1, and the n-type diffusion regions 54 and the p-type Si
A photodiode (P,
D) was used as a pixel.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

かかる撮像素子において、画素であるフォトダイオード
(P、D)の接合部に形成される空乏層55内にG−R
中心56が存在すると、該G−1?中心56で発生した
キャリアが、再結合によって消滅せずに、そのまま接合
を通過して空乏層内を移動し接合リーク電流になる。ま
たバルク内の各種の欠陥等によって生ずる発生中心によ
って形成されたキャリアによる拡散電流も、該撮像素子
に用いる低濃度基板中においては、一部が再結合によっ
て消滅せずに接合を通過して接合リーク電流となり、こ
れらの接合リーク電流が該フォトダイオードのダークシ
グナル(暗時出力信号)となって、該フォトダイオード
の悪魔に相当する受光時出力信号電圧と暗時出力信号電
圧の比、即ちS/N比を低下させる。
In such an image sensor, a G-R layer is formed in a depletion layer 55 formed at the junction of photodiodes (P, D) that are pixels.
If the center 56 exists, the G-1? The carriers generated at the center 56 do not disappear due to recombination, but instead pass through the junction and move within the depletion layer, resulting in a junction leakage current. In addition, in the low-concentration substrate used for the image sensor, some of the diffusion current caused by carriers formed by generation centers caused by various defects in the bulk passes through the junction without being annihilated by recombination. These junction leak currents become the dark signal (dark output signal) of the photodiode, and the ratio of the output signal voltage during light reception and the output signal voltage during dark, which corresponds to the devil of the photodiode, is S. /N ratio is reduced.

上記のように、G−R中心から発生する電流や拡散電流
は接合リーク電流として検知され、Si基板を予め熱処
理することによって接合電流が低減できることが確かめ
られている。しかしその効果は高々1/2程度に減少す
る程度である。
As mentioned above, the current generated from the center of the G-R and the diffusion current are detected as junction leakage current, and it has been confirmed that the junction current can be reduced by heat-treating the Si substrate in advance. However, the effect is reduced to about 1/2 at most.

これに対し接合リーク電流は、温度の上昇と共に指数関
数的に増大する性質を有するので、素子温度の上昇を抑
えることが、素子特性の劣化を防止するうえに特に大き
な効果を有する。
On the other hand, since the junction leakage current has a property of increasing exponentially as the temperature rises, suppressing the rise in element temperature has a particularly large effect in preventing deterioration of element characteristics.

そこで本発明は、素子温度を一定した低温度に維持し、
環境温度の変化に影響されずに常に安定且つ良好な素子
特性が得られる半導体装置の構造を提供することを目的
とする。
Therefore, the present invention maintains the element temperature at a constant low temperature,
It is an object of the present invention to provide a structure of a semiconductor device that can always provide stable and good device characteristics without being affected by changes in environmental temperature.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題は、上面に溝を有し、且つ該溝の内面を含む表
面に酸化シリコン膜を有する第1の半導体基板と、該第
1の半導体基板の該溝を有する面上に該酸化シリコン膜
を介して接着され、且つ半導体素子が形成された第2の
半導体基板とを有し、該構内に冷媒を流通せしめてなる
本発明による半導体装置によって解決される。
The above problem is to provide a first semiconductor substrate having a groove on its upper surface and a silicon oxide film on the surface including the inner surface of the groove, and a silicon oxide film on the surface of the first semiconductor substrate having the groove. The problem is solved by a semiconductor device according to the present invention, which has a second semiconductor substrate bonded via a semiconductor substrate and on which a semiconductor element is formed, and in which a coolant is allowed to flow.

〔作 用〕[For production]

即ち本発明は、本発明の半導体装置においてはSi基板
を、液体循環用溝を上面に有する第1のSt基板上に酸
化Si膜を介して可能な限り薄い良質の、素子が形成さ
れる第2のSi基板を接着した2重構造とする。
That is, in the semiconductor device of the present invention, the Si substrate is placed on a first St substrate having a liquid circulation groove on the upper surface, with a Si oxide film interposed therebetween, and a high quality element is formed as thin as possible. It has a double structure in which two Si substrates are bonded together.

本発明においては、素子が形成される第2のSi基板が
極力薄く形成されることによって該第2のSi基板内に
発生する拡散電流は減少し、且つ該第2のSi基板が酸
化Si膜によって下部の厚い第1のSi基板から絶縁分
離されていて、厚い第1のSi基板内に生ずる拡散電流
が素子領域に流れ込むことがない。
In the present invention, the second Si substrate on which the element is formed is formed as thin as possible to reduce the diffusion current generated in the second Si substrate, and the second Si substrate is made of an oxidized Si film. The first thick Si substrate is insulated from the lower thick first Si substrate, and the diffusion current generated in the first thick Si substrate does not flow into the element region.

また液体循環用溝内に一定の低温度を有する冷媒を流通
することによって素子の形成される第2のSi基板が一
定の低温度に維持されるので、G−R中心で発生する電
流及び拡散電流が減少し、且つ安定に保たれる。
In addition, the second Si substrate on which the element is formed is maintained at a constant low temperature by circulating a coolant having a constant low temperature in the liquid circulation groove, so that the current generated at the center of G-R and the diffusion The current decreases and remains stable.

そしてこれらにより、環境温度の変化に影響されずに常
に素子の接合リーク電流が小さい値に保たれ、安定且つ
良好な素子特性を有する半導体装置が提供される。
As a result, a semiconductor device is provided in which the junction leakage current of the element is always kept at a small value without being affected by changes in environmental temperature, and has stable and good element characteristics.

〔実施例〕 以下本発明を、図示実施例により具体的に説明する。〔Example〕 The present invention will be specifically explained below with reference to illustrated embodiments.

第1図は本発明の一実施例の平面図(a)及びA−A矢
視断面図中)、第2図(a)〜(elは本発明に係る製
造工程の平面図、第3図(a)〜(e)は第2図のA−
A矢視断面を示す製造工程断面図、第4図は本発明の効
果を示す図である。
FIG. 1 is a plan view (a) of an embodiment of the present invention and a sectional view taken along the line A-A), FIGS. 2 (a) to (el are plan views of the manufacturing process according to the present invention), (a) to (e) are A- in Figure 2.
FIG. 4, which is a cross-sectional view of the manufacturing process taken in the direction of arrow A, is a diagram showing the effects of the present invention.

全図を通じ同一対象物は同一符合で示す。Identical objects are indicated by the same reference numerals throughout the figures.

本発明に係るCCD型撮像装置は例えば第1図に示すよ
うに、上面に連通ずる液体循環用溝2が形成され、表面
に薄い二酸化シリコン(SiOz)膜3が形成された引
上げ法即ちCZ法による第1のSi基板(導電型を問わ
ず)■上に、例えば平行磁場をかけながら引上げるMC
Z法によりドーパントむらが少なく形成され、且つ素子
特性に影響を及ぼさない範囲で可能な限り薄く形成され
たp型の第2のSi基板4が、上記SiO□膜3を媒体
として加熱接着されてなる2重構造のSi基板を用い、
上記第2のSi基板4の表面部に通常通り整列配設され
るフォトダイオード及びCCD 領域を個々に分離する
フィールド酸化膜5及びその下部のp゛型チャネルスト
ッパ6が形成され、該フィールド酸化膜5に画定された
領域にn゛型拡散領域7とp型Si基板4よりなるフォ
トダイオードPD、 、 PD。
For example, as shown in FIG. 1, the CCD type imaging device according to the present invention uses the pulling method, that is, the CZ method, in which a communicating liquid circulation groove 2 is formed on the upper surface and a thin silicon dioxide (SiOz) film 3 is formed on the surface. MC is pulled onto the first Si substrate (regardless of conductivity type) by applying a parallel magnetic field, for example.
A p-type second Si substrate 4, formed by the Z method with little dopant unevenness and as thin as possible without affecting device characteristics, is heat-bonded using the SiO□ film 3 as a medium. Using a double structure Si substrate,
A field oxide film 5 is formed on the surface of the second Si substrate 4 to separate the photodiode and CCD regions which are normally aligned, and a p-type channel stopper 6 is formed below the field oxide film 5. A photodiode PD, , PD consisting of an n-type diffusion region 7 and a p-type Si substrate 4 is located in a region defined by 5.

、PDが形成され、n型拡散領域8A、8B等と、1層
目の転送電極G0、Gl!、G13.2N目の転送電極
6つ1、Go、hs等よりなる垂直方向電荷結合素子V
CCD+ 、VCCDz等が形成された構造を有し、第
1のSi基板1の上面に形成されている液体循環用溝2
内に冷媒として例えば0℃以下の定温に制御されたフレ
オン113(CCLzFCCtF、)を流通して、素子
温度が0℃近傍の定温に維持された構成を有している。
, PD are formed, and n-type diffusion regions 8A, 8B, etc., and first layer transfer electrodes G0, Gl! , G13. Vertical charge-coupled device V consisting of six 2Nth transfer electrodes 1, Go, hs, etc.
A liquid circulation groove 2 is formed on the upper surface of the first Si substrate 1 and has a structure in which CCD+, VCCDz, etc. are formed.
For example, Freon 113 (CCLzFCCtF,) whose temperature is controlled at a constant temperature of 0° C. or lower flows as a refrigerant within the device, so that the element temperature is maintained at a constant temperature near 0° C.

なおTGい TG2 、TGはトランスファゲートでこ
の部分の基板面には基板4より高濃度のp型拡散領域が
形成されている。
Note that TG2 and TG are transfer gates, and a p-type diffusion region having a higher concentration than that of the substrate 4 is formed on the substrate surface of this portion.

本発明は上記実施例に示されるような基板構造を有する
ことが特徴である。従って以下に図を参照し、製造方法
により本発明に係る基板構造を更に詳しく説明する。
The present invention is characterized by having a substrate structure as shown in the above embodiments. Therefore, the substrate structure according to the present invention will be explained in more detail below by the manufacturing method with reference to the drawings.

第2図(al及び第3図(al参照 上記実施例の撮像装置に用いる2重構造のSi基板を形
成するには、例えば通常のcZ法により形成され、全体
゛の反りが25μm以下、1c11口当たりの反りが6
μm以下で、任意の面方位及びドーパントを有する厚さ
500μm程度の直径4インチの第1のSi基板1上に
厚さ0.5〜1μm程度のレジストH9を塗布し、通常
のフォトプロセスにより該フォトレジスト層9に図示の
ように蛇行した開ロバターン10を形成し、次いで上記
レジスト層9をマスクにし弗硝酸の混液(IF:HNO
+=1:2)で約100程度度ウェットエツチングを行
い第1の基板1面に例えば蛇行した液体循環用?112
を形成する。
In order to form the double-structured Si substrate used in the imaging device of the above embodiment, it is formed by, for example, the usual CZ method, and the entire warpage is 25 μm or less. Warp in mouthfeel is 6
A resist H9 with a thickness of about 0.5 to 1 μm is coated on a first Si substrate 1 with a diameter of 4 inches and a thickness of about 500 μm, which has an arbitrary plane orientation and dopant, and a resist H9 with a thickness of about 0.5 to 1 μm is applied to the substrate 1 by a normal photo process. A meandering open pattern 10 is formed on the photoresist layer 9 as shown in the figure, and then, using the resist layer 9 as a mask, a mixed solution of fluoronitric acid (IF: HNO
+=1:2) for about 100 degrees and wet etching is applied to one surface of the first substrate, for example, for liquid circulation in a meandering pattern? 112
form.

この?R2は例えば深さ(D) 100 p m 、幅
(w) 500 pm程度に形成される。
this? R2 is formed to have a depth (D) of about 100 pm and a width (w) of about 500 pm, for example.

なおこの溝2の形成はりアクティブイオンエツチング処
理によって行ってもよいが、レジストマスクが大幅に厚
くなり、且つ時間が長くかかるという難点がある。
Although the groove 2 may be formed by active ion etching, there are disadvantages in that the resist mask becomes significantly thicker and it takes a longer time.

第2図(b)及び第3図(b)参照 次いでレジスト層9を除去し、該基板1をアンモニア水
(NH4011)と過酸化水素(HiOz)との混液で
洗浄した後、該基板1を乾燥酸素中900℃で30分程
度熱酸化を行い、該基板1の表面に厚さ200人程度の
薄いSi0g膜3を形成する。
Refer to FIGS. 2(b) and 3(b). Next, the resist layer 9 is removed, and the substrate 1 is cleaned with a mixture of aqueous ammonia (NH4011) and hydrogen peroxide (HiOz). Thermal oxidation is performed at 900° C. for about 30 minutes in dry oxygen to form a thin SiOg film 3 with a thickness of about 200 mm on the surface of the substrate 1.

第2図(0)及び第3図(C)参照 次いで上記Si0g膜3の形成されたSi基板1上に、
例えばMCZ法により製造され、両面研摩し例えば硫酸
(HgSO4)とH,0□との混液で洗浄して清浄な表
面に形成された厚さ500pm程度のp型を有する第2
のSi基板4を載置し、窒素中1100℃で30分程度
熱処理する。この熱処理により第1と第2のSi基板1
と4はSiO2膜3を介して、気密に接合される。
Refer to FIGS. 2(0) and 3(C) Next, on the Si substrate 1 on which the Si0g film 3 was formed,
For example, a second layer having a p-type with a thickness of about 500 pm is formed on a clean surface manufactured by the MCZ method, polished on both sides, and washed with a mixed solution of, for example, sulfuric acid (HgSO4) and H,0□.
A Si substrate 4 of 1 is placed thereon and heat treated in nitrogen at 1100° C. for about 30 minutes. Through this heat treatment, the first and second Si substrates 1
and 4 are hermetically joined via the SiO2 film 3.

第2図(d)及び第3図(d)参照 次いで第2のSi基板4側を片面研摩により該基板に形
成される素子特性に悪影響を与えない可能な限り薄い厚
さ(1)例えば50μm程度になるまで研削する。なお
研摩法は例えばメカノケミカルボリッシング法により、
研摩剤にはコロイダルシリカを用い、研摩時の圧力は2
50Kg/cm”とする。
Refer to FIG. 2(d) and FIG. 3(d) Next, the second Si substrate 4 side is single-sided polished to the thinnest possible thickness (1), for example, 50 μm, without adversely affecting the characteristics of the device formed on the substrate. Grind until it reaches the desired level. The polishing method is, for example, a mechanochemical polishing method.
Colloidal silica is used as the abrasive, and the pressure during polishing is 2
50Kg/cm".

第2図(0)及び第3図((i)参照 次いで裏面から、レジストをマスクにしたウェットエツ
チング手段或いはイオンミーリング法により第1のSi
基板1に液体循環用溝2の両端部に達する液体流通孔1
1及び12を形成し、これによって、本発明に用いる2
重構造を有し、冷媒流通手段を備えたSi基板が完成す
る。
Refer to FIG. 2(0) and FIG. 3(i). Next, the first Si is etched from the back side by wet etching using a resist as a mask or by ion milling.
Liquid circulation holes 1 reaching both ends of the liquid circulation groove 2 in the substrate 1
1 and 12, thereby forming 2 used in the present invention.
A Si substrate having a layered structure and equipped with a coolant circulation means is completed.

そして以後通常の半導体素子の形成方法に従って第2の
Si基板4上に例えば第1図に示すようなCCD型の撮
像素子等の半導体素子が形成され、本発明に係る半導体
装置が完成する。
Thereafter, a semiconductor element such as a CCD type image pickup element as shown in FIG. 1 is formed on the second Si substrate 4 according to a normal semiconductor element forming method, thereby completing a semiconductor device according to the present invention.

第4図は実施例に係るCCD型撮像素子の、暗時出力電
圧を冷媒の流通により基板温度を変化させて測定した本
発明の効果を示す図である。
FIG. 4 is a diagram illustrating the effect of the present invention, in which the dark output voltage of the CCD type image pickup device according to the example was measured while changing the substrate temperature by circulating a coolant.

この図に示されるように、前述したフレオン−113(
CCI□FCCIF、)等の冷媒を液体循環用溝2に流
通させて例えば基板温度を0℃に冷却すれば、通常の使
用状態である基板温度30℃に比べて暗示出力電圧が約
174に減少でき、該撮像素子のSN比は大幅に改善さ
れる。
As shown in this figure, Freon-113 (
If a refrigerant such as CCI□FCCIF, ) is allowed to flow through the liquid circulation groove 2 and the substrate temperature is cooled to, for example, 0°C, the implied output voltage will be reduced to about 174 compared to the normal usage condition when the substrate temperature is 30°C. The SN ratio of the image sensor can be greatly improved.

また本発明においては素子が形成される基板即ち素子活
性領域が研摩により非常に薄く形成されるので、該活性
領域内に生ずる拡散電流は大幅に減少し、この点でも接
合リークが減少して素子のSN比が向上する。
Furthermore, in the present invention, since the substrate on which the device is formed, that is, the device active region, is formed very thinly by polishing, the diffusion current generated in the active region is significantly reduced, and in this respect, junction leakage is also reduced and the device The signal-to-noise ratio is improved.

更にまた、基板を貼りつけた部分の残留歪みが不純物の
ゲッタリング効果を持つため、素子特性の改善にも効果
を生ずる。
Furthermore, since the residual strain in the area where the substrate is attached has an impurity gettering effect, it is also effective in improving device characteristics.

なお本発明は上記実施例に示した撮像装置に限らず、半
導体記憶装置等信の各種半導体ICに対しても適用され
る。
Note that the present invention is applicable not only to the imaging device shown in the above embodiments but also to various semiconductor ICs such as semiconductor memory devices.

〔発明の効果〕〔Effect of the invention〕

以上説明のように本発明によれば、半導体素子の接合リ
ークを大幅に減少することができるので、固体撮像装置
のSN比の向上、半導体記憶装置の記憶保持時間の延長
等、半導体装置の性能及び信頼度の向上に有効である。
As explained above, according to the present invention, it is possible to significantly reduce junction leakage of semiconductor elements, thereby improving the performance of semiconductor devices, such as improving the S/N ratio of solid-state imaging devices and extending the memory retention time of semiconductor memory devices. and is effective in improving reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の平面図(a)及びA−A矢
視断面図(b)、 第2図(a)〜(e)は本発明に係る製造工程平面図、
第3図(a)〜(8)は本発明に係る製造工程断面図、
第4図は本発明の効果を示す図、 第5図は従来構造の模式側断面図 である。 図において、 1は第1のSi基板、 2は液体循環用溝、 3はSiO2膜、 4は第2の(p型)Si基板、 5はフィールド酸化膜、 6はp1型チャネルストッパ、 7はn゛型拡散領域、 8A、8Bはn型拡散領域、 9はレジスト層、 lOは開孔パターン、 11.12は液体流通孔、 PD+ 、PD2 、PDはフォトダイオード、’II
 、Gl□、G13は1層目の転送電極、Gz+ s 
Gtz 、Gz3は2層目の転送電極、VCCD+ 、
VCCDgは垂直方向電荷結合素子を示す。 (d) 平面図 (bン A−A矢視踏面口 永惠四め一史施グ°1め日 第 1 叱 本発明1(係る製造1糧乎茄因 め Z 口  (+め1) 本発明に係ろ製遥、1謹平面図 活 起 (−+/)2) め 目
FIG. 1 is a plan view (a) and a sectional view taken along the line A-A (b) of an embodiment of the present invention, and FIGS. 2 (a) to (e) are plan views of the manufacturing process according to the present invention.
3(a) to (8) are sectional views of the manufacturing process according to the present invention,
FIG. 4 is a diagram showing the effects of the present invention, and FIG. 5 is a schematic side sectional view of the conventional structure. In the figure, 1 is a first Si substrate, 2 is a liquid circulation groove, 3 is an SiO2 film, 4 is a second (p-type) Si substrate, 5 is a field oxide film, 6 is a p1 type channel stopper, and 7 is a p1 type channel stopper. n-type diffusion region, 8A, 8B are n-type diffusion regions, 9 is a resist layer, 1O is an opening pattern, 11.12 is a liquid flow hole, PD+, PD2, PD are photodiodes, 'II
, Gl□, G13 are the first layer transfer electrodes, Gz+ s
Gtz, Gz3 are second layer transfer electrodes, VCCD+,
VCCDg indicates a vertical charge coupled device. (d) Plan view (b A-A arrow tread mouth Invention related to the invention, 1. Floor plan activation (-+/) 2) Meme

Claims (1)

【特許請求の範囲】[Claims] 上面に溝を有し、且つ該溝の内面を含む表面に酸化シリ
コン膜を有する第1の半導体基板と、該第1の半導体基
板の該溝を有する面上に該酸化シリコン膜を介して接着
され、且つ半導体素子が形成された第2の半導体基板と
を有し、該溝内に冷媒を流通せしめてなることを特徴と
する半導体装置。
a first semiconductor substrate having a groove on the upper surface and a silicon oxide film on the surface including the inner surface of the groove; and bonding onto the surface of the first semiconductor substrate having the groove via the silicon oxide film. and a second semiconductor substrate on which a semiconductor element is formed, and a refrigerant is allowed to flow in the groove.
JP16361688A 1988-06-30 1988-06-30 Semiconductor device Pending JPH0212954A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16361688A JPH0212954A (en) 1988-06-30 1988-06-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16361688A JPH0212954A (en) 1988-06-30 1988-06-30 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0212954A true JPH0212954A (en) 1990-01-17

Family

ID=15777313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16361688A Pending JPH0212954A (en) 1988-06-30 1988-06-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0212954A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5660888A (en) * 1995-04-28 1997-08-26 Minnesota Mining & Manufacturing Company Surfactants to create fluoropolymer dispersions in fluorinated liquids
US7776407B2 (en) * 2007-06-14 2010-08-17 Samsung Electro-Mechanics Co., Ltd. Method for surface treatment of substrate and method for forming fine wiring
JP2012015415A (en) * 2010-07-02 2012-01-19 Fujitsu Ltd Electronic device and method for manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5660888A (en) * 1995-04-28 1997-08-26 Minnesota Mining & Manufacturing Company Surfactants to create fluoropolymer dispersions in fluorinated liquids
US5844034A (en) * 1995-04-28 1998-12-01 Minnesota Mining And Manufacturing Company Surfactants to create dispersions in fluorinated liquids
US7776407B2 (en) * 2007-06-14 2010-08-17 Samsung Electro-Mechanics Co., Ltd. Method for surface treatment of substrate and method for forming fine wiring
JP2012015415A (en) * 2010-07-02 2012-01-19 Fujitsu Ltd Electronic device and method for manufacturing the same

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