JPH0212735Y2 - - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a balanced modulator and demodulator using transistors.

Currently, balanced modulators are often used to generate or demodulate amplitude modulated waves in a frequency range from low frequencies to high frequencies.

Various types of balanced modulators have been put into practical use, but up to the VHF band they are often constructed using transistors.

In particular, balanced modulators using bipolar transistors are suitable for IC implementation.

There is amplification gain.

It is good that the input signal level is low.

There are advantages such as

For this reason, they are widely used in monolithic ICs such as PLL phase detectors, color difference signal demodulators for color television, and SSB signal modulators/demodulators.

FIG. 1 shows a conventionally used balanced modulator using bipolar transistors.

In the conventionally used balanced modulator, the transistors used are all of the same polarity as shown in Figure 1, and in terms of DC, there are a differential amplifier of Q ₁₁ and Q ₁₂ , and a differential amplifier of Q ₁₃ to _{Q 16} . It has a configuration in which differential amplifier pairs are stacked.

Therefore, if the bias potential of input terminals 12 and 12' is not set sufficiently high compared to the potential of input terminals 11 and 11' to ensure V _CE of Q _{11 and} Q 12, Q ₁₁ and Q ₁₂ cannot be expected to perform well.

This naturally means that the output terminals 13, 13'
This will reduce the allowable voltage amplitude.

This limitation on output amplitude has become a major design constraint for current ICs that are required to operate at low voltages.

Another design constraint is that the potential of the input terminals 12, 12' must always be high (low when PNP transistors are used) with respect to the bias potential of the input terminals 11, 11'.

This invention was proposed in view of the above,
The purpose of this invention is to provide a balanced modulator that operates well in electronic circuits such as ICs that require low voltage operation.

The present invention will be explained below using the drawings.

In FIG. 2, a modulation signal is applied to input terminals 21 and 21' between the bases of Q _{21 and} Q ₂₂ , and
Input terminal 2 between the bases of Q ₂₆ and Q ₂₄ and Q ₂₅
If modulated signals are applied to 2 and 22', the device operates as a balanced modulator.

FIG. 3 shows the correlation between the input voltages at the input terminals 21, 21' and the input terminals 22, 22' and the output current _I23 .

Let the current sources connected to the emitters and collectors of Q ₂₁ and Q ₂₂ all have the same current value I. In addition, V ₂₁ −V _{21 ′ between input terminals 21 and 21} ′,
A voltage of _V22 - _V22 ' is applied between the input terminals 22 and 22'.

Since the base potentials of Q ₂₁ and Q ₂₂ are equal, Q ₂₃ ,
A current of 1/2I is distributed to each of Q ₂₄ , Q ₂₅ , and Q ₂₆ .

At this time, if V ₂₂ −V ₂₂ ′≫0, Q ₂₄ , Q ₂₅
is conductive, I ₂₃ = 1/2I, and if V ₂₂ −V ₂₂ ′≪0, Q ₂₃ and Q ₂₆ are conductive, and I ₂₃ = 1/2I,
After all, I ₂₃ =1/2I over the entire period.

Since V ₂₁ −V ₂₁ ′≫0, Q ₂₃ , Q ₂₄ and Q ₂₅ ,
Q ₂₆ is allocated a current of 0 and I, respectively.

At this time, if V ₂₂ −V ₂₂ ′≫0, Q ₂₄ , Q ₂₅
is conductive and I ₂₃ =I, and if V ₂₂ −V ₂₂ <<0, Q ₂₃ and Q ₂₆ are conductive and I ₂₃ =0.

Since V ₂₁ −V ₂₁ ′≪0, Q ₂₃ , Q ₂₄ and Q ₂₅ ,
Q ₂₆ is allocated I and 0 currents, respectively.

At this time, if V ₂₂ −V ₂₂ ′≫0, Q ₂₄ , Q ₂₅
is conductive, and I ₂₃ =0, and if V ₂₂ −V ₂₂ ′≪0, Q ₂₃ and Q ₂₆ are conductive, and I ₂₃ =I.

), ), ), it can be seen that the circuit of FIG. 2 performs a kind of multiplication operation, and operates as a balanced modulator.

Furthermore, it is clear that it can also operate as a demodulator by applying amplitude modulated waves to the input terminals 21, 21' and applying carrier waves to the input terminals 22, 22'.

Furthermore, the base potentials of Q ₂₁ and Q ₂₂ can be freely set within the range in which the constant current sources on the emitter and collector sides operate, so they can be set freely within the range of approximately the power supply voltage.

Also, regarding the amplitude of the output terminals 23 and 23',
If the potentials of the input terminals 22, 22' are appropriately selected, a range of (power supply voltage) - (operating voltage of constant current source) - (saturation voltage of Q ₂₃ to _{Q 26} ) is allowed.

As described above, according to the circuit of the present invention, it is possible to provide a balanced modulator that operates at a low voltage with a high degree of freedom in setting the bias point of the input terminal and a large allowable amplitude of the output voltage. This has the effect of increasing the degree of freedom in design and making it possible to realize a device that can operate on a low voltage power supply, which was previously impossible.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conventional balanced modulator. FIG. 2 is a circuit diagram of the balanced modulator of the present invention. FIG. 3 is a correlation diagram of input and output in the circuit of the present invention. FIG. 4 is a more specific circuit diagram of FIG. 2. 11, 11'12, 12', 21, 21', 22,
22'...Input terminal, 13, 13', 23, 23'
...Output terminal, _Q11 to _Q16 , _Q21 to _Q26 ...Transistor.

Claims (1)

[Scope of utility model registration request] A control electrode is connected to the first input terminal, each first electrode is connected to a first and second constant current source having the same characteristics, and a second electrode is commonly connected to a third constant current source. first and second transistors each having a second electrode connected to the first constant current source;
The third and fourth transistors have complementary polarity to the second transistor.
a transistor, fifth and sixth transistors each having a second electrode connected to the second constant current source and having the same polarity as the third and fourth transistors; control electrodes of the third and sixth transistors; 4. a second transistor connected to the control electrode of the fifth transistor, respectively;
A balanced modulator comprising an input terminal and an output terminal connected to first electrodes of the third and fifth transistors and first electrodes of the fourth and sixth transistors.