JPH0212509A - Constant voltage circuit - Google Patents

Abstract

PURPOSE:To generate a constant voltage with a temperature coefficient zero by forming a band gap type constant voltage circuit in the inside of a MOS type IC. CONSTITUTION:P-channel MOS transistors (1-3) whose sources are connected to a power source 12 constitute a current mirror setting the transistor 2 as a supply side. And the current density of first and second diodes 6 and 7 are set differently from each other and the difference DELTAV of the voltage in a forward direction is generated between both ends of a first resistor 9, and the voltage is amplified by a second resistor 10 and the first resistor 9 by using the MOS transistors (1-3), thereby, the constant voltage circuit can be generated setting the sum of the voltage in the forward direction of the second resistor 10 and a third diode 8 as output. In such a way, it is possible to obtain the constant voltage circuit not depending on a temperature only by the MOS transistor and the diode.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a constant voltage circuit in an 0MO8 board IC, and more particularly to a bandgap constant voltage source.

2. Description of the Related Art Conventionally, a bandgap type constant voltage circuit as shown in FIG. 3 has been known in Paipor's IC. Power is supplied from the power supply 29 to the output terminal 28 and other circuits via the resistor 27. The values of resistors 21 and 22 are equal, and the emitter area ratio of transistors 23 and 24 is 1:10.
Suppose that At this time, the voltage across the resistors 21 and 22 is the value obtained by subtracting the pace emitter voltage VBx of the transistor 23 or I/i 25 from the voltage V'o of the output 1 child 28, and is approximately equal, so the current flowing as well. almost equal. The voltage across the resistor 26 corresponds to the difference in Vsm between the transistors 23 and 24, and its value ΔV'
is given by the following formula (1).

Here, F3, 8*a are transistors 23, 2
The emitter area is 4. In this example, %S mouths/s
s*=io.

The degree coefficient is given by partially differentiating equation (1) with respect to T. Now, if the ratio of resistors 22 and 26 is 10 = 1, the voltage across both shoulders of resistor 220 is 10ΔV = 600 mV, and its temperature coefficient is 10 times the above formula (2), or 2 mV/deg.
It is.

On the other hand, the base-emitter voltage of the transistor 25 is V! II
g is approximately 700 mV, and its temperature coefficient is -2 mV/
It is deg. Therefore, according to Kirchough's 7th law, the output voltage VOI given by the sum of the VBI of the transistor 25 and the voltage across the resistor 22 is approximately L300 mV, and its temperature coefficient is O. That is, it can be seen that Vo' is a constant voltage circuit with no temperature change. Since Vo' is approximately equal to the bandgap energy of silicon, the circuit is called a bandgap constant voltage circuit.

Problems to be Solved by the Invention However, although the conventional techniques described above can be realized in a bipolar type IC, such a constant voltage circuit cannot be realized in a %'MoS type IC.

The present invention has been made in view of the above-mentioned conventional circumstances, and
Accordingly, an object of the present invention is to provide a novel constant voltage circuit that can solve the above-mentioned problems inherent in the conventional technology.

Differences between the invention and the prior art The present invention provides a constant voltage circuit with no temperature coefficient based on the same principle as the bandgap type constant voltage source described above, in a new additional process chart in a %IS type IC. It differs from conventional ones in that it can be constructed from MOS transistors and diodes.

Means for Solving the Problems In order to achieve the above object, the constant voltage circuit according to the present invention has the following features:
first to third first type MOs whose sources are connected to the power supply terminal;
an S transistor, first and second first type N-phantom S transistors whose drains are connected to the drains of the first and second first type 'MDS transistors, respectively; 1N third diode, and the second
．． a first and a second resistor respectively connected to the other end of the third diode, and the other ends of the first and second resistors are connected to the source of the second second type MOS transistor and the second type MOS transistor, respectively. connected to the drain of the third first type N-type S transistor;
The twin is an output terminal, the other end of the first diode is connected to the source of the first and second WM)S transistors, and the drain of the second first type MOS transistor and the first to third MOS transistors are connected to each other. The gates of the type 1 MOS transistors are connected to each other, and the drains of the first and second MOS transistors and the first to second 27th JI MOS transistors are connected to each other.
) consisting of transistor gates connected to each other,
Furthermore, the first to third diodes of the constant voltage circuit according to the present invention are as follows.

It is characterized by being a base-collector short type diode of a bichiral transistor whose base is a well, and whose emitter and collector are two opposing electrodes made of the same material as the drain configured in the well. shall be.

In the present invention, the current densities of the first and second diodes are made different, a difference in forward voltage ΔV is generated across the first resistor, and the voltage is applied to the MOS with the second resistor and the first resistor.
) This is a constant voltage circuit that amplifies the voltage using a transistor and outputs the sum of the forward voltage of the second resistor and the third diode. Note that a diode that can be manufactured using a CMOS process has one end connected to a power supply or reference voltage, and cannot be easily inferred from FIG. 3.

EXAMPLES OF EXAMPLES Next, preferred examples of the present invention will be specifically explained with reference to the drawings.

FIG. 1 is a circuit configuration diagram showing an example of the present invention.

Referring to FIG. 1, P
The channel MOS transistors 1, 2.3 constitute a current mirror with the transistor 2 on the supply side, and if the gate sizes are the same, then the same drain current flows respectively. Therefore.

Transistor 4, transistor 5 and resistor 9, resistor l respectively
The current flowing through the diode 6.7.8 through O is also equal. Here, if the size ratio of the diodes 6 and 7 is 1:10, the difference in forward voltage ΔV is given by the following equation (3) similarly to the above equation (1).

ΔV= Upper 1 inch A'--0------1-11,-
1, -0-0, -=, = -90, (3) q 8m Here, Eh and f3t are the sizes of the diode 6.7.

St/5s-10 Tero Lucara, T=300°K K
TeΔV=60mV. Its temperature coefficient is 0.2 mV/deg, similar to equation (2). If the gate sizes of N-channel ■S transistors 4 and 5 are equal, their drain currents are equal as described above, and therefore the gate-source voltages are also equal. Therefore, from Kirchhoff's law, it can be seen that the voltage across the resistor 9 is equal to ΔV.

If the ratio of resistors 9 and 10 is 1:10, the voltage across resistor 10 is 10 times the voltage across resistor 9, or 10ΔV, since equal currents are flowing through them as described above.
and its temperature coefficient is 2 mV/deg. By adding this voltage to the vertical voltage of the diode 8 of about 700 mV (temperature coefficient -2 mV/deg), the voltage Vo of the output 1 element 11 becomes 1300 mV and the temperature coefficient becomes O.

In other words, a constant voltage circuit independent of temperature was realized using only MO8 transistors and diodes.

Note that the size ratio or resistance ratio of the diodes can be arbitrarily selected without being limited to the above example.

Furthermore, the ratio of the transistors does not necessarily have to be 1:1:1 and can be %m:1:n.

Furthermore, the temperature coefficient can be intentionally set to any value other than O.

FIG. 82 relates to the configuration of a diode used in the present invention, and shows a cross-sectional view of a CMO8fi IC.

31 is an N type substrate, and 32 and 33 are P wells. N and P in the figure represent an N-type semiconductor and a P-type semiconductor, respectively, and the hatched portion represents an extraction electrode. The P-channel MOS transistor has a gate 30. It consists of a drain 34 and a source 35, and an electrode 36 is provided for connecting the substrate to a power source 44. The N-channel MOS transistor is in the P-well &
It consists of a drain 37 and a source 38, an electrode 39 for connecting the well and the source, and a gate 40. By making the potentials of the source electrode and the back gate (i.e., well) of the N-channel MOS transistor equal in this way, differences in drain current due to the puncture gate effect of transistors 4 and 5 in FIG. 1 can be avoided. ,
Accuracy can be improved. Well 33 as base, N type electrode 41
latera yv with the emitter and the N-type electrode 42 as the collector
It is well known that if a 90-B short transistor is formed by shorting the lead-out electrode 43 and collector 42 of an NPN transistor, this transistor becomes a diode isometrically. Therefore, with this configuration, C
A diode can be easily formed in MO8IC.

As described in detail, according to the present invention, it is possible to easily form a band gap type constant voltage circuit inside an MO8 type IC, and due to the distortion, the temperature coefficient O is approximately 1.3. A constant voltage can be generated, and the temperature coefficient can be set arbitrarily.

The ability to realize a high-precision constant voltage circuit, which has not been possible to create inside an MO8 type IC, is very useful in industrial applications.

[Brief explanation of the drawing]

Fig. 1 is a circuit configuration diagram showing an example of the present invention, Fig. 2 is a cross-sectional view of an MO8-Y IC showing the structure of a diode, and Fig. 3 is a circuit of a constant voltage circuit suitable for a conventional bipolar IC. It is a diagram. 1 to 3...P channel M)S) transistor, 4,5
...N-channel MOS transistor, 6-8...diode, 9.10...resistor, 11...output terminal,
12...Power supply. 21% 22... Resistor, 23-25... NPN bipolar transistor, 26, 27... Resistor, 28.
... Output terminal, 29... Power supply, 30... Gate of P channel MOS transistor, 31... N type substrate, 3
2 to 33... P well, audience... drain of P channel MO8 transistor %35... source of P channel MDS transistor, 36... substrate (pack gate) electrode of P channel MOS transistor, 37...・Drain of N channel ■S transistor, 38... Source of N channel ■S transistor, 39... Well (back gate) electrode of N channel MOS transistor,
40...N-channel MOS transistor gate, 4
1... Lateral type NPN) transistor emitter, 4
2...Lateral mNPN) Collector of transistor, 43...Lateral type NPN) Base of transistor Patent applicant: NEC Corporation Representative, Patent attorney Yutabe Kumagai

Claims (1)

[Claims] first to third first type MOs whose sources are connected to the power supply terminal;
an S transistor, first and second second type MOS transistors whose drains are respectively connected to the drains of the first and second first type MOS transistors, and first to second type MOS transistors whose one ends are connected to a reference potential. 3, the second diode,
a first and a second resistor respectively connected to the other end of the third diode, and the other ends of the first and second resistors are connected to the source of the second second type MOS transistor and the second type MOS transistor, respectively. A third MOS transistor is connected to the drain of the first type MOS transistor, with the drain of the third first type MOS transistor serving as an output terminal, and the other end of the first diode and the source of the first second type MOS transistor. are connected to each other, the drain of the second first type MOS transistor and the gates of the first to third first type MOS transistors are connected to each other, and the drain of the first second type MOS transistor and the first type MOS transistor are connected to each other. ~A constant voltage circuit characterized in that gates of second type 2 MOS transistors are connected to each other.