JPH02123987A - Speed controller for motor - Google Patents

Speed controller for motor

Info

Publication number
JPH02123987A
JPH02123987A JP63273522A JP27352288A JPH02123987A JP H02123987 A JPH02123987 A JP H02123987A JP 63273522 A JP63273522 A JP 63273522A JP 27352288 A JP27352288 A JP 27352288A JP H02123987 A JPH02123987 A JP H02123987A
Authority
JP
Japan
Prior art keywords
voltage
circuit
motor
power source
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63273522A
Other languages
Japanese (ja)
Inventor
Kaneharu Yoshioka
吉岡 包晴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63273522A priority Critical patent/JPH02123987A/en
Publication of JPH02123987A publication Critical patent/JPH02123987A/en
Pending legal-status Critical Current

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  • Control Of Electric Motors In General (AREA)

Abstract

PURPOSE:To enable an economical DC stabilizing power source to be used by detecting line voltage, and by applying it to the adding point of an adder circuit with a constant gain. CONSTITUTION:By a voltage detecting circuit 10, the voltage of a mo tor power source 9 is converted to a signal level and is applied to the adding point of an adder circuit 5 with a constant gain. Even if the voltage of the motor power source 9 is fluctuated due to this composition, a voltage level corresponding with the change component of the characteristic of a motor 7 itself due to a voltage difference is corrected by the change component of the voltage of the power source 9, and so the voltage fluctuation of the motor power source 9 is hardly influenced by a phase output waveform, and as its result, a phase- locked loop lock range can be sufficiently widened, and so by the motor power source 9, the voltage fluctuation is not required to be severely limited. As a result, an economical DC stabilizing power source can be used.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、複写機駆動等に供される電動機の速度制御装
置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a speed control device for a motor used to drive a copying machine or the like.

従来の技術 近年、小型直流モータは、複写機等OA機器に多数使用
され、その多(はフェーズ・ロックドループ(PLL)
制御の如き高精度速度制御をかけている。これらの電源
としては、直流安定化電源が使用されているが、その性
能はPLLルリ御性脂性能響をおよぼしている。
2. Description of the Related Art In recent years, many small DC motors have been used in office automation equipment such as copying machines, and most of them are phase-locked loop (PLL) motors.
High-precision speed control is applied. A DC stabilized power source is used as a power source for these devices, but its performance is comparable to that of a PLL.

以下、従来の電動機の速度$1■御装置について説明す
る。
Hereinafter, a conventional electric motor speed control device will be described.

第5図は従来の電動機の速度制御装置を示すものである
。第5図に於いて1は電動機7に付加された周波数発電
n8の出力波形を整形する波形整形回路であり、2は波
形整形回路1の出力周波数を電圧に変換する周波数−電
圧変換回路(以下F/Vと称す)で、4は基準クロック
発生回路3のクロック信号と波形整形回路1の出力の位
相を比較しその位相差を出力する位相比較回路である。
FIG. 5 shows a conventional speed control device for an electric motor. In FIG. 5, 1 is a waveform shaping circuit that shapes the output waveform of frequency power generation n8 added to the motor 7, and 2 is a frequency-voltage conversion circuit (hereinafter referred to as 4 is a phase comparison circuit that compares the phases of the clock signal of the reference clock generation circuit 3 and the output of the waveform shaping circuit 1 and outputs the phase difference.

5はF/V回路2と位相比較回路4の出力を一定のゲイ
ン比で加算する加算回路であり、6は加算回路5の出力
を増幅し、電動機電源9を制御して電動機7の速度を制
御する電力増幅回路である。
5 is an adder circuit that adds the outputs of the F/V circuit 2 and the phase comparator circuit 4 at a constant gain ratio, and 6 is an adder circuit that amplifies the output of the adder circuit 5 and controls the motor power supply 9 to adjust the speed of the motor 7. This is a power amplifier circuit to control.

電力増幅回路6の中で6−aは電力制御用のトランジス
タで、6−bはフライホイールダイオードであり、これ
らのみ電動機電源に直接接続されている。
In the power amplifier circuit 6, 6-a is a transistor for power control, and 6-b is a flywheel diode, and only these are directly connected to the motor power supply.

以上のように構成された電動機の速度制御について、以
下その動作について説明する。
The operation of the speed control of the electric motor configured as described above will be explained below.

PLL制御回路を構成している本回路に於いてF/V回
路2は系にダンピングを与えており、PLL制御時は一
定出力となり、負荷の変動等には位相比較回路4の出力
が対応して加算回路5の出力レベルを変化させて電力制
御用トランジスタ6aを制御して、電動機7への印加電
圧を制御し、結果として電動機7の速度は基準クロック
に同期した定速制御を行っている。
In this circuit that constitutes the PLL control circuit, the F/V circuit 2 provides damping to the system, and the output is constant during PLL control, and the output of the phase comparator circuit 4 responds to changes in load, etc. The output level of the adder circuit 5 is changed to control the power control transistor 6a to control the voltage applied to the motor 7, and as a result, the speed of the motor 7 is controlled at a constant speed in synchronization with the reference clock. .

発明が解決しようとする課題 しかしながら上記の従来の構成では、電動機電源9の電
圧が大きな変動をもっている時、電動機独自の特性が変
化する為、負荷に無関係に位相比較出力が変化してPL
Lロック範囲を狭くしてしまう間組があり、電動機電源
9の電圧変動を抑制する必要があった。
Problems to be Solved by the Invention However, in the conventional configuration described above, when the voltage of the motor power supply 9 has large fluctuations, the unique characteristics of the motor change, so the phase comparison output changes regardless of the load and the PL
There was a gap that narrowed the L lock range, and it was necessary to suppress voltage fluctuations of the motor power supply 9.

本発明は上記の従来の問題点を解決するもので、電圧変
動が比較的太き(安価な直流安定化電源をも電動機電源
として使いながら、変動の小さいものと同程度のPLL
ロック範囲を確保し得る電動機の速度制御装置を提供す
ることを目的とする。
The present invention solves the above-mentioned problems of the conventional technology, and uses a relatively wide voltage fluctuation (while using an inexpensive DC stabilized power supply as a motor power supply,
An object of the present invention is to provide a speed control device for an electric motor that can secure a lock range.

課題を解決する為の手段 この目的を達成する為に本発明の電動機の速度制御装置
は、電動機電源の電圧を検出し、一定のゲインで加算回
路の加算点に印加するよう電圧検出回路を有している。
Means for Solving the Problems To achieve this object, the motor speed control device of the present invention has a voltage detection circuit that detects the voltage of the motor power supply and applies it to the addition point of the addition circuit with a constant gain. are doing.

作用 この構成によって、電動機電源の電圧に変動があっても
、電圧の差による電動機独自の特性の変化分相当の電圧
レベルを電源電圧の変化分で補正する為、位相出力波形
には電動機電源の電圧変動は影響を殆ど与えずにすみ、
その結果PLLロック範囲は十分法(とれることから電
動機電源は電圧変動を厳しく制限せずともよ(安価な直
流安定化電源を使用することができる。
Effect With this configuration, even if there is a fluctuation in the voltage of the motor power supply, the voltage level corresponding to the change in the characteristics unique to the motor due to the voltage difference is corrected by the change in the power supply voltage, so the phase output waveform is Voltage fluctuations have almost no effect,
As a result, the PLL lock range is sufficient, so the motor power supply does not have to strictly limit voltage fluctuations (an inexpensive DC stabilized power supply can be used).

実施例 以下本発明の一実施例について、図面を参照しながら説
明する。
EXAMPLE An example of the present invention will be described below with reference to the drawings.

第1図は本発明の実施例における電動機の速度制御装置
を示すものである。第1図中1〜6は従来例の第5図と
同じである為、説明を省略する。
FIG. 1 shows a speed control device for an electric motor in an embodiment of the present invention. Since 1 to 6 in FIG. 1 are the same as those in FIG. 5 of the conventional example, explanations thereof will be omitted.

10は電圧検出回路で、電動機電源の電圧を信号レベル
に変換して、一定ゲインで加算回路5の加算点に印加す
る。第2図は電圧検出回路10と加算回路5の詳細図で
ある。第2図で5−aは基準電圧を示している。第3図
は電動機の速度−トルク(n−T)特性を示しており、
一定り荷トルクTOでの電圧V+、vo、v−c:おけ
ル回転ハn + 。
A voltage detection circuit 10 converts the voltage of the motor power source into a signal level and applies it to the addition point of the addition circuit 5 with a constant gain. FIG. 2 is a detailed diagram of the voltage detection circuit 10 and the addition circuit 5. In FIG. 2, 5-a indicates a reference voltage. Figure 3 shows the speed-torque (n-T) characteristics of the electric motor.
Voltages V+, vo, v-c at constant load torque TO: rotation wheel n + .

no、n−を表している。nIはPLL制御の回転数で
ある。第4図は位相比較出力を示しており、(a) 、
 (b) 、 (c) Lt各々電動機電源9の電圧V
O,V+V−での波形を表している。
It represents no, n-. nI is the rotation speed of PLL control. Figure 4 shows the phase comparison output, (a),
(b), (c) Lt each voltage V of motor power supply 9
It represents the waveform at O, V+V-.

以下動作について説明をする。The operation will be explained below.

第3図のように同一負荷トルクTOに対し、電動機電源
9の電圧が定格vOに対し、■十〜V−に変動があった
とすると制御をかけない電動機7の独自の特性はnoに
対しn÷〜n−に変化する。従って、負荷TOに対し一
定速度に保つためには電動機印加電圧は変化しないから
電力用トランジスタ6−aがその電圧差をもたねばなら
ない。このことは電力増幅回路6のゲインは、電動機電
源9の電圧が上がれば上り、下れば下ることを意味して
いる。従って、加算回路5の出力レベルが変化する。今
、加算回路5の出力は負荷が大きい程、その出力電圧レ
ベルが上がるものとする。電動機電源電圧9がΔV (
=V+−VO)だけ上ったとすると加算回路の出力電圧
レベルはΔV/Gだけ下ることになる。ただし、Gは電
力増幅回路のゲインを示す。
As shown in Fig. 3, for the same load torque TO, if the voltage of the motor power supply 9 varies from 10 to V- with respect to the rated vO, then the unique characteristics of the motor 7 which is not controlled are n to no. It changes from ÷ to n-. Therefore, in order to maintain a constant speed with respect to the load TO, the voltage applied to the motor does not change, so the power transistor 6-a must have the voltage difference. This means that the gain of the power amplifier circuit 6 increases as the voltage of the motor power source 9 increases, and decreases as the voltage decreases. Therefore, the output level of the adder circuit 5 changes. It is now assumed that the output voltage level of the output of the adder circuit 5 increases as the load increases. Motor power supply voltage 9 is ΔV (
=V+-VO), the output voltage level of the adder circuit will fall by ΔV/G. However, G indicates the gain of the power amplifier circuit.

電圧検出回路10がない場合、F/V回路2の出力は一
定速時では一定であるから、位相比較回路出力が変化し
て、加算回路の出力電圧レベルの変化に対応する。
If the voltage detection circuit 10 is not provided, the output of the F/V circuit 2 is constant at constant speed, so the output of the phase comparison circuit changes to correspond to the change in the output voltage level of the adder circuit.

この時の位相比較回路4の出力変化分ΔupはΔUp=
R5/R7X ΔV/G で与えられ、第4図(b)のように位相出力幅は増加す
る。
At this time, the output change amount Δup of the phase comparison circuit 4 is ΔUp=
It is given by R5/R7X ΔV/G, and the phase output width increases as shown in FIG. 4(b).

電動機電源9がV−のように減少すれば、位相出力は第
4図(C)のように逆に減少する。
If the motor power supply 9 decreases as V-, the phase output will conversely decrease as shown in FIG. 4(C).

電圧検出回路10がある場合には電動機電源9の電圧が
ΔVだけ増加すると、電圧検出回路10の出力は R2/ (R1+R2>XR4/R3XΔVたけ下がる
。この電圧が位相比較回路4の出力増加分子Δupと打
ち消し合えばよい。即ち、R2/(RI+R2)XR4
/R3XR7/R6=1/Gで与えられる定数を選べば
位相比較出力の出力幅は、電動機電源の変動に無関係と
することができる。
When the voltage detection circuit 10 is provided, when the voltage of the motor power supply 9 increases by ΔV, the output of the voltage detection circuit 10 decreases by R2/(R1+R2>XR4/R3XΔV. This voltage becomes the output increase numerator Δup of the phase comparator circuit 4. That is, R2/(RI+R2)XR4
By selecting a constant given by /R3XR7/R6=1/G, the output width of the phase comparison output can be made independent of fluctuations in the motor power supply.

以上のように本実施例によれば、電圧検出回路を設ける
ことにより、電動機電源の変動に無関係にPLLロック
範囲をとることができる。
As described above, according to this embodiment, by providing the voltage detection circuit, the PLL lock range can be maintained regardless of fluctuations in the motor power supply.

発明の効果 以上のように本発明は、電動機電源の電圧検出回路を設
けることにより、 ■ 電動機電源の変動によるP L Lロック範囲の縮
小を極めて抑制できる為、安価な直流安定化電源を容易
に使用できる。
Effects of the Invention As described above, the present invention, by providing a voltage detection circuit for the motor power supply, can extremely suppress the reduction in the PLL lock range due to fluctuations in the motor power supply, making it easy to use an inexpensive DC stabilized power supply. Can be used.

■ 電動機電源の変動を殆ど無視できる為、製造工程で
の調整・検査が容易になる。
■ Since fluctuations in the motor power supply can be almost ignored, adjustments and inspections in the manufacturing process become easier.

などの優れた電動機の速度制御装置を実現できるもので
ある。
This makes it possible to realize an excellent motor speed control device such as the following.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例における電動機の速度制御装置
のブロック図、第2図は第1図の電圧検出回路と加算回
路の回路図、第3図は電動機特性図、第4図は位相比較
回路の出力波形図、第5図は従来の電動機の速度制御装
置のブロック図である。 1・・・・・・波形整形回路、2・・・・・・周波数−
電圧変換回路、3・・・・・・基準クロック発生回路、
4・・・・・・位相比較回路、5・・・・・・加算回路
、6・・・・・・電力増幅回路、7・・・・・・電動機
、8・・・・・・周波数発電機、9・・・・・・電動機
電源、10・・・・・・電圧検出回路。 第 図 第 区
Fig. 1 is a block diagram of a motor speed control device in an embodiment of the present invention, Fig. 2 is a circuit diagram of the voltage detection circuit and addition circuit of Fig. 1, Fig. 3 is a motor characteristic diagram, and Fig. 4 is a phase diagram. The output waveform diagram of the comparator circuit is shown in FIG. 5, which is a block diagram of a conventional motor speed control device. 1... Waveform shaping circuit, 2... Frequency -
Voltage conversion circuit, 3...Reference clock generation circuit,
4...Phase comparison circuit, 5...Addition circuit, 6...Power amplifier circuit, 7...Motor, 8...Frequency power generation machine, 9...motor power supply, 10...voltage detection circuit. Diagram No. 1

Claims (1)

【特許請求の範囲】[Claims] 電動機に付加された周波数発電機の出力波形を整形する
波形整形回路と、当該波形整形回路の出力を電圧に変換
する周波数−電圧変換回路と、前記波形整形回路の出力
と基準クロックを比較する位相比較回路と、前記周波数
−電圧変換回路と位相比較回路の出力を加算する加算回
路と、当該加算回路の出力を増幅し電動機電源を制御し
て速度に応じた電力を供給する電力増幅回路と、前記電
動機電源の電圧を検出する電圧検出回路を備え、当該電
圧検出回路の出力を前記加算回路に加算する電動機の速
度制御装置。
A waveform shaping circuit that shapes the output waveform of a frequency generator attached to the motor, a frequency-voltage conversion circuit that converts the output of the waveform shaping circuit into voltage, and a phase that compares the output of the waveform shaping circuit with a reference clock. a comparison circuit, an addition circuit that adds the outputs of the frequency-voltage conversion circuit and the phase comparison circuit, and a power amplifier circuit that amplifies the output of the addition circuit, controls the motor power supply, and supplies power according to the speed; A speed control device for a motor, comprising a voltage detection circuit that detects the voltage of the motor power source, and adding an output of the voltage detection circuit to the addition circuit.
JP63273522A 1988-10-28 1988-10-28 Speed controller for motor Pending JPH02123987A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63273522A JPH02123987A (en) 1988-10-28 1988-10-28 Speed controller for motor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63273522A JPH02123987A (en) 1988-10-28 1988-10-28 Speed controller for motor

Publications (1)

Publication Number Publication Date
JPH02123987A true JPH02123987A (en) 1990-05-11

Family

ID=17529028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63273522A Pending JPH02123987A (en) 1988-10-28 1988-10-28 Speed controller for motor

Country Status (1)

Country Link
JP (1) JPH02123987A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005080378A (en) * 2003-08-29 2005-03-24 Konica Minolta Business Technologies Inc Driving unit, image forming apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59194686A (en) * 1983-04-20 1984-11-05 Toshiba Corp Drive device for motor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59194686A (en) * 1983-04-20 1984-11-05 Toshiba Corp Drive device for motor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005080378A (en) * 2003-08-29 2005-03-24 Konica Minolta Business Technologies Inc Driving unit, image forming apparatus

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