JPH02122696A - Manufacture of multilayer printed circuit board - Google Patents

Abstract

PURPOSE:To improve the wiring containability by forming a conductor layer on the innerwall of a through-hole including a catalytic insulation layer formed with catalytic insulation substrate and a catalytic prepreg and catalyst adsorbing section through electroless plating thereby eliminating design restriction factor such as setting of characteristic impedance. CONSTITUTION:When a mask 8 is removed through organic solvent and electroless copper plating is applied, a conductor circuit pattern 1a of exposed multilayer substrate 6 and a conductor layer 10 on the inner wall of through- holes 7a, 7b are formed. In the through-hole 7a, the conductor layer 10 is formed only on a catalytic insulation layer 5 and not formed on the catalystless insulation substrate 3, and thereby the conductor layer 10 separates on the inner wall of the through-hole 7a and the conductor circuit patterns 1a, 1b are connected each other. In the through-hole 7b, the conductor layer 10 is formed entirely on the inner wall with the previously adsorbed catalyst 9. By such arrangement, a multilayer printed circuit board 13 containing splitted via-holed 11 and conventional through-hole 12 can be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a multilayer printed wiring board, and particularly to a multilayer printed wiring board in which a part of the conductor layer has through holes formed by dividing it for high-density packaging. This invention relates to a method for manufacturing a board.

[Conventional technology]

LS1. Multilayer printed wiring boards (hereinafter referred to as multilayer boards) are used to increase the integration of ICs, etc., and to improve the performance and economic efficiency of electronic devices.
densification is progressing.

Two main measures are being taken to address the increasing density of multilayer boards. The first response is to increase the number of conductor layers, that is, to increase the number of layers, and the second response is to increase the number of interconnects between basic lattices. However, in the first solution, the number of via holes connecting the conductor layers between the eyebrows increases, which significantly limits the number of wiring lines in the second solution, and hence the wiring capacity. Therefore, especially
When this via hole is provided as a through hole in a multilayer board,
This has been solved by reducing the diameter of the via hole, but the plate thickness/
The pore diameter ratio (aspect ratio) increases, which significantly impedes the productivity of multilayer boards.

Therefore, as a means to eliminate the above-mentioned drawbacks, as shown in FIG. 2(A), two sets of catalyst-containing insulating substrates 2 on which conductor circuit patterns 1 are formed are placed in the outermost layer, and a multilayer board is placed inside them. Hole 1 hollowed out in a concentric circle larger than the diameter of the through hole
4, a catalyst-free insulating substrate 3 provided with a catalyst-containing prepreg 4 is inserted, and as shown in FIG. 2(B), a multilayer substrate 6 is formed by heating and pressurizing. As shown in FIG.
7b, and as shown in FIG. There is an example in which high density was achieved by selectively forming divided via holes 11 and normal through holes 12 through a process of forming by electroless plating (Japanese patent application No. 6).
1-029361>.

[Problem to be solved by the invention]

However, in the conventional manufacturing method described above, a concentric hole larger than the diameter of the through hole is provided in the catalyst-free insulating substrate inside the multilayer substrate at the drilling position of the through hole for normal through hole formation. However, since a clearance is required between the through hole and the hole portion, the basic lattice in the planar direction cannot be made small, which is a disadvantage in that it becomes an impediment to increasing the density in the planar direction.

In addition, since it is necessary to fill the previous hole with only the catalyst-containing resin impregnated into the catalyst-containing prepreg, if the thickness of the insulating substrate without a catalyst is too thick, voids will occur, resulting in thickness restrictions. There are drawbacks that limit the electrical properties, particularly the impedance properties, of the multilayer board.

Furthermore, it is necessary to adjust the amount of resin in the catalyst-containing prepreg layer depending on the number of holes, and the smoothness of the multilayer board and interlayer thickness control depend on the degree of chemical penetration in the planar direction of the holes. The disadvantage is that it is difficult.

An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board that has high density, has no restrictions on impedance characteristics, and allows control of smoothness and glabellar thickness.

[Means to solve the problem]

In the method for manufacturing a multilayer printed wiring board of the present invention, two sets of catalyst-containing insulating substrates on which conductor circuit patterns are provided on both the front and back sides are arranged as the outermost layer, and an insulating substrate without a catalyst and a catalyst-containing prepreg are placed inside the insulating substrates. a step of forming a multilayer substrate by heating and pressurizing the multilayer substrate; a step of drilling a through hole at a predetermined position of the multilayer substrate; and a step of masking a part of the through hole, and then forming a a step of adsorbing a catalyst on the inner wall of the through hole, a step of removing the mask, and a step of adsorbing the catalyst and the insulating layer containing the catalyst formed of the insulating substrate containing the catalyst and the prepreg containing the catalyst on the inner wall of the through hole. and forming a conductor layer by electroless plating, including the portion where the conductor layer is formed.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a longitudinal cross-sectional view showing the order of steps for explaining a manufacturing method according to an embodiment of the present invention.

Firstly, as shown in FIG.
Each set is placed on the outermost layer, and an insulating substrate 3 without a catalyst and a prepreg 4 containing a catalyst are interposed and set inside.

Next, as shown in FIG. 1B, heating and pressure are applied to obtain a multilayer substrate 6 including an insulating layer 5 containing a catalyst and an insulating substrate 3 without a catalyst.

Next, as shown in FIG. 1(C), through holes 7a and 7b are drilled at predetermined positions using an N/C drilling device.

Next, as shown in FIG. 1(D), a mask 8 is formed by photoprinting the through holes 7a forming the divided via holes using, for example, DuPont's Dry Film Muriston 1220@. After that, the catalyst 9 is immersed in a catalyst liquid based on palladium chloride to adsorb the catalyst 9 onto the entire inner wall of the through hole 7b where the mask 8 is not applied.

Next, after removing the mask 8 with an organic solvent (as shown), the first
As shown in FIG.
A conductor layer 10 is formed on the inner walls of a and 7b. in this case,
In the through hole 7a, the conductor layer 10 is formed only on the catalyst-containing insulating layer 5 and not on the catalyst-free insulating substrate 3, so that separation of the conductor layer 10 occurs on the inner wall of the through hole 7a.
Moreover, the conductor circuit patterns 1a and 1b are connected, and on the other hand,
In the through hole 7b, due to the previously adsorbed catalyst 9,
By forming the conductor layer 10 over the entire inner wall, a multilayer printed wiring board 13 including divided via holes 11 and normal through holes 12 is obtained.

〔Effect of the invention〕

As explained above, when selectively forming divided via holes in a multilayer printed wiring board, the present invention has various design constraints such as basic lattice arrangement, interlayer thickness, characteristic impedance setting, etc., unlike the prior art. This has the effect of providing a high-density multilayer printed wiring board with significantly improved wiring accommodation.

[Brief explanation of the drawing]

FIGS. 1(A) to (E) are longitudinal sectional views showing the manufacturing method of an embodiment of the present invention in the order of steps, and FIGS. 2(A) to (D
) is a vertical cross-sectional view showing an example of a conventional manufacturing method in the order of steps. la, lb... Conductor circuit pattern, 2... Insulating substrate containing catalyst, 3... Insulating substrate without catalyst, 4... Prepreg containing catalyst, 5... Insulating layer containing catalyst, 6... Multilayer substrate, 7a, 7b... through hole, 8... mask,
9... Catalyst, 10... Conductor layer, 11... Divided via hole, 12... Normal through hole, 13...
...Multilayer printed wiring board, 14...hole.

Claims (1)

[Claims] Two sets of catalyst-containing insulating substrates with conductor circuit patterns on both the front and back surfaces are placed as the outermost layer, and an insulating substrate without a catalyst and a prepreg containing a catalyst are inserted inside and heated and pressurized to create a multilayer structure. a step of molding a substrate; a step of drilling a through hole in a predetermined position of the multilayered substrate; and a step of masking a part of the through hole and adsorbing a catalyst on the unmasked inner wall of the through hole. , removing the mask, and forming a conductor layer by electroless plating, including the catalyst-containing insulating layer formed by the catalyst-containing insulating substrate and the catalyst-containing prepreg and the portion on which the catalyst is adsorbed on the inner wall of the through hole. A method for manufacturing a multilayer printed wiring board, the method comprising: forming a multilayer printed wiring board.