JPH02122577A - Reader - Google Patents

Reader

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Publication number
JPH02122577A
JPH02122577A JP63276976A JP27697688A JPH02122577A JP H02122577 A JPH02122577 A JP H02122577A JP 63276976 A JP63276976 A JP 63276976A JP 27697688 A JP27697688 A JP 27697688A JP H02122577 A JPH02122577 A JP H02122577A
Authority
JP
Japan
Prior art keywords
layer
photoelectric conversion
substrate
reading device
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63276976A
Other languages
Japanese (ja)
Inventor
Yuji Yoshida
雄二 吉田
Yoshinori Morita
啓徳 森田
Hirotaka Arita
有田 宏隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP63276976A priority Critical patent/JPH02122577A/en
Publication of JPH02122577A publication Critical patent/JPH02122577A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)
  • Facsimile Heads (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To obtain a highly reliable reader which is superior in quality and facilitates manufacturing control by forming a photoelectric conversion layer and an electrode layer one by one on a substrate for loading photoelectric conversion elements and forming wire bonding pad parts after performing wiring to a part of the above electrode layers from a substrate side for loading signal processing circuits. CONSTITUTION:A Cr layer 20 and an Al layer 21 are formed one by one to a part of the plate face of a glass substrate 12 and a common electrode is composed of the above two layers 20 and 21. An amorphous silicon photoelectric conversion layer 22 is formed so that its layer 22 covers two layers 20 and 21 and it extends over almost all the area of the substrate 12. Then an ITO layer 23, a Cr layer 24, and an Al layer 25 are laminated one after another on the layer 22; besides, they are formed separately into each electrode having a required form by etching. Further, optical passing holes 26 are formed with each element in the Cr layer 20, the photoelectric conversion layer 22, and the ITO layer 23. Then two kinds of leads 27 are connected from an IC chip 15; one of the leads 27 is connected to an end part of the Al layer 25 and its connecting place is formed into a wire bonding pad 28.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は密着型イメージセンサなどの読取り装置に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a reading device such as a contact type image sensor.

〔従来技術及びその問題点〕[Prior art and its problems]

密着型イメージセンサが既に実用化されており、そのセ
ンサの読取り系によれば、原稿と寸法的に実質上l:1
に対応させた長尺状の読取り装置を原稿に密着させ、そ
の装置に配置した光源が原稿を投光し、その反射光を受
光し、これを光電変換して読取り信号を得る。
A contact image sensor has already been put into practical use, and according to the reading system of that sensor, the size of the image sensor is substantially 1:1 with respect to the original.
A long reading device corresponding to the above is brought into close contact with the document, and a light source disposed in the device projects light onto the document, receives the reflected light, and photoelectrically converts it to obtain a read signal.

この読取り装置はその長平方向(主走査方向)に読取り
、同時に原稿を主走査方向と直交するように移動させ(
その移動方向は副走査方向と呼ばれる)、これにより、
原稿の二次元的イメージを読取ることができる。
This reading device reads the document in its long horizontal direction (main scanning direction) and simultaneously moves the document perpendicular to the main scanning direction (
The direction of movement is called the sub-scanning direction), thereby
It is possible to read two-dimensional images of manuscripts.

第4図は既に提案された読取り装置の副走査方向の断面
図であり、同図によれば、1はガラス基板であり、この
基板1の上にAI、Crなどから成る共通電極2が形成
され、共通電極2の上にアモルファスシリコンなどから
成る光電変換層3が形成され、更に光電変換N3の上に
透明導電層4並びにAn、Crなどから成る金属層5が
順次形成され、これらの両層4,5は素子毎の個別電極
となる。
FIG. 4 is a cross-sectional view in the sub-scanning direction of an already proposed reading device. According to the figure, 1 is a glass substrate, and a common electrode 2 made of AI, Cr, etc. is formed on this substrate 1. A photoelectric conversion layer 3 made of amorphous silicon or the like is formed on the common electrode 2, and a transparent conductive layer 4 and a metal layer 5 made of An, Cr, etc. are sequentially formed on the photoelectric conversion N3. Layers 4 and 5 serve as individual electrodes for each element.

共通電極2、光電変換層3及び透明導電層4は共通して
光通過孔6が形成され、この光通過孔6も素子毎に一対
一に対応して形成される。
The common electrode 2, the photoelectric conversion layer 3, and the transparent conductive layer 4 have a common light passage hole 6 formed therein, and these light passage holes 6 are also formed in one-to-one correspondence for each element.

また、透明導電層4及び金属層5の一方の端は素子選択
用ICチップ7の近くにまで延びており、その端部はワ
イヤポンディングパット8となす。
Further, one end of the transparent conductive layer 4 and the metal layer 5 extends close to the element selection IC chip 7, and the end portion is a wire bonding pad 8.

そして、ICチップ7からは2種類のり一部9が接続さ
れ、一方のリードは上記パット8に接続され、他方のリ
ードは信号導出用パット10に接続される。尚、この信
号導出用バット10は透明導を層及び金属層が積層して
成り、個別電極の形成時に同時に形成される。
Two types of glue portions 9 are connected from the IC chip 7, one lead is connected to the pad 8, and the other lead is connected to the signal derivation pad 10. The signal deriving bat 10 is formed by laminating a transparent conductive layer and a metal layer, and is formed at the same time as the individual electrodes are formed.

上記構成の読取り装置においては、基板1の素子形成側
に原稿(図示せず)が配置され、その反対側に光源(図
示せず)が配置され、光源が照射した光は光通過孔6を
通じて原稿を投光し、その反射光が透明導電層4を通し
て光導電変換層3により受光され、個別電極より読取り
信号が導出される。また、ICチップ7はアナログスイ
ッチやシフトレジスタなどから成り、これによって読取
り信号を素子毎に選択することができる。
In the reading device having the above configuration, a document (not shown) is placed on the element forming side of the substrate 1, a light source (not shown) is placed on the opposite side, and the light emitted by the light source passes through the light passage hole 6. Light is projected onto the original, and the reflected light is received by the photoconductive conversion layer 3 through the transparent conductive layer 4, and a read signal is derived from the individual electrodes. Further, the IC chip 7 is made up of analog switches, shift registers, and the like, so that read signals can be selected for each element.

しかしながら、上記構成の読取り装置において、光電変
換層3をアモルファスシリコンなどの薄膜により形成す
る場合、基板1の板面の所要部分を形成するためにメタ
ルマスクなどを用いたマスキングを行う必要があり、こ
れにより、製造上工程数が増す。しかも、このマスキン
グを行うに当たって、基板lの板面上の薄膜非形成部に
薄膜成分が入り込まないように注意しなければならず、
そのための製造管理が繁雑となる。
However, in the reading device having the above configuration, when the photoelectric conversion layer 3 is formed of a thin film such as amorphous silicon, it is necessary to perform masking using a metal mask or the like to form the required portions of the plate surface of the substrate 1. This increases the number of manufacturing steps. Moreover, when performing this masking, care must be taken to ensure that the thin film component does not enter into areas where the thin film is not formed on the plate surface of the substrate l.
Manufacturing management for this becomes complicated.

更に上記薄膜非形成部が汚染した場合、その上に形成し
た金属層5が断続したり、あるいは個々の金属層5の間
で又は個々の透明電極層4の間でそれぞれ短絡するとい
う問題点がある。
Furthermore, if the thin film-free area becomes contaminated, there is a problem in that the metal layer 5 formed thereon is discontinuous, or short circuits occur between the individual metal layers 5 or between the individual transparent electrode layers 4. be.

また、個別電極が光電変換層3とガラス基板lの上に連
続して形成され、そのため、その両者13の境界部が段
差11となり、これに起因して個別電極が断線したり、
あるいは各個別電極の間で短絡するという問題点もある
In addition, the individual electrodes are formed continuously on the photoelectric conversion layer 3 and the glass substrate l, so that the boundary between the two 13 becomes a step 11, which may cause disconnection of the individual electrodes.
Another problem is that short circuits occur between individual electrodes.

従って、本発明は叙上に鑑みて案出されたものであり、
その目的は断線や短絡をなくし、しかも、製造管理が容
易となった高品質且つ高信頼性の読取り装置を提供する
ことにある。
Therefore, the present invention has been devised in view of the above,
The purpose is to provide a high-quality and highly reliable reading device that eliminates disconnections and short circuits and facilitates manufacturing control.

〔問題点を解決すにための手段〕[Means for solving problems]

本発明の読取り装置は、基体と、この基体上に配置され
た光電変換素子搭載用基板と、その基体上に配置され且
つ上記基板に並設された信号処理回路搭載用基板とから
成り、そして、光電変換素子搭載用基板の上に光電変換
層と電極層が順次形成され、この電極層の一部が信号処
理回路搭載用基板側から配線されて成るワイヤボンディ
ングパット部であることを特徴とする。
The reading device of the present invention includes a base, a photoelectric conversion element mounting board disposed on the base, and a signal processing circuit mounting board disposed on the base and in parallel with the substrate, and , a photoelectric conversion layer and an electrode layer are sequentially formed on a substrate for mounting a photoelectric conversion element, and a part of this electrode layer is a wire bonding pad portion formed by wiring from the side of the substrate for mounting a signal processing circuit. do.

〔実施例〕〔Example〕

以下、本発明を第1図〜第3図に示す読取り装置により
詳細に説明する。
Hereinafter, the present invention will be explained in detail using the reading device shown in FIGS. 1 to 3.

第1図は読取り装置の副走査方向の断面図であり、第2
図はその要部拡大図であり、そして、第3図は読取り装
置の要部斜視図である。
FIG. 1 is a cross-sectional view of the reading device in the sub-scanning direction;
The figure is an enlarged view of the main part, and FIG. 3 is a perspective view of the main part of the reading device.

第1図中、12はガラス基板、13は該基板12上に形
成された光電変換素子アレイであり、また、14はプリ
ント基板であり、該基板14の上には素子選択用rcチ
ップ15並びに信号処理回路から成るフラットパッケー
ジ及びチップ部品(図示せず)が搭載される。素子選択
用ICチップ15はアナログスイッチやシフトレジスタ
ーなどから成り、これによって読取り信号を素子毎に選
択することができる。
In FIG. 1, 12 is a glass substrate, 13 is a photoelectric conversion element array formed on the substrate 12, and 14 is a printed circuit board. A flat package and chip components (not shown) comprising a signal processing circuit are mounted. The element selection IC chip 15 is made up of analog switches, shift registers, etc., and allows read signals to be selected for each element.

また、信号処理回路はアンプ回路、信号補正回路、レフ
ァレンス回路などから成り、読取り信号は信号処理回路
によって (i)  ・・・1.0〜2. OVに増幅される( 
ii )  ・・・素子毎の出力バラツキが補正されて
均一な感度の画情報が出力される ( iii )  ・・・その画情報をA−D変換する
に当たって必要なレファレンスレベルを出 力する などの信号処理が行われる。
Further, the signal processing circuit consists of an amplifier circuit, a signal correction circuit, a reference circuit, etc., and the read signal is processed by the signal processing circuit (i)...1.0 to 2. Amplified to OV (
ii) ... Image information with uniform sensitivity is output by correcting the output variations of each element (iii) ... A signal that outputs the reference level necessary for A-D conversion of the image information, etc. Processing takes place.

上記ガラス基板12とプリント基板14は金属製の基板
支持部材16の上に載置され、更にこの基板支持部材1
6にはLEDなどから成る光源17が付設されており、
この光源17がガラス基板12を通過し、原稿18を投
光するようになっている。
The glass substrate 12 and printed circuit board 14 are placed on a metal substrate support member 16, and this substrate support member 1
6 is attached with a light source 17 consisting of an LED or the like,
This light source 17 passes through the glass substrate 12 and illuminates the original 18.

尚、19は信号処理回路より出る読取り信号を外部へ導
出するためのコネクタである。
Note that 19 is a connector for leading out the read signal output from the signal processing circuit to the outside.

第2図は光電変換素子アレイ13の構成を具体的に示す
。同図によれば、ガラス基板12の板面の一部に01層
20及び41層2Iを順次形成し、両層20,21によ
り共通電極を成す。そして、上記両層20.21を覆う
ように且つ基板12の概ね全体に亘ってアモルファスシ
リコン光電変換層22をグロー放電分解法により形成し
、更に光電変換層22の上にITO層23、Cr層24
及びAI層25を順次積層するとともにエツチングによ
り所要形状の個別電極と成す。また、01層20、光電
変換層22及びITO層23には個別の素子毎に光通過
孔26を形成する。
FIG. 2 specifically shows the configuration of the photoelectric conversion element array 13. According to the figure, a 01 layer 20 and a 41 layer 2I are sequentially formed on a part of the plate surface of a glass substrate 12, and both layers 20 and 21 form a common electrode. Then, an amorphous silicon photoelectric conversion layer 22 is formed by a glow discharge decomposition method so as to cover both layers 20 and 21 and over almost the entire substrate 12, and an ITO layer 23 and a Cr layer are further formed on the photoelectric conversion layer 22. 24
and AI layers 25 are sequentially laminated and etched to form individual electrodes in a desired shape. Furthermore, light passage holes 26 are formed in the 01 layer 20, the photoelectric conversion layer 22, and the ITO layer 23 for each individual element.

かくして本例の光電変換素子アレイ13は第3図に示す
通りとなる。
Thus, the photoelectric conversion element array 13 of this example is as shown in FIG.

また、ICチップ15より2種類のり一部27が接続さ
れ、一方のり一部27は上記41層25の端部に接続さ
れ、その接続箇所がワイヤボンディングパット28とな
る。
Further, two types of glue portions 27 are connected from the IC chip 15, one of the glue portions 27 is connected to the end of the 41st layer 25, and the connection point becomes a wire bonding pad 28.

上記構成の読取り装置によれば、01層20の上に光電
変換N22が形成され、そのため、Cr層24及びAI
Ji25の段差が著しく小さくなり、個別電極の断線や
短絡の発生を防止できる。
According to the reading device having the above configuration, the photoelectric conversion N22 is formed on the 01 layer 20, so that the Cr layer 24 and the AI
The level difference in Ji25 is significantly reduced, and the occurrence of disconnection or short circuit of individual electrodes can be prevented.

しかも、アモルファスシリコン光電変換層22をガラス
基板工の板面全体に亘って形成でき、マスキングを必要
としない。
Moreover, the amorphous silicon photoelectric conversion layer 22 can be formed over the entire surface of the glass substrate, and no masking is required.

〔発明の効果〕〔Effect of the invention〕

以上の通り、本発明の読取り装置によれば、マスキング
を用いないで光電変換層が形成でき、これにより、工程
数が減って製造管理が容易となり、製造効率が高められ
、その結果、製造コストの低減がもたらされる。
As described above, according to the reading device of the present invention, a photoelectric conversion layer can be formed without using masking, thereby reducing the number of steps, making manufacturing management easier, increasing manufacturing efficiency, and resulting in lower manufacturing costs. This results in a reduction in

また、本発明の読取り装置によれば、板面全体に亘って
光電変換層が形成でき、そして、汚染源のない光電変換
層の上に電極層を形成しており、しかも、段差が著しく
小さくなった電極層となり、これにより、電極層に断線
や短絡がなくなり、その結果、高品質且つ高信顧性の読
取り装置が提供できる。
Further, according to the reading device of the present invention, a photoelectric conversion layer can be formed over the entire plate surface, and an electrode layer can be formed on the photoelectric conversion layer without any contamination source, and the level difference can be significantly reduced. As a result, there is no disconnection or short circuit in the electrode layer, and as a result, a high quality and highly reliable reading device can be provided.

尚、本発明の読取り装置は上記実施例に限定されず、本
発明の要旨を逸脱しない範囲において、CdSなどの他
種材料から成る充電変換層を用いたり、或いは構造上の
変更、改良などは何ら差支えない。
Note that the reading device of the present invention is not limited to the above-mentioned embodiments, and may use a charge conversion layer made of other materials such as CdS, or may make structural changes or improvements without departing from the gist of the present invention. There is no problem.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明実施例の読取り装置の断面図、第2図は
その読取り装置の要部拡大断面図、第3図は上記読取り
装置の光電変換素子アレイを示す斜視図、第4図は従来
の読取り装置の断面図である。 12・ 13・ 15・ 22・ 23・ 24・ 25・ 28・ ガラス基板 光電変換素子アレイ 素子選択用ICチップ アモルファスシリコン光導電層 ITO@ Cr層 へ1層 ワイヤボンディングパット部 特許出願人(663)京セラ株式会社 代表者安城欽寿
FIG. 1 is a sectional view of a reading device according to an embodiment of the present invention, FIG. 2 is an enlarged sectional view of essential parts of the reading device, FIG. 3 is a perspective view showing the photoelectric conversion element array of the reading device, and FIG. FIG. 1 is a cross-sectional view of a conventional reading device. 12・ 13・ 15・ 22・ 23・ 24・ 25・ 28・ Glass substrate photoelectric conversion element array element selection IC chip amorphous silicon photoconductive layer ITO @ 1 layer wire bonding pad part to Cr layer Patent applicant (663) Kyocera Co., Ltd. Representative Kinju Anjo

Claims (2)

【特許請求の範囲】[Claims] (1)基体と、該基体上に配置された光電変換素子搭載
用基板と、該基体上に配置され且つ上記基板に並設され
た信号処理回路搭載用基板とから成る読取り装置であっ
て、前記光電変換素子搭載用基板の上に光電変換層と電
極層が順次形成され、該電極層の一部が前記信号処理回
路搭載用基板側から配線されて成るワイヤボンディング
パット部であることを特徴とする読取り装置。
(1) A reading device comprising a base, a photoelectric conversion element mounting board placed on the base, and a signal processing circuit mounting board placed on the base and in parallel with the board, A photoelectric conversion layer and an electrode layer are sequentially formed on the photoelectric conversion element mounting substrate, and a part of the electrode layer is a wire bonding pad portion formed by wiring from the signal processing circuit mounting substrate side. A reading device.
(2)前記光電変換層がアモルファスシリコン層である
請求項(1)記載の読取り装置。
(2) The reading device according to claim (1), wherein the photoelectric conversion layer is an amorphous silicon layer.
JP63276976A 1988-10-31 1988-10-31 Reader Pending JPH02122577A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63276976A JPH02122577A (en) 1988-10-31 1988-10-31 Reader

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63276976A JPH02122577A (en) 1988-10-31 1988-10-31 Reader

Publications (1)

Publication Number Publication Date
JPH02122577A true JPH02122577A (en) 1990-05-10

Family

ID=17577036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63276976A Pending JPH02122577A (en) 1988-10-31 1988-10-31 Reader

Country Status (1)

Country Link
JP (1) JPH02122577A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990052396A (en) * 1997-12-22 1999-07-05 김영환 Liquid crystal display device and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990052396A (en) * 1997-12-22 1999-07-05 김영환 Liquid crystal display device and manufacturing method thereof

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