JPH02114554A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH02114554A
JPH02114554A JP26859288A JP26859288A JPH02114554A JP H02114554 A JPH02114554 A JP H02114554A JP 26859288 A JP26859288 A JP 26859288A JP 26859288 A JP26859288 A JP 26859288A JP H02114554 A JPH02114554 A JP H02114554A
Authority
JP
Japan
Prior art keywords
resin
sealing resin
external lead
semiconductor chip
sealed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26859288A
Other languages
Japanese (ja)
Inventor
Arimitsu Kato
有光 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP26859288A priority Critical patent/JPH02114554A/en
Publication of JPH02114554A publication Critical patent/JPH02114554A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To relax a stress exerted on an interface between a sealing resin and an external lead by a method wherein a thickness of a sealing resin at the external lead part is made sufficiently thinner than a thickness of a sealing resin at a semiconductor chip or the neighborhood of the external lead is sealed with another sealing resin. CONSTITUTION:For example, a lead frame 1, a semiconductor chip 2 mounted on it, an external lead 3 and a bonding wire 5 connecting an aluminum bonding pad 4 on the semiconductor chip to the external lead 3 are sealed with a sealing resin 6 which is thick at 2 to 3mm. A sealing resin at the external lead part has a thin structure which is about 1/2 to 1/3 as compared with a thickness of the sealing resin at the semiconductor chip part. Since a thin part of the sealing resin 6 is easy to deform, it is expanded or contracted according to whether the external lead 3 is expanded or contracted by a temperature change. Thereby, it is possible to relax a stress exerted on an interface between the sealing resin 6 and the external lead 3.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体装置に関し、特に外部リード
封止部の樹脂構造の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device, and particularly to an improvement in the resin structure of an external lead sealing portion.

〔従来の技術〕[Conventional technology]

従来、この種の半導体装置は、リードフレームと半導体
チップとボンディングワイヤと外部リードとを、１種類
の樹脂により、−様な厚さで封止した構造となっていた
。Conventionally, this type of semiconductor device has had a structure in which a lead frame, a semiconductor chip, a bonding wire, and an external lead are sealed with one type of resin at a thickness varying in thickness.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従って、上述した従来の樹脂封止型半導体装置では、外
部リード部の樹脂厚が半導体チップ部の樹脂厚と同じ構
造であり、また外部リード部の樹脂と半導体チップ部の
樹脂が同じである構造となっているので、温度変化によ
り封止樹脂と外部リードとの界面に大きなストレスが加
わり密着が悪くなるという欠点がある。この結果封止樹
脂と外部リードとの界面から外界の水分が侵入し、半導
体チップに到達することにより耐湿性が劣化するなどの
問題が起こる。Therefore, in the conventional resin-sealed semiconductor device described above, the resin thickness of the external lead part is the same as the resin thickness of the semiconductor chip part, and the resin of the external lead part and the resin of the semiconductor chip part are the same. Therefore, there is a drawback that a large stress is applied to the interface between the sealing resin and the external lead due to temperature changes, which deteriorates the adhesion. As a result, moisture from the outside world enters through the interface between the sealing resin and the external leads and reaches the semiconductor chip, causing problems such as deterioration of moisture resistance.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の樹脂封止型半導体装置は、 封止樹脂と外部リードとの界面に加わるストレスを緩和
するために、 （１）外部リードを半導体チップ部の樹脂厚に比べ十分
薄い樹脂で封止した構造を有している。In the resin-sealed semiconductor device of the present invention, in order to alleviate the stress applied to the interface between the sealing resin and the external leads, (1) the external leads are sealed with a resin that is sufficiently thinner than the resin thickness of the semiconductor chip portion. It has a structure.

（２）外部リードを複数の種類の樹脂で封止した構造を
有している。(2) It has a structure in which the external leads are sealed with multiple types of resin.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の請求項目（１）の実施例を示す樹脂封
止型半導体装置の断面図である。本実施例によればリー
ドフレーム１、これにマウントされた半導体チップ２、
外部リード３、及び半導体チップ上のアルミボンディン
グパッド４と外部リード３を接続するボンディングワイ
ヤ５は、２〜３ｍｍと厚い樹脂封止６により封止されて
いる。外部リード部の封止樹脂は半導体チップ部の樹脂
厚に比べ約２〜３分の１の薄さの構造となっている。FIG. 1 is a sectional view of a resin-sealed semiconductor device showing an embodiment of claim (1) of the present invention. According to this embodiment, a lead frame 1, a semiconductor chip 2 mounted on the lead frame 1,
The external leads 3 and bonding wires 5 connecting the external leads 3 to aluminum bonding pads 4 on the semiconductor chip are sealed with a resin seal 6 as thick as 2 to 3 mm. The sealing resin of the external lead portion has a structure that is approximately 2 to 1/3 thinner than the resin thickness of the semiconductor chip portion.

本実施例によれば、封止樹脂６の薄い部分は変形しやす
いため、外部リード３が温度の変化により伸縮しても追
随して伸縮する。このため封止樹脂全体が厚い従来の構
造と比較して、封止樹脂６と外部リード３との界面に加
わるストレスを改善することができる。According to this embodiment, since the thin portion of the sealing resin 6 is easily deformed, even if the external lead 3 expands or contracts due to a change in temperature, it expands or contracts accordingly. Therefore, compared to a conventional structure in which the entire sealing resin is thick, stress applied to the interface between the sealing resin 6 and the external lead 3 can be improved.

第２図は本発明の請求項目（２）の実施例を示す樹脂封
止型半導体装置の断面図である。本実施例によればリー
ドフレーム２、半導体チップ２、外部リード３、及びボ
ンディングワイヤ５が従来通り樹脂６により封止され、
さらに外部リード３を別の種類の樹脂８で封止した構造
となっている。樹脂８に、外部リード３と熱膨張係数が
近い値をもつ樹脂を用いるごとにより、ストレス緩和用
樹脂８と外部リード３との界面に加わるストレスを改善
できる。FIG. 2 is a sectional view of a resin-sealed semiconductor device showing an embodiment of claim (2) of the present invention. According to this embodiment, the lead frame 2, the semiconductor chip 2, the external leads 3, and the bonding wires 5 are sealed with the resin 6 as before,
Furthermore, the structure is such that the external leads 3 are sealed with another type of resin 8. By using a resin having a coefficient of thermal expansion close to that of the external lead 3 for the resin 8, the stress applied to the interface between the stress relieving resin 8 and the external lead 3 can be improved.

本実施例によれば耐湿性は樹脂６により保たれているの
で樹脂８は外部リード３との間にストレスがかりにくい
ことを主に考慮すればよいため、樹脂６、樹脂８の選択
の自由度が増すという利点がある。According to this embodiment, the moisture resistance is maintained by the resin 6, so it is only necessary to mainly consider that stress is not easily applied between the resin 8 and the external lead 3. Therefore, there is a degree of freedom in selecting the resin 6 and the resin 8. This has the advantage of increasing

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、封止樹脂と外部リードと
の界面に加わるストレスを緩和する構造を外部リード部
の封止樹脂に設けることにより、樹脂封止と外部リード
との密着の劣化を防ぎ、封止樹脂と外部リードとの界面
から外界の水分の侵入することを抑制できる効果がある
。As explained above, the present invention prevents the deterioration of the adhesion between the resin seal and the external lead by providing the sealing resin of the external lead with a structure that alleviates the stress applied to the interface between the sealing resin and the external lead. This has the effect of preventing moisture from entering the outside world from the interface between the sealing resin and the external lead.

【図面の簡単な説明】[Brief explanation of drawings]

第１図、及び第２図は本発明の請求項目（１）、及び（
２）の実施例を示す要部断面図である。第３図は従来の
要部断面図である。 １・・・・・・リードフレーム、２・・・・・・半導体
チップ、３・・・・・外部リード、４・・・・・・アル
ミボンディングパッド、５・・・・・・ボンディングワ
イヤ、６・・・・・・樹脂封止、７・・・・・・半導体
チップ表面の保護膜、８・・・・・・ストレス緩和用封
止樹脂。 代理人　弁理士　　内　原　　　晋Figures 1 and 2 show claim (1) of the present invention and (
FIG. 2 is a cross-sectional view of main parts showing the embodiment 2). FIG. 3 is a sectional view of a conventional main part. 1... Lead frame, 2... Semiconductor chip, 3... External lead, 4... Aluminum bonding pad, 5... Bonding wire, 6... Resin sealing, 7... Protective film on the surface of the semiconductor chip, 8... Sealing resin for stress relief. Agent Patent Attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims] 半導体チップ、リードフレーム、外部リード、及びこの
外部リードと半導体チップ上のボンディングパッドとを
接続するボンディングワイヤとを樹脂封止する樹脂封止
半導体装置において、外部リード部の封止樹脂厚を、半
導体チップ部の封止樹脂厚より十分薄くするか外部リー
ド部を近傍を他の樹脂で封止した構造を有するとを特徴
とする樹脂封止型半導体装置。In a resin-sealed semiconductor device in which a semiconductor chip, a lead frame, external leads, and bonding wires connecting the external leads and bonding pads on the semiconductor chip are sealed with resin, the thickness of the sealing resin at the external lead portion is 1. A resin-sealed semiconductor device characterized by having a structure in which the thickness of the sealing resin is sufficiently thinner than that of the chip portion or the vicinity of the external lead portion is sealed with another resin.
JP26859288A 1988-10-24 1988-10-24 Semiconductor device Pending JPH02114554A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26859288A JPH02114554A (en) 1988-10-24 1988-10-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26859288A JPH02114554A (en) 1988-10-24 1988-10-24 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH02114554A true JPH02114554A (en) 1990-04-26

Family

ID=17460676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26859288A Pending JPH02114554A (en) 1988-10-24 1988-10-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH02114554A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0483365A (en) * 1990-07-26 1992-03-17 Toshiba Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0483365A (en) * 1990-07-26 1992-03-17 Toshiba Corp Semiconductor device

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